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Timing and Synchronization Over Ethernet

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Timing and Synchronization Over Ethernet Final thesis Timing and Synchronization over Ethernet by Emil Lundqvist LiTH-ISY-EX--15/4824--SE Februari 20, 2015 Final thesis Timing and Synchronization over Ethernet by Emil Lundqvist LiTH-ISY-EX--15/4824--SE Februari 20, 2015 Supervisor, ISY: Andreas Ehliar Supervisor, : Victor Examiner: Olle Seger Abstract x In this thesis an investigation will be done on how time and frequency can be synchronized over Ethernet with help of Precision Time Protocol and Synchronous Ethernet. The goal is to achieve a high accuracy in the synchronization when a topology of 10 cascaded nodes is used. Different approaches may be used when implementing Precision Time Protocol for synchronization. They will be investigated and the best approach for a good accuracy will be proposed. Another question that this thesis will cover is how to recover a radio frequency, a multiple of 3.84 MHz from Ethernets 10.3125 GHz. By using hardware support for the timestamps and transparent clocks in the forwarding nodes the best accuracy is achieved for the time and phase synchronization. Combining this with Synchronous Ethernet for frequency synchronization, to get a traceable clock through the system, will lead to the best result. The total error does not need to be greater than 1.46 ns if the asymmetry in the medium is neglected and a well designed PCS and FIFO are used. Recovering the radio frequency from Ethernet is done by using the highest common frequency, either an integer phase locked loop or a fractional phase locked loop can be used. The fractional phase locked loop will give a better result but will contribute with spurs that the integer phase locked loop does not. iii Acknowledgements First of all I want to thank my supervisor Victor at the company for all the guidelines and help during the thesis. I also want to thank all experts at the company that my supervisor put me in contact with. Especially Andres and Stefan that was very useful to discussions the problem I encountered during the thesis. I also want to thank my boss, Pierre, which gave me the opportunity to do my thesis at the company. From the University I want to thank my fellow students for the good time as a student. I want to give an extra big thanks to Viktor Classon for reviewing my report and act as my opponent for the theses. I also want to thank my examiner Olle Seger and my supervisor Andreas Ehliar for the help during this thesis and making it possible to accomplish. Most of all I want to thank my parents Lars and Maria for supporting me during my time of studies and my partner Ellen Selling that have been very supporting during the thesis. At last I also want to thank my friends and previous neighbor, Alexander and Ruby Peck for reviewing the report. Emil Lundqvist Stockholm, February 2015 v vi Contents 1 Introduction 1 1.1 About the work . .1 1.1.1 Communication protocols . .1 1.2 Presentation of the problem . .2 1.3 Restrictions . .2 1.3.1 Topologies . .2 1.3.2 The system . .3 1.3.3 Time error budget . .3 1.4 Related research . .4 1.5 Outline . .4 2 Background 5 2.1 Ethernet . .5 2.1.1 Media access control . .6 2.1.2 Physical coding sublayer . .7 2.2 Precision time protocol . 10 2.2.1 Synchronization . 10 2.2.2 Different types of clocks . 11 2.3 Synchronous Ethernet . 13 2.4 Expressions . 13 2.4.1 parts per million . 13 2.4.2 Free running . 14 2.4.3 Hop . 14 2.4.4 Topology . 14 2.4.5 Ingress . 14 2.4.6 Egress . 14 3 Time Accuracy 15 3.1 Problems . 15 3.1.1 Reference point . 15 3.1.2 Resolution of the timestamp . 16 3.1.3 Asymmetry . 16 3.1.4 Frequency accuracy . 18 3.1.5 Packet delay variation . 19 vii 3.2 Possible solutions . 19 3.2.1 Reference point . 19 3.2.2 Resolution of timestamp . 20 3.2.3 Asymmetry . 20 3.2.4 Precision time protocol implementation . 22 3.2.5 Frequency accuracy . 28 4 Frequency recovery 29 4.1 Problems . 29 4.2 Possible solutions . 29 5 Result 33 6 Conclusion 35 viii List of Figures 1.1 Shows how a tree topology is estimated with a chain topology by choosing the longest path . .3 1.2 A chain topology with 4 nodes and 3 hops . .3 2.1 An overview of 10GBASE-R Ethernet, an explanation for the abbreviations can be found in Table 2.2 . .6 2.2 An Ethernet packet with the following IPG . .7 2.3 A block diagram over the PCS . .7 2.4 FIFO with N positions and 64 bits in each position . .8 2.5 An example how a serial scrambler can be implemented, where the operators are XOR-gates . .9 2.6 An example how a serial descrambler can be implemented, where the operators are XOR-gates . 10 2.7 A two-step synchronization in PTP . 11 2.8 Illustration of a boundary clock . 12 2.9 Illustration of a transparent clock . 13 2.10 Three nodes implemented with Synchronous Ethernet . 13 3.1 A simple system of two nodes . 15 3.2 Different choices for the PTPs reference point . 16 3.3 Showing the asymmetry in a node . 17 3.4 An example where data1 writes to the FIFO with clock1 and data2 reads from the FIFO with clock2 ............. 18 3.5 The chart shows the variable delay in the FIFO for different bit widths between PCS and PMA . 21 3.6 Show a network where a boundary clock is useful to reduce the workload from the grandmaster . 23 3.7 The time estimation in a transparent clock . 24 3.8 The difference between End-to-End (solid line) and Peer-to- Peer (dotted line) delay estimation . 25 3.9 Network load for different PTP message . 27 4.1 Block diagram over an integer PLL . 30 4.2 Phase noise graph for an integer PLL . 30 4.3 Block diagram over a fractional PLL . 31 ix 4.4 Phase noise graph for a fractional PLL . 31 4.5 Phase noise graph for a fractional PLL with reduced spurs . 32 x List of Tables 2.1 The different layers in the OSI Model . .5 2.2 An explanation for the abbreviations used in Figure 2.1 . .6 3.1 Show the message size for the PTP message in bytes . 27 xi xii Chapter 1 Introduction 1.1 About the work This document is a master thesis of a student at Link¨opingsUniversity. The work is the last step in the master program Applied Physics and Electrical Engineering, system on chip. The work will give the student 30hp of the 120hp that a master degree contains, this 30hp shall correspond to 20 weeks of studies. The student will be graduated at the Department of Electrical Engineering in Link¨opingand the work will be done at . The necessary knowledge for this work is to understand the different communication protocols that are used and how the timing will be affected. In this section a short introduction of these protocols will be done. 1.1.1 Communication protocols Ethernet is one of the most widely used data communication standards in the world. The standard was published in 1985 at the Institute of Electrical and Electronics Engineers (IEEE) and is defined as IEEE 802.3 [2]. The communication standard is asynchronous, based on data packets and will be discussed more in Section 2.1. In this thesis the 10GBASE-R standard will be used. Precision time protocol (PTP) is a protocol that is designed to synchronize real time clocks over a network, such as Ethernet. The first published version was released 2002 and the second (and latest) version in 2008. This protocol is defined as IEEE 1588 [3]. In Section 2.2 a more detailed overview of the protocol will be explained. Synchronous Ethernet (SyncE) is a recommendation from International Telegraph Unions Telecommunication Standardization Sector (ITU-T) on how a network can be setup to get a good frequency synchronization. In Section 2.3 SyncE will be discussed more. 1 CHAPTER 1. INTRODUCTION 1.2 Presentation of the problem There are two different tasks which will be investigated in this thesis, the first one is regarding time and synchronization and the second one is how to achieve a required frequency. This will be done by using 10GBASE-R Ethernet as the communication protocol between different nodes. The first task regarding the time and synchronization is how to get a system with many nodes to have the same perception of time. There is a known way to distribute time over Ethernet called PTP, but it can be implemented in different ways which gives it different properties. The focus will be to get a good accuracy combined with a relatively low cost. A recommended solution will be presented and an estimation of the time accuracy will be done. The frequency issue is how a telecommunication frequency can be recovered from Ethernet. The transmitting frequency for Ethernet is 10.3125 GHz, when 10GBASE-R is used, while the wanted radio frequency is a multiple of 3.84 MHz which the 10GBASE-R frequency is not. 1.3 Restrictions 1.3.1 Topologies The only topology that will be investigated is the chain topology with cascaded nodes. Another topology that could be of interest is the tree topology, but for timing the worst case is the longest path.
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