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Design of Mm-Wave Circuits in CMOS

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Design of Mm-Wave Circuits in CMOS LATEST TRENDS on CIRCUITS Design of mm-wave circuits in CMOS Patrick Reynaert, Lianming Li, Noel Deferm and Michiel Steyaert Department of Electrical Engineering - ESAT/MICAS Katholieke Universiteit Leuven Kasteelpark Arenberg 10 B3001 Leuven BELGIUM [email protected] www.esat.kuleuven.be/micas/ Abstract: - Advances in technology scaling has pushed the maximum operating frequency (fT or fMAX) of modern CMOS beyond 100GHz. This allows the design of CMOS ICs at mm-wave frequencies, enabling mm-wave applications such as imaging, medical, radar and security to enter the consumer markets. This paper reviews some of the basic challenges when designing CMOS circuits at such high frequencies, and will also discuss some measured CMOS circuits that operate at 60GHz and 100GHz. Key-Words: - CMOS, mm-wave 1 Introduction the mm-wave potential inside, the technology itself is CMOS technology has followed Moore’s Law for over not optimized for mm-wave operation. Some of the 40 years. Today, several billion nanometer scale fundamental issues that need to be solved to make mm- transistors are integrated on a single chip. As the wave CMOS happen, will be discussed in this paper. dimensions of the transistor scale for economic reasons, Section 2 describes the performance of CMOS their maximum operation frequency goes up. As a technology at mm-wave frequencies. Section 3 discusses consequence, the fT of MOS transistors has recently the design of a 60GHz VCO in 90nm and Section 4 crossed the 100GHz barrier. gives details on the design of 100GHz amplifier in 90nm Together with this technology enabler came the 60GHz CMOS. Final conclusions are given in Section 5. frequency band. This band is of not much use for long- haul radar or communication applications because of the high oxygen absorption at 60GHz. Therefore, this band 2 Performance of CMOS technology at was converted into an ISM band, targeting extremely mm-wave frequencies high-speed wireless communication systems. Indeed, about 7GHz of bandwidth is available at 60GHz. This is 2.1 Transistors a huge number compared to existing WLAN or cellular The behavior of a 90nm nMOS transistor with systems. W=15m is depicted in figure 2. At frequencies lower But it doesn’t end at 60GHz. Indeed, CMOS offers high than the stability break point (75 GHz for 3 m speed to build integrated electronics at 100GHz and fingerwidth and 130 GHz for 1 m fingerwidth in figure above, targeting systems as radar, mm-wave sensing, 2), the gain of the device is described by the Gmsg or medical imaging, security,… Making cheap electronic Maximum Stable Gain. In this region the device is hardware for these systems applications will create new conditionally stable. This means that for certain load market opportunities. After all, the cost of the above- impedances, such as complex conjugate input and output mentioned applications is still too high today, preventing matching, the device will oscillate. Stabilization is them from entering the consumer market. Providing a achieved by introducing losses such as mismatch or cheap alternative would change this, and this is exactly resistive losses. At frequencies beyond the stability what CMOS can promise. break point the device becomes unconditionally stable But making mm-wave circuits in CMOS requires which results in a faster roll-off of the gain curve. in fundamental research, a re-thinking of the design CMOS, the position of the stability break point is mainly methodology and new architectures to circumvent the a function of the parasitic gate resistance. An increase of limits of Silicon. After all, CMOS is in the first place a this resistance, for example by increasing the digital technology, optimized for putting lots of fingerwidth, results in a more stable device over a wider transistors on a single die. Although the transistors have frequency range. However, this also leads to a lower ISSN: 1792-4227 102 ISBN: 978-960-474-198-4 LATEST TRENDS on CIRCUITS gain at higher frequencies. A device with a lower gate gate resistance, and gate-drain capacitor neutralization resistance (smaller fingerwidth) can thus provide more (Figure 2). gain at higher frequencies. The red and blue curve on figure 2 show this effect for a transistor with a constant W/L. Decreasing the fingerwidth from 3 m to 1 m leads to an increase of the the stability break point from 75 GHz to 130 GHz. In the conditionally stable region the gain is limited by the internal feedback of the transistor. The problem is the relative large gate-drain parasitic capacitance which creates a feedback loop. This internal feedback can be neutralized by connecting a negative capacitor in parallel with the original one so that the resulting feedback becomes smaller. The negative capacitance can be achieved by cross-coupling a capacitor between gate and drain in a pseudo differential pair (Figure 1). This is another benefit of using differential circuits at these high frequencies. Another advantage of this neutralization technique is the increase in stability performance without introducing extra losses, leading to a higher Fig. 2. Gain and stability improvement by Rg reduction stability over a wider frequency band without losing and Cgd neutralization. gain. This also simplifies the design of the input and output matching networks. The effect of this 2.2 Passives neutralization technique is depicted in figure 2 (green Accurate mm-wave impedance matching networks are a curve). must to create a conjugate match at input and output to maximize the power gain. Typical mm-wave matching circuits are built from bulky transmission lines [1]. Lumped element matching with capacitors and inductors is gaining importance, resulting in a reduced chip area [2], [3]. Using differential circuits, new matching circuit topologies can be obtained. One of the most important differential matching circuits is the transformer [4]. Even at mm-wave frequencies its performance is remarkably good. On top of this, the circuit can act as an impedance transformer and DC-blocker between different stages. DC-biasing can be connected at the center tap of the transformer which takes away the need for large inductors or transmission lines and coupling capacitors. Fig. 1. Neutralized pseudo differential pair. The cross-coupled capacitors are inactive nMOS transistors (see Figure 1). MOS capacitors are chosen here to overcome mismatch problems with the active devices of the differential pair due to process variations. If the crosscoupled capacitor is larger than the parasitic one of the active device, the stability performance of the complete differential pair is decreasing so oscillation can occur again at certain frequencies. To create a save stability margin, the MOS capacitors are approximately chosen 20 % smaller than the active devices. High gain at high frequencies can thus be achieved by reducing the fingerwidth which in turn results in a lower Fig. 3. 3D view of an integrated planar 1:1 transformer. ISSN: 1792-4227 103 ISBN: 978-960-474-198-4 LATEST TRENDS on CIRCUITS 25 The loss of the transformer decreases with frequency up to the point where the effect of self resonance becomes 20 important. At this point the loss reaches a minimum. For the transformer in figure 3, the SRF (self resonance 15 frequency) is situated at relatively high frequencies due to the planar design. By altering the dimensions of the 10 Rgate transformer, it can be optimized for coupling factor, SRF Imp [Kohm] or impedance matching. The impedance transformation 5 ratio can be adjusted by changing the dimensions and Rds number of inner and outer windings. This also alleviates the need for extra series or parallel matching circuits. 0 20 40 60 80 100 Freq [GHz] Fig. 4 Transistor gate and drain resistance versus 3 A 60GHz VCO in 90nm CMOS frequency Because of the very wide license-free spectrum, the 60GHz band is very attractive for the future wireless Considering the above issues, to achive better phase application. However the high working frequency and noise, the varactor is first optimized in term of the very large frequency span make the design of 60GHz capactiance tuning ratio and quality factor. Secondly, mm-wave oscillators a challenge. From system point of using inductive division technique, a power matching view, the oscillator will affect the system performance in technique is introduced [5]. In this way, the amplifier term of signal selectivity and bit error rate. In addition, performance is maxmized, and at the same time, its for the commercial application, the power is also an loading on the LC tank is reduced, improving the important concern. Therefore regarding mm-wave oscillator efficiency and phase noise. oscillators, how to combine large tuning range and low The realized oscillator works from a 0.6 V supply phase noise with good power efficiency still remains a voltage, consuming a power consumption of only 3.16 challenge. To address these problems, the operation mW. The schematic and die photograph are shown in mechanism and limits of mm-wave CMOS oscillators Fig.5 and 6. With the tuning voltage ranging from 0 to have been investigated [5]. 1.2V, the oscillator achieves a tuning range about Typically, an oscillator consists of two parts: 1) an LC 5.6GHz (from 61.1GHz to 66.7GHz). The phase noise is tank for frequency selectivity and frequency tuning and measured using the delay line method. As shown in 2) a positive feedback amplifier to compensate the LC Fig.7, the phase noise is about -95dBc/Hz at 1MHz tank loss. To achieve low phase noise, the designer offset from 64GHz carrier. should make the LC tank Q as high as possible. Different from GHz oscillators, the mm-wave oscillator LC tank loss is typically dominant by the varactor.
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