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CAMAN IOP Publishing IOP Conf. Series: Materials Science and Engineering 17 (2011) 012049 doi:10.1088/1757-899X/17/1/012049
Embedded System Implementation on FPGA System With µCLinux OS
1Ahmad Fairuz Muhd Amin , 2Ishak Aris , 3Raja Syamsul Azmir Raja Abdullah and 3Ratna Kalos Zakiah Sahbudin
1Institute of Advanced Technology, Universiti Putra Malaysia, 43400 Serdang, Selangor, Malaysia.
Email: [email protected]
2Department of Electrical and Electronic Engineering, Universiti Putra Malaysia, 43400, Serdang, Selangor, Malaysia.
Email: [email protected]
3Department of Computer and Communication Systems Engineering, Universiti Putra Malaysia, 43400, Serdang, Selangor, Malaysia.
Email: [email protected]
Abstract Embedded systems are taking on more complicated tasks as the processors involved become more powerful. The embedded systems have been widely used in many areas such as in industries, automotives, medical imaging, communications, speech recognition and computer vision. The complexity requirements in hardware and software nowadays need a flexibility system for further enhancement in any design without adding new hardware. Therefore, any changes in the design system will affect the processor that need to be changed. To overcome this problem, a System On Programmable Chip (SOPC) has been designed and developed using Field Programmable Gate Array (FPGA). A softcore processor, NIOS II 32- bit RISC, which is the microprocessor core was utilized in FPGA system together with the embedded operating system(OS), μClinux. In this paper, an example of web server is explained and demonstrated
1. Introduction Many embedded system designs have been implemented in a variety of applications such as mobile phones, automotive, aircraft and others electronic gadgets. These embedded system can be grouped together and communicate over a network either using wired or wireless systems. The processor used in this embedded system is based on a Softcore processor which is implemented in FPGA [1, 2]. The two major FPGA manufacturers provide commercial softcore processors namely, Xilinx offers its MicroBlaze processor [3] while Altera Nios II processor [7]. The softcore processor can be adapted and enhanced to the requirement. Many components can be added or removed without any problem such as I2C, UART, Ethernet and USB. The FPGA will be reconfigured with the new softcore processor which increases the flexibility and easy to maintain. A softcore processor is a microprocessor fully described in software, usually in hardware description language (HDL), which can be synthesized in programmable hardware, such as FPGA.
Published under licence by IOP Publishing Ltd 1 2
CAMAN IOP Publishing IOP Conf. Series: Materials Science and Engineering 17 (2011) 012049 doi:10.1088/1757-899X/17/1/012049
In this paper, DE2 Education and Development Board which developed by Terasic Technologies [4] was used. This board has Cyclone II EP2C35F672C6 FPGA, 8MB SDRAM, 512KB RAM and 1MB Flash and its sufficiently powerful to support general-purpose operating system. The Ethernet is used for the communication and a web server is implemented on the embedded system. This paper deals with the implementation of µCLinux OS to the Embedded System on FPGA board to monitor the status of the peripherals input or output of the board system over a network. This embedded system is connected to the network using Ethernet interface which available on the board and setup a web server as shown in Figure 1.
DE2 Board Internet With Nios II Processor
Figure 1. Altera DE2 board run as a web server
2. System Architecture There are three layers in this embedded system and the development environment is as follows:
1. Bottom layer: FPGA system hardware, e.g. Altera DE2 board. 2. Middle layer: µCLinux OS 3. Top layer : User space i.e. applications program
2.1Hardware The components that need to be designed for the embedded system are as follows: - FPGA - RAM, ROM - Serial Interface - LCD, LED (for output) - Switches, buttons (for input) - Ethernet Interface
The main component of the board is the FPGA which is the core of the system and always can be configured with a new softcore processor. The remaining components are SDRAMS which connected to the FPGA and its functionality as data storage. The embedded system development board is shown in Figure 2.
Figure 2. Hardware Platform of Embedded System
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CAMAN IOP Publishing IOP Conf. Series: Materials Science and Engineering 17 (2011) 012049 doi:10.1088/1757-899X/17/1/012049
2.2 Softcore Processor Core processor used for the system is a softcore processor and described by a hardware description language and are configure on a FPGA. Hardware description language (HDL) used is VHDL or Verilog [5] as hardware code program and configuration. This paper describes the development of an embedded system with FPGA. It is not shown how to develop softcore processor and only use the finished open source IP cores. An open source code softcore processor is free available under the General Public License(GPL). GPL license [6] can be downloaded from opencores [17]. The Tool chain, a collection of programs used for compiling and linking, exists for the development of the software as well as using of µCLinux for the processor. The advantage of this IP core is that the source code is available for free and it is very easy to change and use it. In this embedded system, a softcore processor used is Nios II and is designed by the Quartus II and Nios II IDE for hardware and software development respectively. The advantage of the NIOS II is that it is possible to develop very fast an own softcore processor and can be integrated with IP cores that provided by Quartus II. Moreover, this softcore processor is ready to use toolchain for the development of software as well as compiling µCLinux.
2.3 NIOS II Nios II is a microcontroller that is used in FPGA and was developed by Altera Corp. This microcontroller was not exists as a physical hardware, but it is available only as in the hardware description language such as in Verilog and it is called Softcore Processor. This microcontroller is without Management Memory Unit (MMU) which allows to build a lot of a different microcontroller systems such as UART, SDRAM controller, DMA interface, Ethernet interface, parallel input output (PIO) devices. As a general purpose RISC processor, the NIOS II comes with a full 32-bit instruction set, data path, address space, 32 general-purpose registers and 32 external interrupts. A NIOS II processor is equivalent to a microcontroller or “computer on a chip” that includes a processor and a combination of peripherals and memory on a single chip. The components of this such microcontroller are interconnected via the proprietary “Avalon-MM-Bus” [7] of Altera. The Avalon interface can be used to describe peripheral interface, such as SDRAM, that supports only simple, fixed cycle read/write transfers. On the other hand, Avalon-MM interface can also be used to describe a more complex pipelined interface capable of burst transfers. Figure 2 shows an example of a NIOS II system.
Figure 2. A NIOS II System on FPGA
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CAMAN IOP Publishing IOP Conf. Series: Materials Science and Engineering 17 (2011) 012049 doi:10.1088/1757-899X/17/1/012049 2.4 SOPC Application The traditional design modalities are ASIC and fixed-processor design. SOPC [8, 9] design has advantages and disadvantages to both of these alternatives as show in Table 1.
Table 1. Comparison of SOPC, ASIC and Fixed Processor Design Modalities [11]
Fixed- Feature SOPC ASIC Processor
Software Flexibility
Hardware Flexibility
Reconfigurability
Development Time/Cost
Peripheral equipment cost
Performance
Production cost
Power efficiency
The strengths of SOPC design are reconfigurable, flexible nature and short development cycle. However, the disadvantages include lower maximum performance, higher unit costs in production and relatively high power consumption [10].
In Figure 2, the system contains PIOs which connected to the input e.g. switches and output e.g. LEDs and LCD. These PIOs are implemented using QUARTUS II and Nios II IDE for hardware and software development tools respectively as well as the FPGA component Cyclone II 2C35 using DE2 Development Board [4] is selected. The following IP cores are attached to this project under SOPC builder:
• NIOS II (softcore processor) • Avalon MMU for bus • SRAM 512 KB (peripheral) • SDRAM 8 MB (peripheral) • Flash controller (peripheral) • Ethernet MAC controller (peripheral) • UART controller (peripheral)
All the peripherals above are connected over the Avalon buses at the processor and each of peripheral, address are assigned in order to access it via the software. Nios II IDE offers a function to write an application.
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CAMAN IOP Publishing IOP Conf. Series: Materials Science and Engineering 17 (2011) 012049 doi:10.1088/1757-899X/17/1/012049
The design of the hardware in Quartus II and SOPC builder is shown in Figure 3.
Figure 3.Design of Hardware of FPGA
The Ethernet and the serial port are used to allow communication between the softcore and external interfaces. The JTAG debug module allows making hardware debugging on any signal inside FPGA using Quartus II tool SignalTap which transform the host computer to a logic analyzer.
3. Software Currently, most of the embedded operating systems (OS) are stable and found in most embedded systems. Many operating systems for embedded operating systems are available as shown in Table 2. WinCE requires more resources which at least 32M of RAM and 100 MHz processor. eCos, µC/OS-II and µCLinux are three of the most popular OS choices available for the NIos II processor. They can also have much smaller footprints, as little as 1 MB image that requires less than 4 MB of RAM So in this project, µCLinux is preferred compared to others OS based on open-source and more flexible [11]. Compared to other system, e.g. the µC/OS-II, µCLinux provides higher compilation speed and has a wide set of compilation libraries. The original µCLinux has been used since it is a stable version continuously updated and presently it has kernels up to 2.6 version [12]
Table 2. OS support for the Nios II Processor [11]
Nios II OS RTOS OS Type IDE Plug-in WinCE Yes Commercial - eCos Yes Open Source - RTOS Yes Commercial - µC/OS-II Yes Commercial Yes emboss Yes Commercial - osCAN Yes Commercial - µCLinux - Open Source Yes
There are many different application types for µCLinux [13] in industrial facilities range from controlling terminal e.g. mobile, stationary or measuring system with Internet connection, and quality control system. Its characteristic covers high stability, system reliability, hard real time ability, internet ability and excellent file system which make µCLinux attractive for the technical side for industrial applications. Applications on the host computer makes it easy to customize µCLinux based on any development board listed.
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CAMAN IOP Publishing IOP Conf. Series: Materials Science and Engineering 17 (2011) 012049 doi:10.1088/1757-899X/17/1/012049
4. Implementation of the Embedded System µClinux (derivation of Linux 2.0 to be used for microcontroller) is incorporated into the embedded system, which does not require a memory management unit (MMU). In order to make the NIOS II processor a Linux environment, an µCLinux image has been built and downloaded to the processor. This process must be done in an external environment, possibly native Linux. For Windows as the Operating System, a virtual Linux machine, Ubuntu[16], has been mounted on the host PC using a freeware virtualization tool, VirtualBox [14]. It is also necessary to install a cross-compiling environment to compile the code for the specific NIOS II processor. This is a GCC C compiler (gcc) derivation, with a set of commands to compile for the specific target. The reference for all the hardware parameters , which listed in Figure 3, in the NIOS specific architecture is the ptf file generated by Quartus II IDE at the end of the hardware compilation. The Linux image file is created and downloaded to the processor recognizes all present peripherals. At the end of the procedure the softcore acts as a complete OS PC with Ethernet connected to the local area network (LAN). Software tools can be written and downloaded to the processor to control the hardware, e.g. PIO (buttons, LEDs, LCD, using read/write parameters and send/receive data from Ethernet.
Uncompressing Linux... Ok, booting the kernel. Linux version 2.6.23-uc0-g8846a4bd-dirty (kee@PowerKee) (gcc version 3.4.6) #196 PREEMPT Fri Sep 11 16:40:45 MYT 2009
uClinux/Nios II Altera Nios II support (C) 2004 Microtronix Datacom Ltd.
setup_arch: No persistant network settings signature at 003F0000 Built 1 zonelists in Zone order. Total pages: 2032 Kernel command line: PID hash table entries: 32 (order: 5, 128 bytes) console [ttyJ0] enabled Dentry cache hash table entries: 1024 (order: 0, 4096 bytes) …………
Serial: JTAG UART driver $Revision: 1.3 $ ttyJ0 at MMIO 0x80681110 (irq = 1) is a jtag_uart
Figure 4. µCLinux kernel booting messages
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CAMAN IOP Publishing IOP Conf. Series: Materials Science and Engineering 17 (2011) 012049 doi:10.1088/1757-899X/17/1/012049 µCLinux starts booting immediately and the series of messages are shown in Figure 4.
5. Application Software In a beginning stage of the development, a serial port acts as a console and an Ethernet device used for telnet, file transfer protocol (ftp) and hyper text transfer protocol (http) services. The code is a standard c code compiled with cross platform gcc compiler. There are two possibilities how to use the code. Firstly, after compilation, the binary is uploaded via ftp to the NIOS II processor but after shutdown the system will lose the memory of the code. Secondly, is to embed the code inside the Linux image or store it in the flash memory which always available.
#include
int main() { volatile unsigned *led_id = ((volatile unsigned *)(na_newLED));
*led_id = 0;
while (1) { *led_id = 24; //LED 4 and 5 blinks sleep(1); // delay 1 second *led_id = 0; // no LED blinks } return 0; }
Figure 6. C code for LED blinking
We use the port address of the devices defined in SOPC builder for IO programming to control the peripherals which is flexibility of soft core processor of FPGA. A file “nios2.h” contains the addresses of the peripherals. The example to control the LEDs is shown in the Figure 6. Other applications can be developed to control the LCD, PIOs or Seven Segments display as well as the input e.g. buttons or switches. The web server is another powerful mechanism which control and monitor the peripherals over the network. In the Figure 6 shows the web control page to display the outputs on LCD, LEDs or Seven Segment Displays. It also can monitor the status of the input of the switches or buttons and display the result on the web page. The Common Gateway Interface (CGI) [15] takes the data exchange between web server, e.g. embedded PC and the client, e.g. host PC.
6. Results
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CAMAN IOP Publishing IOP Conf. Series: Materials Science and Engineering 17 (2011) 012049 doi:10.1088/1757-899X/17/1/012049 Figure 6. CGI Webpage with full control over all Peripheral Input/Output devices
From the test results, it shows that the system is successfully monitored and controlled using the embedded system based on FPGA which is small and easy to maintain. Comparison performance with other embedded system without MMU based on ASICs, the embedded system based on FPGAs offer the same functions by porting uCLinux system except the performance of processor. This is because of the slower clock rate, softcore processor offers a lower performance and consumes more power than ASICs. However, the softcore processor has more flexibility and is reconfigurable IP core, which can reduce the design cycle which can be a key factor for consumer electronic industry. The peripherals can easily added to the hardware system with less confinement according to the requirement of customers. Furthermore, the designer can build multi-processor in one FPGA, which will enhance the performance of embedded system.
7. Conclusion The whole embedded system based on Nios II softcore processor designed using an operating system, µClinux on a DE2 Altera board has been presented. It demonstrated the input/output web control as one of the application. We found that the software provides the flexibility to change the source code easily for the new requirements. The hardware, however, is a rigid system. If new requirement are set, the entire embedded system must be changed and integrated in the total system. This is very expensive and makes the maintenance very difficult. To overcome this problem, with the help of the hardware description language, completely new processors and peripherals can be integrated in the FPGA without removing the platform from the total system. µClinux is a powerful tool that has been applied to a number of commercial applications. The kernel is flexible and can be enhanced by embedded developers. It functions is very much like a regular Linux Operating system and is easy to boot and running.
Acknowledgements The authors wish to thank to the staff of Institute of Advanced Technology for providing the facilities and resources to complete the above project successfully.
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CAMAN IOP Publishing IOP Conf. Series: Materials Science and Engineering 17 (2011) 012049 doi:10.1088/1757-899X/17/1/012049 [9] H. Mrabet, T. Marrakchi, H. Mehrez, and A. Tissot, “Implementation of scalable embedded FPGA for SOC,” in Book Implementation of scalable embedded FPGA for SOC, Series Implementation of scalable embedded FPGA for SOC, Editor ed.^eds., City, 2006, pp. 74-77. [10] A. Amara, F. Amiel, and T. Ea, “FPGA vs. ASIC for low power applications,” Microelectronics Journal, vol. 37, (no. 8), pp. 669-677, 2006. [11] J.O. Hamblen, T.S. Hall, and M.D. Furman, Rapid Prototyping of Digital Systems, New York: Springer, 2008. [12] uCLinux, “Embedded Linux / Microcontroller Project,” [online]. (Date: 2001). Available: http://www.uclinnux.org/ [13] S. Leibson and J. Kim, “Configurable processors: A new era in chip design,” Computer, vol. 38, (no. 7), pp. 51-59, 2005. [14] Sun VirtualBox, "Welcome to SunVirtualBoax",. Available: http://www.virtualbox.org/. [15] World Wide Web .Consortium (W3C), “CGI: Common Gateway Interface,” [online], (Date: 6th April 2009), Available http://www.w3.org/CGI/. [16] Ubuntu -Linux OS, Available: http://www.ubuntu.com/ [17] Open Cores, “OpenRISC Overview, ” [online], (Date 19th April 2009), Available: http://www.opencores.org/
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