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DEVELOPMENT of the CODE CONVERTER SYSTEM Uo - DEVELOPMENT OF THE CODE CONVERTER SYSTEM Uo > PROM PHOG1A MM£R ilM AUTO LOCK O • £ O C * £ C OUTPUT O n O O C C- C 4 ** 'N PU T *«***! ZERQ ill! READ CLtA* AOOH W»»1% ttti PHVSlCS OEPT UNI POO*** 60 CHAPTER- III DEVELOPMENT OF THE CODE CONVERTER SYSTEM Code converter is an interfacing element needed in between the data processor and the display element. The processed data may be coded in any one of the various codes described below and has to be converted into the format/s suitable for the display element, hence the code converters or decoders have almost become the heart of the display system. 3.1 DEFINATI0N5 OF BINARY CODES Binary number systsm offers only two states namely zero's and one's in contrast with decimal system which offers ten. The arithmetic operational techniques of the binary system follows directly from the decimal system and practically all the erithmetic of a digital computer are carried out in the binary system. As all the usual transactions are in the decimal systsm, reading a binary number display is not very convenient and generally consumes more time. This problem is overcome by the Binary Coded Decimal System (BCD) in which the decimal digits are directly coded in equivalent binary. Thus four bits as a quanta represent decimal digits, obviously the remaining six (1010 to 1111) binary states are forbidden in the BCD code, and when classified as a weighted code, it is known as 70 B421 or Natural code. After nine pulses the counter resets to zero producing a carry pulse. As any six out of sixteen states can be forbidden, there are a number of BCD codes. There are other weighted codes like 7421, 6311, 5421, 5311, 5211, 4211, 3321, 2421, 8421, 7421, and nonweighted codes like ' Two out of five ' code, Johnson code etc. used in various applications like azimth decoding, error detection etc., as each has specific characteristic advantages (2) . Hexadecimal is a four bit binary code obtained from straight binary with four sequential bits grouped together, starting from the least significant bit (L5B), the sixteen corresponding digits are 0,1, 9, A,B,C,D,E,F. The above described codes can only represent numeric data, and still very few allow easy arithmetic operation. Other codes had to be formulated since there are twenty six letters, ten numerals and few other symbols. A minimum set of six bits ( 6 bits « 2 , 64 symbols, maximum) is necessary. Depending upon the convenience of the user and requirement of the number of symbols to be represented codes have been formulated, EBCDIC - Extended Binary Coded Decimal Information Code, ASCII - American Standard Code of Information Interchange, BCDIC - Binary Coded Decimal Information Code, Baudot code, Hollerith Code, etc. are some of the numerous codes available Out of these ASCII is very widely used in microcomputers representing alphanumeric data, especially in the outputs of keyboard. Baudot and Hollerith are widely used codes in punch tapes and punch cards respectively. If the data acquired is in a code different than that used in the data processor and the display system, a code converter is evitable for interfacing. 3.2 CODE CONVERTERS In special cases where boolean equations can be established between input and output formats, code converters (4) can be hard wired using random logic . In case of a Nixie display or a seven segment display the corresponding equations for the cathodes or segments that should lit and the corresponding addresses at the inputs can be written out. Gates can be hard wired to satisfy these equetions and such circuits are known as decoders. Decoding can be accomplished using a diode matrix as shown in Fig.3.1. This can be called as a crude version of a mask programmable Read Only Memory described later. Information permanently stored in different locations can be addressed and the required conversion can be effected. 3.3 RAMs AND ROMs A general purpose data acquisition process may be subdivided into different stages as data acquisition, 72 t> i V w i o *-a• in t/i T/i r * ->~ m«— o x: " • QL c o o < ffi CD i~ O •a • o w i O o c a. o o -e L O O I 1 OD VWW1 -o sis •+um- < o cc o Z u. x AAAASAAAA$ cc <i 2 ' UJ oO I 6 6 6 6 6 6 0 6 6 **»! O — r« on processing and display. For storage a simple bistable flip-flop or a ferrite core or any device which offers two well distinguishable stable states can be used as a single bit memory. For storing a large data, scores of them will be needed and may be wired in many different ways, broadly into two, serial or random access. Shift registers belonq to the earlier category and Random Access Memories or RAKs as they are popularly abbreviated to the later* In a specific application like raster scan display, a row of characters has to be addressed over and over in which case shift registers are used to circulate the information as required but, as a general purpose storage shift registers are not suitable due to the serial access in which access time becomes a function of the location of the information stored. On the other hand random access memories offer the facility of reading and/or writing with the access time independent of the location. It is also possible to fabricate memories which are preprogrammed, a certain data is permanently stored in a particular location. Obviously such memories allow only read operation. For a specific address the preprogrammed data is presented at the output and as they offer 'Read Only* operation, they are known as Read Only Memories or ROMs. PROMs are Programmable Read Only Memories, can be programmed by the 7-i user but do not allow reprogramming,EPROMs, Erasable Programmable Read Only Memories, in which program can be erased by exposing the window of the IC to ultraviolet light allowing reprogramming. EAPROMs are the same as EPROMs but erasure is accomplished electrically* BAMs Ferrite cores, semiconductor and MOS RAMs are widely known as Random Access Memory and represent the progress of the technology. (5) The equare loop hysteresis property of the ferrite matey ua-L materials is used in core memories. Special square loop,can be used as memories, saturation in clockwise and anticlockwise direction corresponding to zero and one states. The saturation current is split up equally into X and Y drive lines enabling matrix addressing. The currents Xi and Yj can only saturate the core C.. and insufficient for the others. Writting and Reading is accomplished by inhibiting and sensing the sense winding. In the Read mode the XY current directions are reverse to that of the write mode, effectively reseting the core to zero. The magnetic field of the core in state one will change from point A to B (Fig.3.2.b) giving rise to a large change in flux which is sensed by the sense winding, on which appears a pulse of almost 35 to 50 mV height. But the magnetic field of the core in the zero state (point B) induces comparatively ?;> Mo Rf e*?M fSHSt •".: ?\IS:S*J ! «Hf fttri PtANr 1 - •. ittx NAM A SELECT* FTG.V3 CORE Nl£M0Ry ADDRESS SELECTION 76 2 ft; < (A X >- 9 9 O t a: < Inpu £ VWVVA — " TM1^ a 00 o I — Dat >- .o t ce o r o 2 c s < 2 LU e u it O >• cell l < o %i o ce E o Rectangula < arrangemen :* o o o a. _J •~-VWWV-*-MtV. CD r CD in rn a. i 6 O c O o U. o Demultiplexe t/1 i 77 negligible voltage of the order of 3.5 mV. These pulses can be digitised using biased eomparators/schmitt triggers. X and Y currents in the forward direction switch the selected core in to one state in the write mode. For writing zero an additional current I +/2 in magnitude is passed S3 X in the reverse direction through the sense winding inhibiting switching of the core over to one state. 5uch a matrix/plane can store n words X 1 bit data. For n X m bit data storage n such planes have to be used with common X and Y line address but different sense output as in Fig.3.3. Ferrite core memories need hundreds of miliamperes of current to go in saturation, the size goes on increasing with the capacity of the memory and core size and offer low speed in comparison to bipolar RAMs. The Read operation is destructive which necessarily requires Write operation after every Read operation, reducing effective speed of operation. Ferrite core RAMs are nonvoletile. The semiconductor RAM essentially consists of bistable multivibrators each being a single bit memory cell as shown in Fig.3.4. Sense, X select and Y select provide a low resistance to ground, effectively grounding the emitters and making the cell a simple flip-flop. In Read operation X select and Y select lines are held high and a current in the sense lead indicates zero level and no current indicates **1 - > one level. Fig.3.5 shows the block diagram of a bipolar RAM. Data can be written in to a memory via the 'data inputs' by supplying the address to 'select inputs' and providing low levels on the memory enable and write enable leads. Data can be read from any location of the memory by having write enable in 'one' condition and 'low' memory enable.
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