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CHAPTER- III
DEVELOPMENT OF THE CODE CONVERTER SYSTEM
Code converter is an interfacing element needed in between the data processor and the display element. The processed data may be coded in any one of the various codes described below and has to be converted into the format/s suitable for the display element, hence the code converters or decoders have almost become the heart of the display system. 3.1 DEFINATI0N5 OF BINARY CODES
Binary number systsm offers only two states namely zero's and one's in contrast with decimal system which offers ten. The arithmetic operational techniques of the binary system follows directly from the decimal system and practically all the erithmetic of a digital computer are carried out in the binary system. As all the usual transactions are in the decimal systsm, reading a binary number display is not very convenient and generally consumes more time. This problem is overcome by the Binary Coded Decimal System (BCD) in which the decimal digits are directly coded in equivalent binary. Thus four bits as a quanta represent decimal digits, obviously the remaining six (1010 to 1111) binary states are forbidden in the BCD code, and when classified as a weighted code, it is known as 70
B421 or Natural code. After nine pulses the counter resets to zero producing a carry pulse. As any six out of sixteen states can be forbidden, there are a number of BCD codes. There are other weighted codes like 7421, 6311, 5421, 5311, 5211, 4211, 3321, 2421, 8421, 7421, and nonweighted codes like ' Two out of five ' code, Johnson code etc. used in various applications like azimth decoding, error detection etc., as each has specific characteristic advantages (2) . Hexadecimal is a four bit binary code obtained from straight binary with four sequential bits grouped together, starting from the least significant bit (L5B), the sixteen corresponding digits are 0,1, 9, A,B,C,D,E,F. The above described codes can only represent numeric data, and still very few allow easy arithmetic operation. Other codes had to be formulated since there are twenty six letters, ten numerals and few other symbols. A minimum set of six bits ( 6 bits « 2 , 64 symbols, maximum) is necessary. Depending upon the convenience of the user and requirement of the number of symbols to be represented codes have been formulated, EBCDIC - Extended Binary Coded Decimal Information Code, ASCII - American Standard Code of Information Interchange, BCDIC - Binary Coded Decimal Information Code, Baudot code, Hollerith Code, etc. are some of the numerous codes available Out of these ASCII is very widely used in microcomputers representing alphanumeric data, especially in the outputs of keyboard. Baudot and Hollerith are widely used codes in punch tapes and punch cards respectively. If the data acquired is in a code different than that used in the data processor and the display system, a code converter is evitable for interfacing.
3.2 CODE CONVERTERS
In special cases where boolean equations can be established between input and output formats, code converters (4) can be hard wired using random logic . In case of a Nixie display or a seven segment display the corresponding equations for the cathodes or segments that should lit and the corresponding addresses at the inputs can be written out. Gates can be hard wired to satisfy these equetions and such circuits are known as decoders. Decoding can be accomplished using a diode matrix as shown in Fig.3.1. This can be called as a crude version of a mask programmable Read Only Memory described later. Information permanently stored in different locations can be addressed and the required conversion can be effected.
3.3 RAMs AND ROMs A general purpose data acquisition process may be subdivided into different stages as data acquisition, 72
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into two, serial or random access. Shift registers belonq
to the earlier category and Random Access Memories or RAKs as they are popularly abbreviated to the later*
In a specific application like raster scan display,
a row of characters has to be addressed over and over in
which case shift registers are used to circulate the
information as required but, as a general purpose storage
shift registers are not suitable due to the serial access
in which access time becomes a function of the location of
the information stored. On the other hand random access
memories offer the facility of reading and/or writing with
the access time independent of the location. It is also
possible to fabricate memories which are preprogrammed,
a certain data is permanently stored in a particular
location. Obviously such memories allow only read operation.
For a specific address the preprogrammed data is presented
at the output and as they offer 'Read Only* operation, they
are known as Read Only Memories or ROMs. PROMs are
Programmable Read Only Memories, can be programmed by the 7-i
user but do not allow reprogramming,EPROMs, Erasable
Programmable Read Only Memories, in which program can be
erased by exposing the window of the IC to ultraviolet light
allowing reprogramming. EAPROMs are the same as EPROMs but erasure is accomplished electrically*
BAMs Ferrite cores, semiconductor and MOS RAMs are widely
known as Random Access Memory and represent the progress of
the technology. (5) The equare loop hysteresis property of the ferrite matey ua-L materials is used in core memories. Special square loop,can
be used as memories, saturation in clockwise and
anticlockwise direction corresponding to zero and one states.
The saturation current is split up equally into X and Y
drive lines enabling matrix addressing. The currents Xi
and Yj can only saturate the core C.. and insufficient for
the others. Writting and Reading is accomplished by
inhibiting and sensing the sense winding. In the Read mode
the XY current directions are reverse to that of the write
mode, effectively reseting the core to zero. The magnetic
field of the core in state one will change from point A to B
(Fig.3.2.b) giving rise to a large change in flux which is
sensed by the sense winding, on which appears a pulse of
almost 35 to 50 mV height. But the magnetic field of the
core in the zero state (point B) induces comparatively ?;>
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FTG.V3 CORE Nl£M0Ry ADDRESS SELECTION 76
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t/1 i 77 negligible voltage of the order of 3.5 mV. These pulses can be digitised using biased eomparators/schmitt triggers.
X and Y currents in the forward direction switch the
selected core in to one state in the write mode. For writing
zero an additional current I +/2 in magnitude is passed S3 X in the reverse direction through the sense winding inhibiting
switching of the core over to one state. 5uch a matrix/plane can store n words X 1 bit data. For n X m bit data storage
n such planes have to be used with common X and Y line
address but different sense output as in Fig.3.3. Ferrite
core memories need hundreds of miliamperes of current to
go in saturation, the size goes on increasing with the
capacity of the memory and core size and offer low speed
in comparison to bipolar RAMs. The Read operation is
destructive which necessarily requires Write operation after
every Read operation, reducing effective speed of operation.
Ferrite core RAMs are nonvoletile.
The semiconductor RAM essentially consists of bistable
multivibrators each being a single bit memory cell as shown
in Fig.3.4. Sense, X select and Y select provide a low
resistance to ground, effectively grounding the emitters
and making the cell a simple flip-flop. In Read operation
X select and Y select lines are held high and a current in
the sense lead indicates zero level and no current indicates **1 - >
one level. Fig.3.5 shows the block diagram of a bipolar RAM. Data can be written in to a memory via the 'data inputs' by supplying the address to 'select inputs' and providing low levels on the memory enable and write enable leads. Data can be read from any location of the memory by having write enable in 'one' condition and 'low' memory enable. Semiconductor RAM chips also need tens of miliamperes of current for their operation, the dissipation of power causes local heating restricting the packaging density. The speed offered by semiconductor RAMs is very high, 50 ns but they are voletile.
There are two types of M05 RAMs, static and dynamic as shown in Fig.3.6. Transistors T. and T_ serve as storage elements, while T,, and T, connect or isolate a given cell from the sense bit lines. The word select line controls the on-off condition of T,- and T,. To write or read this cell, a particular column select line and a particular word select line are enabled, selecting the cell. In the read operation, a current will or will not be sensed by the sense amplifier after cell selection. During the write operation, a low level is set on one out of the two bit lines, the other being held high. At this time T, or T- will turn on and the other transistor of the pair will turn off and the memory state will be locked in 70
at the completion of the write operation. When the word select line is returned to V , stable states exist ss unless purposely disturbed,the static cell is latched and does not require a refresh operation. But the need of six transistors per cell for its operation restricts a large capacity memory device. The dynamic memory cell consists only of a single transistor and a capacitor.
Data are written by charging or not charging the condenser, depending upon the data. By sensing presence or absence of charge* data may be read out. Slow junction leakage in the transistor insists on periodic refreshing to keep the data valid. The refresh period is typically
2 ms. The typical characteristics of MOS RAMs are fairly high packaging density, low power consumption and moderate speed. Such impressive characteristics along with the surprisingly less number of steps involved in p channel MOS processing allows low cost production.
MOS RAMs are very widely used as a supporting storage.
ROMs The development chain of read only memories thus fair has been ROMs, PROMs, EPRGRs, and now EPROMs. The mask (3) programmable read only memory was the first phase of
ROM development. A chart is prepared by jotting down
1 the should be available1 data against the addresses/ locations. A mask is prepared such that 'zeros' and
•ones* of data in corresponding cell location are mapped 80
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! O/P BUFFERS — cs I Floating silicon gale 4 2 04 8 BIT ROM k-Prc ! MATRIX 256 x 8 1 4 ! 0 ECODER
I/P DRIVERS t t f b type silicon substrotc AQAr- -A,
Ca)Biock diagram ol 256x8, (b)Cross section of FAMOS 2K Eprom
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as floating or biased base/gate of the transistor respectively. Hence when the cell is addressed, a current flows through the biased transistor indicating 'one' state and conversly. ROMs are custom made and unsuitable for small scale production. To increase flexibility fusible link ROMs were introduced which can be programmed by the user. The base/gate biasing connections can be fused by applying a high voltage pulse. It is evident from the programming principle that the ROM cannot be reprogrammed much less not even a single error in programming can be tolerated. Such fusible link ROMs are known as Programmable Read Only Memories (PROMs) the basic structure is illustrated in Fig.3.7. The next phase of development being the EPROMs (9),
(1971)p Electrically Programmable Read Only Memories. Floating avalanche MOS technology is used in fabrication of EPROMs. These are erasable by ultraviolet light and, therefore, electrically reprogrammable and can be used over and over. Due to these facilities EPROMs have become popular and are used with microcomputers , as reprogramming allows the same microcomputer to be used for different applications. A variety of applications are coming up of
EPROMs. Fig.3.8 gives the block diagram of 256 X 8,
2k EPROM and the device structure. This is essentially 8;^
a P channel MOS FET with its gate floating. The floating polysilicon gate i3 isolated from the n type silicon substrate by SiO_ layer of about 1000 ft and from the top surface about 10 micron of vapour deposited oxide. The operation of the FAMOS depends on 'charge transport* to the floating gate by avalanche injection of electrons from the p-n junction avalanche region to the floating silicon gate. A high voltage program pulse applied across the junction of a p channel FAMOS device with 1000 R of oxide layer and 5-8 ohm cm substrate resistivity results in the onset of injection of high energy electrons from the p-n junction surface avalanche region to the floating
silicon gate. The gate charging current is of the order of 10— 7 Amp/cm 2 . Since the silicon gate is floating, the electron current through the oxide results in the accumulation of negative charge on the gate. For a P channel FAM05 transistor* this negative charge will induce a conductive inversion layer in between source and drain. The amount of charge transferred to the floating gate is a function of the amplitude and duration of the applied junction voltage. EAPROf/10* (1977), Electrically Alterable ROM is the latest version of PROM in which one transistor cell with floating gate is employed with stacked gate structure, where floating gate covers only one part of the 8 a
channel and is extended to an erase overlap of the source diffusion region of the channel. The remarkable feature of EAPROM is that more than 90% of the stored charge is expected to be retained over a period of 100 years and can be reprogrammed more than 10,000 times. A continuous improvement is going on in EAPROMs so as to erase a single word, to reduce number of power supplies needed, to increase the capacity of the memory and to increase the speed of operation.
3.4 CHARACTER GENERATORS FOR A DOT MATRIX
In digital data systems alphanumerals are displayed by dot matrix. In raster scan displays, the position and speed of the beam is fixed, only part of the information is displayed at a time. To display a complete character, the information has to be programmed as per requirement.
If the matrix size is 8 X 8 the three bit control lines for Y position are used.
3.5 DEVELOPMENT OF EPROM PROGRAMMER
A universal programmer is essentially a software controlled, microprocessor monitored system. Such a system needs an already developed dedicated microprocessor system.
Due to unavoidability of such a system and secondly the programmer itself was to support a development system it had 84
to be of hardware type. Since Intel's 2708 family offered the most simple programming procedure, the programmer had been designed for the same. The TTL compatibility in the read and write modes allow straight forward interfacing. The EPROMs are 'loop programmable* and programming is accomplished in ths following steps. 1) Set the address and corresponding 'should be available data' at the address and data out pins respectively. 2) Apply a program pulse. 3) Repeat steps 1 and 2 sequentially first from 0 to 512 or 1024 location as the case may be. This is termed as a program loop. 4) Repeat 1,2 and 3 N times effectively executing N program loops. Since it is not permissible to program a single address repeatedly the data to be programmed has to be stored in RAMs. The program pulse width may range anywhere between 0.1 to 1 ma in case of 2708 family, the minimum number of program loops needed is given by
It X tpw - 100 ms(ll). Thus even for maximum tpw » 1 ms, the corresponding 8<>
minimum number of loops needed are hundred, implies that the data which is seldom related to the address in the general way is to be set over and overt The presence or absence of charge can be sensed by measuring the conductance between the source and drain regions. Once the applied junction voltage is removed, no discharge path is available for the accumulated electrons since the gate is surrounded by thermal oxide, a low conductivity dielectric. The electric field in the structure after removal of junction voltage is due only to the accumulated charges and is not sufficient to cause charge transport across the polysilicon thermal oxide energy barrier. It is not advisible to apply N pulses repeatedly to achieve sufficient charge to define a state at a time to avoid local heating due to sustained avalanche which may distroy the structure. The above consideration can be formulated as
N - tpw X T where tpw is the program pulse width and T is defined by the manufacturer. The maximum stored charge of 12 2 4 X 10 electrons/cm results in electric field of approximately 2 X 10 V/cm across thermal oxide. The leakage current is of the order of 10-4 0 Amp, therefore, once stored charge remains for 10-12 years and hence the programs. 8*i
The EPRQMs are ultraviolet source erasable. 5i0_ is sensitive to ultraviolet source by which charge carriers are generated and conductive path is produced between source and drain which discharges the condenser* The first phase of the data storage being the manual setting of the data and corresponding address. During second phase data is read out from the RAMs and presented to the PROM and predetermined program loops are executed corresponding to tpw.
3.5.1 Description of the System
The programming process is divided into two parts, storing the data to be programmed and actual programming. For storage, 8 MM 2102 (1 k X 1 bit) static RAMs are used to give a total capacity of one kilo byte to suit the EPROM configuration. The ten bit address is generated in a binary counter, contents of which are displayed in octal form by three seven segment displays. The address can be incremented either manually or by a clock(C) with adjustable frequency. An eight bit 'program loop* counter, constructed out of 7493, a four bit binary counter and 7490, a decade counter, is associated to the address register* Eight toggle switches provide data to be programmed and is displayed by green LEDs. 87
Output data is displayed by red LEDs. Timings required for Read and Write operations of the Memories and program operation of EPROf-' are generated by 74123, monostable multivibrator.
3.5.2 Working of the System
Two modes of working of the programmer are shown in the flow chart in Fig.3.10. For storing the data to be programmed address and data is set manually, using a microswitch and toggle switches respectively. Data is enabled by 'Write' switch which allows writing timings to be generated by the clock and monostable multivibrators (MMV 1,2,3 of Fig.3.11). When 'Read' switch is pressed, timings for read operation of the memory are generated.
i (MMV 4,5,6 of Fig.3.11). If the input and output data are equal then address is incremented to store corresponding data to be programmed. For 'Programming* operation, power supplies are made ON as per requirement of an 'EPROM' and clock C is used to 'Read' the data from the memory incrementing the address register. A maximum of 160 program loops corresponding to program pulse width of 0.8 ms are executed, counted in a program loop counter. An RS flip-flop is controlled by the program counter which stops the clock after 160 loops. 8<>
Thus the programmer can be used for variety of applications* to program lookup tables* to store instructions of a program/s and to calculate wind chill index (12) from weather data index. The Intel's 2704 chip was programmed using the programmer and used in CRT display terminal for our devoted microcomputer system.
3.5.3 Data Programmed for Character Generators
The table shows the address and data to be programmed to get character generators. 88 Data Vc
^JLzQii TIME SEQUENCE X DELAY H DELAY "m CLEAR -~c -!A ADDRESS REGISTER L •• I
Clock disable bU
FLOWCHART OF EPROM PROGRAMMER
! START •#4 CLEAR THE MEM-ADR- REG I ENABLE POWER CLEAR MEMORY ADR- REG- S U PPLIES FOIR EPROM rSE T THE ADRESS h* O, N SET THf A DRESS n * o j NXito
JSL SITf THE .DATA Jd READ THE DATA CORRESPONDING To n FROM RAMS
; ENABLE THE DATA TO THE [ENABLE TTTE PROS RAM INPUT OF RAMS [PULSE ^ CHIP ENABLE £ WWE THE DATA INTO THE RAMS I DISABLE THE CLOCK READ THE DATTA t> JUST STORED IN THE RAMS h ti 1t TAKE CHIP ENABLE * PROGRAM INPUT TO Z6RO
ir DISABLE OUTPUT OF THE RAMS
V CLEAR THE ADRES5 REGISTER . I . - SET THE ADRESS- TV 0 , N 1
READ THE OUTPUT OF EPROM
ERASE THE EPROM 9i
Character Address Data to be programmed A ~ m /i*?/| *T** 13/2 *1_ 0 " [ °J_°6 °5_°4 °3_°2 °ij£
000001000 00010000 001 00101000 010 01000100 A Oil 01000100 100 01111100 101 01000100 110 01000100 111 01000100
000010000 02111110 001 10000100 010 10000100 B Oil 10000100 100 01111100 101 10000100 110 10000100 111 01111110
000011000 01111100 001 10000010 010 00000010 c 011 00000010 100 00000010 101 00000010 110 10000010 111 01111100 9^
Character Address Data to be programmed
A8 A7 A6 A5 A4 A3 A2 Al A0 °7 °6 °5 °4 °3 °2 °1 °0
0 0 10 0 0 0 0 0 1 1 1 1 1 1 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 1 0 0 1 0 1 1 0 0 0 0 1 0 0 1 1 0 1 0 0 0 0 1 0 0 1 1 1 0 1 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 1 1 I I 1 0
0 0 1 0 0 0 0 0 0 1 0
0 1 0 0 0 0 0 0 0 1 0
0 1 1 0 0 1 1 1 1 1 0
1 0 0 0 0 0 0 0 0 1 0
1 0 1 0 0 0 0 0 0 1 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 1 1 1 1 1 1 1 0
n 0 1 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 1 1 0 0 1 1 1 1 1 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 1 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 1 9a
Character Address Data to be programmed
A8 A7 A6 A5 A4 A3 A2 Al A0 °7 °6 °5 D4 °3 °2 °1 °0 D 0 0 0 0 1 1 1 1 1 1 1 0
0 0 1 0 0 0 0 0 0 1 0
0 1 0 0 0 0 0 0 a 1 0
0 1 1 0 0 0 0 0 Q 1 0
1 0 0 0 1 1 1 1 0 1 0 1 0 1 0 a 1 0 0 0 1 0 1 1 0 0 0 1 0 0 0 1 0
1 1 1 0 0 1 1 1 1 1 0
0 0 1 0 0 0 0 1 0 0 0 0 0 1 0
0 0 1 1 0 0 0 0 0 1 0
0 1 0 1 0 0 0 0 0 1 0
H a 1 1 1 1 1 1 1 1 1 0 1 0 a 1 Q 0 0 a 0 1 0 1 0 l 1 0 0 0 0 0 1 0
1 1 0 1 0 • 0 0 0 1 0
1 1 1 1 0 0 0 0 0 1 0
0 0 10 0 1 0 0 0 0 0 1 1 1 0 0 0
0 0 1 0 0 0 1 0 0 0 0
0 1 0 0 0 0 1 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 1 0 0 0 0
1 0 1 0 0 0 1 0 0 0 0
1 1 0 0 0 0 1 0 0 0 0
1 1 1 a 0 1 1 1 0 0 0 l3'i
Charactex Address 2a£a„*£ ba^prograwwad !."" "A VS* VA V/i VS* I ] \ h'/i °5?f °3-°s Vs Q010100Q0 01110000 001 00100000 010 00100000 J Oil 00100000 100 00100000 101 00100100 110 00100100 111 00011000 001011000 00100010 001 00010010 010 00001010 K Oil 00000110 100 00001010 101 00010010 110 00100010 111 01000010
001100000 00000010 001 00000010 010 00000010 L Oil 00000010 100 00000010 101 00000010 110 00000010 111 11111100 Character Address Date to be programmed A A A A8" ? V 5 V*~3 V I *0 °7 V°; V°3 °2"°I V 001101000 10000010 001 11000110 010 10101010 « oil lnoiooio 100 10010010 101 10000010 110 10000010 111 10000010 001110000 10000010 001 10000110 010 10001010 N Oil 10010010 100 10100010 101 11000010 110 10000010 111 1000001 0 001111000 01111100 001 01000100 010 01000100 0 Oil 01000100 100 01000100 101 01000100 110 01000100 111 01111100 9G
Character Address Data to be programmed
A A A A A A A ^ A fl 7 g 5 4 3 2 1 Q °7 °6 °5 °4 °3 °2 °1 °0
0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0
0 0 1 1 0 0 0 0 0 1 0
0 1 0 1 0 0 0 0 0 1 0
0 1 1 1 0 0 D 0 Q 1 0
1 0 0 a 1 1 1 1 1 1 0
1 0 1 0 0 0 0 0 0 1 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 Q 0 0 0 0 1 0
0 0 0 0 0 0 1 1 1 1 1 0 0
0 0 1 1 0 0 0 0 0 1 0
0 1 0 1 0 0 0 0 0 1 0
0 1 1 1 0 0 0 0 0 1 Q
1 0 0 1 0 0 0 0 0 1 0
1 0 1 1 0 1 0 0 0 1 0
1 1 0 0 1 1 1 1 1 1 0
1 1 1 1 0 0 0 0 0 0 0
0 10 0 0 0 0 0 1 1 1 1 1 1 0
0 D 1 1 0 0 0 0 0 1 0
Q 1 0 1 0 0 a 0 0 1 0
0 1 1 1 0 0 D 0 0 1 0
1 D 0 0 1 1 1 1 1 1 0
1 0 1 0 0 0 1 0 0 1 0
1 1 0 0 0 1 0 0 a 1 0
1 1 1 0 1 0 0 0 0 1 0 97
Character Address Data to be programmed
AQ A7 Afi A5 A4 A3 A2 A± AQ 0? 0fi 0,. 0< 03 ^ 0X 0Q
01001100D 01111100 001 10000010 010 00000010 S Oil 01111110 100 10000000 101 10000000 110 10000010 111 01111100
010100000 01111100 001 10010010 010 00010000 T Oil 00010000 100 00010000 101 00010000 110 00010000 111 00010000
010101000 10000010 001 10000010 010 10000010 U Oil 10000010 100 10000010 101 10000010 110 10000010 111 01111100 98
Character Address Data ta be programmed
A h A A A 5 A8" 7 V l *«" 3 *V 1 0 °7 iX °4 °3 °2 °1 °0
010110000 10000010 001 10000010 010 10000010 V Oil 10000010 100 01000100 101 01000100 110 00101000 111 00010000
010111000 10000010 001 10000010 010 10000010 W Oil 10010010 100 10010010 101 10101010 110 11000110 111 10000010
011000000 01000001 001 00100010 010 00010100 X Oil 00001000 100 00010100 101 00100010 110 01000001 111 00000000 99
Character Address Date to be programmed
A8 A7 A6 A5 A4 A3 A2 Al A° °7 °6 °5 °4 °3 °2 °1 °0
0 110 0 1 0 0 0 1 0 0 0 0 0 1 0
0 0 1 1 0 0 0 0 0 1 0
0 1 0 0 1 0 0 0 1 0 0
0 1 1 0 0 1 0 1 0 0 0
1 D 0 0 0 0 1 0 0 0 0
1 0 1 0 0 0 1 0 0 0 0
1 1 0 0 0 0 1 0 0 0 0
1 1 1 0 0 0 1 0 0 0 0
0 110 0 0 0 1 1 1 1 1 1 1 0
0 0 1 0 1 0 0 0 0 0 0
0 1 G a 0 1 0 0 D a 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 a
1 1 0 0 0 0 0 0 0 1 0
1 1 1 1 1 1 1 1 1 1 0
0 110 11 0 0 0 0 0 1 1 1 1 0 0
0 0 1 0 n 0 0 0 1 0 0
0 1 D 0 0 0 0 0 1 0 0
0 1 1 0 0 0 0 0 1 0 0
1 0 0 0 0 0 0 0 1 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 1 0 0
1 1 1 a 0 1 1 1 1 0 0 iOU
Character Address Data to be programmed
A A A A A A A A A V 7 6 5 4 3 2" 1 0 " "°7 °6"°5 **\ °2 °1 °0
011100000 00000010 001 00000010 010 00000100 Oil 00001000 100 00010000 101 00100000 110 01000000 111 01000000
011101000 00111100 001 00100000 010 00100000 1 Oil 00100000 100 00100000 101 0010, 0000 110 00100000 111 00111100
011110000 00010000 001 00111000 010 01010100 f Oil 00010000 100 00010000 101 00010000 110 00010000 111 00010000