ECE 274 - Digital Logic Lecture 22 Full-Custom Integrated Circuit

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ECE 274 - Digital Logic Lecture 22 Full-Custom Integrated Circuit ECE 274 - Digital Logic Lecture 22 Full-Custom Integrated Circuit Full-Custom Integrated Circuit Chip created specifically to implement the transistors of the desired chip Lecture 22 – Implementation Layout – detailed description how each transistor and wires should be Manufactured IC Technologies layed on a chips surface Typically use CAD tools to convert our circuit design to a custom layout Fabricating an IC is often referred to a silicon spin 1 2 Semicustom (Application Specific) Integrated Full-Custom Integrated Circuit Circuits - ASICs Full-Custom Integrated Circuit Gate Arrays Pros Utilize a chip whose transistors are pre-designed to forms rows (arrays) of logic gates on the chip Maximum performance Sometimes referred to as sea-of-gates Cons Pros High NRE (Non-Recurring Engineering) cost Much cheaper than full-custom IC Cost of setting of the fabrication of an IC Fabrications time is typically several weeks Often exceeds $1 million Cons May take months before first IC is available Less optimized compared to full-custom IC - Slower performance, bigger size, and more power consumption 3 4 Semicustom (Application Specific) Integrated Semicustom (Application Specific) Integrated Circuits - ASICs Circuits - ASICs Standard Cells Cell Array Utilize library of pre-layed-out gates and smaller pieces of logic (cells) Standard cells are replaced on the IC with only the wiring left to be that a designer must instantiate and connect with wires completed Pros Sometimes referred to as sea of cells Can be better optimized than gate-array Longer to design then gate-array Structured ASIC Cons Less optimized compared to full-custom IC Popular term describing ASICs whose gates or cells have been Less NRE and fabrication time than full-custom IC preplaced More expensive than gate-array 5 6 Semicustom (Application Specific) Integrated Semicustom (Application Specific) Integrated Circuits - ASICs Circuits - ASICs Implementing Circuits Using only NAND Gates Implementing Circuits Using only NAND Gates NAND gate is a universal gate Implementing an AND gate using a NAND gate Universal gate – Logic gate that can implement any Boolean function using gates of that one type only Implementing a NOT gate using a NAND gate Implementing an OR gate using a NAND gate 7 8 Semicustom (Application Specific) Integrated Circuits - ASICs Programmable ICs Implementing Circuits Using only NAND Gates FPGAs – Field Programmable Gate Arrays Implementing a half-adder using only NAND gates Prefabricated ICs that contain all of the transistors and wires Designer can program the FPGA to implement our desried circuit Programming refers to downloading a series of bits to the FPGA’s memory Fast - Progamming typically takes seconds to minutes 9 10 FPGAs – Field Programmable Gate Arrays Design Challenge Lookup Tables Design Challenge Memory used to implement a combinational circuit Draw a circuit using AND, OR and NOT gates for the function F(a,b,c) = N A 1-bit wide memory with N address lines (2 words) can implement a’bc + abc’. Convert that circuit into using NAND gates only. any Boolean combinational function of N variables Due: Next Lecture (Friday, December 2) Extra Credit (Homework) 2 points 11 12.
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