ECE 274 - Digital Logic Lecture 22 Full-Custom Integrated Circuit
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GS40 0.11-Μm CMOS Standard Cell/Gate Array
GS40 0.11-µm CMOS Standard Cell/Gate Array Version 1.0 January 29, 2001 Copyright Texas Instruments Incorporated, 2001 The information and/or drawings set forth in this document and all rights in and to inventions disclosed herein and patents which might be granted thereon disclosing or employing the materials, methods, techniques, or apparatus described herein are the exclusive property of Texas Instruments. No disclosure of information or drawings shall be made to any other person or organization without the prior consent of Texas Instruments. IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this war- ranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (“Critical Applications”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WAR- RANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. -
Introduction to ASIC Design
’14EC770 : ASIC DESIGN’ An Introduction Application - Specific Integrated Circuit Dr.K.Kalyani AP, ECE, TCE. 1 VLSI COMPANIES IN INDIA • Motorola India – IC design center • Texas Instruments – IC design center in Bangalore • VLSI India – ASIC design and FPGA services • VLSI Software – Design of electronic design automation tools • Microchip Technology – Offers VLSI CMOS semiconductor components for embedded systems • Delsoft – Electronic design automation, digital video technology and VLSI design services • Horizon Semiconductors – ASIC, VLSI and IC design training • Bit Mapper – Design, development & training • Calorex Institute of Technology – Courses in VLSI chip design, DSP and Verilog HDL • ControlNet India – VLSI design, network monitoring products and services • E Infochips – ASIC chip design, embedded systems and software development • EDAIndia – Resource on VLSI design centres and tutorials • Cypress Semiconductor – US semiconductor major Cypress has set up a VLSI development center in Bangalore • VDAT 2000 – Info on VLSI design and test workshops 2 VLSI COMPANIES IN INDIA • Sandeepani – VLSI design training courses • Sanyo LSI Technology – Semiconductor design centre of Sanyo Electronics • Semiconductor Complex – Manufacturer of microelectronics equipment like VLSIs & VLSI based systems & sub systems • Sequence Design – Provider of electronic design automation tools • Trident Techlabs – Power systems analysis software and electrical machine design services • VEDA IIT – Offers courses & training in VLSI design & development • Zensonet Technologies – VLSI IC design firm eg3.com – Useful links for the design engineer • Analog Devices India Product Development Center – Designs DSPs in Bangalore • CG-CoreEl Programmable Solutions – Design services in telecommunications, networking and DSP 3 Physical Design, CAD Tools. • SiCore Systems Pvt. Ltd. 161, Greams Road, ... • Silicon Automation Systems (India) Pvt. Ltd. ( SASI) ... • Tata Elxsi Ltd. -
Full-Custom Ics Standard-Cell-Based
Full-Custom ICs Design a chip from scratch. Engineers design some or all of the logic cells, circuits, and the chip layout specifi- cally for a full-custom IC. Custom mask layers are created in order to fabricate a full-custom IC. Advantages: complete flexibility, high degree of optimization in performance and area. Disadvantages: large amount of design effort, expensive. 1 Standard-Cell-Based ICs Use predesigned, pretested and precharacterized logic cells from standard-cell li- brary as building blocks. The chip layout (defining the location of the building blocks and wiring between them) is customized. As in full-custom design, all mask layers need to be customized to fabricate a new chip. Advantages: save design time and money, reduce risk compared to full-custom design. Disadvantages: still incurs high non-recurring-engineering (NRE) cost and long manufacture time. 2 D A B C A B B D C D A A B B Cell A Cell B Cell C Cell D Feedthrough Cell Standard-cell-based IC design. 3 Gate-Array Parts of the chip are pre-fabricated, and other parts are custom fabricated for a particular customer’s circuit. Idential base cells are pre-fabricated in the form of a 2-D array on a gate-array (this partially finished chip is called gate-array template). The wires between the transistors inside the cells and between the cells are custom fabricated for each customer. Custom masks are made for the wiring only. Advantages: cost saving (fabrication cost of a large number of identical template wafers is amortized over different customers), shorter manufacture lead time. -
Application-Specific Integrated Circuits”, Addison- Wesley, ISBN 0-201-50022-1, 1997
Introduction to Digital Integrated Circuit Design Konstantinos Masselos Department of Electrical & Electronic Engineering Imperial College London URL: http://cas.ee.ic.ac.uk/~kostas E-mail: [email protected] Introduction & Trends Introduction to Digital Integrated Circuit Design Lecture 1 - 1 Aims and Objectives The aim of this course is to introduce the basics of digital integrated circuits design. After following this course you will be able to: • Comprehend the different issues related to the development of digital integrated circuits including fabrication, circuit design, implementation methodologies, testing, design methodologies and tools and future trends. • Use tools covering the back-end design stages of digital integrated circuits. Introduction & Trends Introduction to Digital Integrated Circuit Design Lecture 1 - 2 Course Outline Week Lectures Laboratory/Project 1 Introduction and Trends 2 Basic MOS Theory, SPICE Simulation, CMOS Fabrication Learning Electric & SPICE simulation 3 Inverters and Combinational Logic Learning Layout with Electric 4 Sequential Circuits Switch-level simulation with IRSIM 5 Timing and Interconnect Issues Finishing the previous labs 6 Data Path Circuits Design Project 7 Memory and Array Circuits Design Project 8 Low Power Design Design Project Package, Power and I/O 9 Design for Test Design Project 10 Design Methodologies and Tools Design Project Introduction & Trends Introduction to Digital Integrated Circuit Design Lecture 1 - 3 Recommended Books N. H. E. Weste and D. Harris, “CMOS VLSI Design: A Circuits and Systems Perspective”, 3rd Edition, Addison-Wesley, ISBN 0-321- 14901-7, May 2004. J. Rabaey, A. Chandrakasan, B. Nikolic, “Digital Integrated Circuits: A Design Perspective” 2nd Edition, Prentice Hall, ISBN 0131207644, January 2003. -
Section 5 ASIC Cost Effectiveness
5 ASIC COST EFFECTIVENESS INTRODUCTION When making most decisions, there are numerous pros and cons that must be weighed in order to make an intelligent choice. This is especially true when an IC user considers the advantages and disadvantages of ASIC devices (Figure 5-1). STANDARD ICs Pros Cons •Low cost •Not optimized for each system •Off-the-shelf availability •More difficult system product differentiation •Proven reliability (fully tested) •Inefficient use of board space •Multiple sources (usually) ASICs Pros Cons •Efficiency of the ASIC for optimizing system •High unit cost of IC performance •IC user pays for IC design •Efficient use of board space •Potential for design failure •Performance (speed) enhanced (usually by •Most vendors single-source ASICs replacing numerous standard ICs with a •System house needs internal IC design and single ASIC) test expertise •Long leadtimes (not including PLDs/FPGAs) Source: ICE, "ASIC 1997" 17660 Figure 5-1. Pros and Cons of Standard ICs and ASICs In comparison to ASICs, the advantages of standard devices can be summed up in one phrase –– ease-of-use. For standard ICs the cost structures are easily identified and the IC manufacturer can supply the standard IC user with fairly specific availability and reliability information. Moreover, in most cases, if the standard IC user does not like the way a vendor is treating him, it takes little effort to patronize other companies that make identical parts and that will better serve the user’s needs. The major problem with standard ICs that helped begin the move to using ASIC devices was that stan- dard parts were not optimized for each individual system’s specifications. -
Introduction to Embedded System Design Using Field Programmable Gate Arrays Rahul Dubey
Introduction to Embedded System Design Using Field Programmable Gate Arrays Rahul Dubey Introduction to Embedded System Design Using Field Programmable Gate Arrays 123 Rahul Dubey, PhD Dhirubhai Ambani Institute of Information and Communication Technology (DA-IICT) Gandhinagar 382007 Gujarat India ISBN 978-1-84882-015-9 e-ISBN 978-1-84882-016-6 DOI 10.1007/978-1-84882-016-6 A catalogue record for this book is available from the British Library Library of Congress Control Number: 2008939445 © 2009 Springer-Verlag London Limited ChipScope™, MicroBlaze™, PicoBlaze™, ISE™, Spartan™ and the Xilinx logo, are trademarks or registered trademarks of Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124-3400, USA. http://www.xilinx.com Cyclone®, Nios®, Quartus® and SignalTap® are registered trademarks of Altera Corporation, 101 Innovation Drive, San Jose, CA 95134, USA. http://www.altera.com Modbus® is a registered trademark of Schneider Electric SA, 43-45, boulevard Franklin-Roosevelt, 92505 Rueil-Malmaison Cedex, France. http://www.schneider-electric.com Fusion® is a registered trademark of Actel Corporation, 2061 Stierlin Ct., Mountain View, CA 94043, USA. http://www.actel.com Excel® is a registered trademark of Microsoft Corporation, One Microsoft Way, Redmond, WA 98052- 6399, USA. http://www.microsoft.com MATLAB® and Simulink® are registered trademarks of The MathWorks, Inc., 3 Apple Hill Drive, Natick, MA 01760-2098, USA. http://www.mathworks.com Apart from any fair dealing for the purposes of research or private study, or criticism or review, as permitted under the Copyright, Designs and Patents Act 1988, this publication may only be reproduced, stored or transmitted, in any form or by any means, with the prior permission in writing of the publishers, or in the case of reprographic reproduction in accordance with the terms of licences issued by the Copyright Licensing Agency. -