DOCSLIB.ORG

MICROCONTROLADORES 1 Curso Técnico Eletrônica Prof

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
MICROCONTROLADORES 1 Curso Técnico Eletrônica Prof MICROCONTROLADORES 1 Curso Técnico Eletrônica Prof. Fábio Kurt Schneider AVALIAÇÃO Nota 1: APS = 20% (Projeto de Sistemas Microcontrolados) EXERCÍCIOS ASSEMBLY = 10% (ASSEMBLY) AVALIAÇÃO TEÓRICA/PRÁTICA = 70% (ARQUITETURA INTERNA E ASSEMBLY) Nota 2: Função otimizada em ASSEMBLY = 20% (ALTO DESEMPENHO) LABORATÓRIOS = 40% PROJETO FINAL = 40% • PROGRAMAÇÃO E CONTEÚDOS DAS AULAS (PREVISÃO) PROGRAMAÇÃO E CONTEÚDOS DAS AULAS (PREVISÃO) Dia/Mês ou Número de Conteúdo das Aulas Semana Aulas Informações da disciplina e avaliação Definição da APS Introdução a microcontrolador genérico 08-09/08/17 3 - Sistema microprocessado típico; Microprocessador hipotético: barramentos de dados, endereços, e controle, ULA, registros internos, PC, SP, Acc; Microcontrolador vs.microprocessador; Principais famílias de microcontroladores; Microcontrolador específico - Arquitetura interna ATMEGA328. - Descrição dos pinos; Organização de memória; Memória SRAM interna de dados; Memória 15-16/08/17 3 SRAM interna de uso específico; Acesso à memória externa; Interrupção, Temporizadores, ADC Ferramentas de Desenvolvimento de Sistemas Microcontrolados Algoritmos 22-23/08/17 Instruções Lógicas e Aritméticas , Instruções de Controle de Fluxo, Exemplos em assembly com o 3 uControlador específico Instruções Assembly e exemplos: controle de fluxo, laços, escrita e leitura em memória, controle 29-30/08/17 3 periféricos.... Instruções Assembly e exemplos: controle de fluxo, laços, escrita e leitura em memória, controle 05-06/09/17 3 periféricos.... 12-13/09/17 Simulação 3 Entrega E AVALIAÇÃO APS 1 – Esquemático (Power, uC, Periféricos, Conectores) 19-20/09/17 2 – Explicativo dos blocos do sistema 3 3 - Tabela Características 4 – B.O.M. e R$ SEMANA TECNOLÓGICA 26-27/09/17 3 03-04/10/17 Avaliação 1 – Teórico prática 3 10-11/10/17 Definição Projeto Final – Recuperação Prova Teórico Prática 3 PROGRAMAÇÃO E CONTEÚDOS DAS AULAS (PREVISÃO) Dia/Mês ou Número de Conteúdo das Aulas Semana Aulas 03-04/10/17 Avaliação 1 – Teórico prática 3 10-11/10/17 Definição Projeto Final – Recuperação Prova Teórico Prática 3 17-18/10/17 Interrupções e Temporizadores 3 24-25/10/17 Comunicação serial (WIFI, Bluetooth, ...) 3 31/10/17 Dispositivos de entrada e saída (teclado, LCD, monitor - PC) 3 01/11/17 07-08/11/17 Desenvolvimento do Projeto 3 14/11/17 Desenvolvimento do Projeto 3 21-22/11/17 Desenvolvimento do Projeto 3 28-29/11/17 Apresentação e AVALIAÇÃO Projeto Final 3 05-06/12/17 Recuperação Projeto Final 3 12-13/12/17 3 ~17 semanas x 3h Como isto pode impactar sua vida? • Fábio Kurt Schneider: • Apucarana 1967-1984, • CEFET-Curitiba 1985-1989 (Eng. Elétrica – Eletrônica e Telecomunicações), • Engenheiro de Desenvolvimento 1989-1993 (In-circuit emulator and bus analyser, Fontes CC de elevada potência, Medidor de água em leite, medidor de gordura em leite), • CEFET-PR 1993-1995 Mestrado em Eng. Biomédica (Medição de Fluorescência para determinar Concentração de Oxigênio - OPTOELETRÔNICA), • Professor Efetivo CEFET desde 01/09/1995 • University of Washington 2001-2006 – Ph.D. Eng. Elétrica • UTFPR: Desde 2006 orientador de mestrado e doutorado: CPGEI e PPGEB • PROPPG (03/2013 a 08/2016) "Fellipe Arcanjo Trindade" <[email protected]>, "Fernanda Franco Grilo Machado" "Alex Jhonata Santos De Oliveira" <[email protected]>, <[email protected]>, "Gustavo Brizola Da Silva" "Artur Heineck Hahn" <[email protected]>, <[email protected]>, "Ingrid Do Rocio Gasparin" "Jean Carlo Do Carmo" <[email protected]>, <[email protected]>, "Jorge Lucas Vicilli Jabczenski" "Laura De Barros Gunha" <[email protected]>, <[email protected]>, "Lucas Albuquerque Sales" <[email protected]>, "Leonardo Braga De Cristo" <[email protected]>, "Lucas Rafael De Andrade" <[email protected]>, "Lucas Eduardo Bonancio Skora" "Matheus Augusto Burda" <[email protected]>, <[email protected]>, "Miguel Michalouski Santos Lima" "Ludwig Aumann" <[email protected]>, <[email protected]>, "Luiz Fernando De Almeida Mota" "Pedro Henrique Fracaro Kiche" <[email protected]>, <[email protected]>, "Pedro Andre Silveira Paiva" "Sarah Guebur Quoos" <[email protected]>, <[email protected]>, "Thiago Augusto De Souza" "Victor Hugo Dambrat Bergossi" <[email protected]>, <[email protected]>, "Vinicius Rodrigues Gemin" <[email protected]>, Aps: Projete um Sistema Microcontrolado com custo de componentes SMD preferencialmente inferior a USD 5,00 (OU O MAIS PRÓXIMO DE 5USD) capaz de apresentar as seguintes características: Instruções executadas por Maior que 16 milhões segundo Programável com comunicação USB, .... serial Memória de Programa Flash 32 kB Memória RAM 4 kB Registradores Internos Maior ou igual 32 registradores Timers 3 ou + ADC Pelo menos 1, 10 ou mais bits, amostragem ,aior ou igual a 1MHz Pinos I/O Pelo menos 10 disponíveis em conector Pino de controle preparado para Tensão 5-12V externo e corrente (dispositivo ligar/desligar dispositivo ligado) de 600 mA EXTERNO. DAC Opcional de 10 ou mais bits Apresentar um Relatório Impresso Simplificado INDIVIDUAL contendo: •Tabela de Características do sistema projetado •Esquemático completo •Explicativo 5-15 de cada bloco usado para atender as principais características do sistema •Lista de materiais COM PREÇO na origem (mouser, digikey, arrow, ...) Entendendo a Disciplina Microcontroladores 1 no curso técnico Microcontroladores 1 – Técnico em Eletrônica • Competência: • Analisar e Implementar Sistemas Microcontrolados Básicos. • Habilidades Básicas: • Desenvolver Sistemas Microcontrolados Básicos • Programar com linguagem de baixo nível sistemas Microcontrolados básicos • Bases Tecnológicas: • Arquitetura de Microcontroladores • Linguagem Assembly Relembrando Digital 3 • Reconhecer Elementos Básicos da Arquitetura Interna de um MICROPROCESSADOR • Identificar elementos e Interpretar Diagramas de um Sistema Microprocessado Sistema Microprocessado hardware firmware Sistema Microprocessado • Essas transparências foram baseadas em materiais elaborados pelos professores software Hugo Vieira Neto, Eduardo Bertonha e Gabriel Kovalhuk, Paulo DemantovaElaborado por Gilson Yukio Sato Hardware Reset Bus de Dados ROM RAM E/S P Interrupções Perifé- (CPU) ricos Bus de Endereços e Controle Clock DX SEL Elaborado por Gilson Yukio Sato Hardware • Clock • Reset • Reinicializa o microprocessador • Vetor de Reset • Primeiro endereço da memória de programa a ser executado após o reset do sistema Elaborado por Gilson Yukio Sato Hardware • ROM • Programa + dados não voláteis • RAM • Dados de trabalho • E/S • Interfaces dispositivos externos • DX SEL • Seleção de memória e periférico Elaborado por Gilson Yukio Sato Hardware • Bus de dados • Bidirecional • Bus de endereços • Saída (geralmente) • Bus de controle • Saídas e entradas Elaborado por Gilson Yukio Sato Hardware • Interrupção • Evento externo que desvia o fluxo normal de execução • Após o atendimento da interrupção o fluxo normal de execução é retomado • Vetor de Interrupção • Endereço da memória de programa para onde ocorre o desvio do fluxo de execução para o atendimento de uma interrupção Elaborado por Gilson Yukio Sato Firmware INÍCIO Posicionar escada Acionar o interruptor Subir na escada Sim A lâmpada acendeu? Retirar lâmpada antiga Não Apanhar lâmpada nova Colocar lâmpada nova FIM 0110...1101 1101...0001 C Compilador 0101...1000 0000...0101 ... Mnemônicos Assembler Elaborado por Gilson Yukio Sato Firmware • Algoritmo • Baixo nível • Código de Máquina, Assembly • Alto nível • C, BASIC, Pascal • Necessita ser compilada ou interpretada Elaborado por Gilson Yukio Sato Firmware • Montador (Assembler) • mnemônicos do assembly códigos das instruções • Compilador / Interpretador • linguagem alto nível linguagem assembly • Link-editor (Linker) • interconecta diferentes trechos de programa Elaborado por Gilson Yukio Sato Microprocessador Genérico Bus interno dados bus Buffer dados Unidade de Registradores Controle ULA bus Bus interno endereço Buffer ends Bus interno controle bus ctrl Buffer Elaborado por Gilson Yukio Sato ULA • ULA (ALU) • Unidade Lógico Aritmética • Lógicas: AND, OR, XOR • Aritméticas: Soma, Subtração • Unidade de Controle • Interpreta instruções • Gera sinais para comandar demais blocos Elaborado por Gilson Yukio Sato Registradores • Gerais • Armazenamento temporário de dados • Entradas e saída da ULA • Índices • Índice que pode ser usado como ponteiro para acesso de dado Elaborado por Gilson Yukio Sato Registradores • Flags • Sinalizam eventos • PC (Program Counter) • Indica o endereço da próxima instrução • SP (Stack Pointer) • Indica topo da pilha • Pilha – LIFO (Last In, First Out) • Armazenamento de dados Elaborado por Gilson Yukio Sato História Use sempre boas referencias para aprender!!! • Arquitetura de computadores David A. Patterson & John L. Hennessy. Computer Organization & Design, The Hardware/Software Interface. Morgan Kaufmann • https://pt.coursera.org/learn/comparch • Introdução • Instruções • Microcódigo • Pipelining • Cache • Superescalar x VLIW x • Predição de desvio • Multi https://www.cis.upenn.edu/~milom/cis501- Fall11/lectures/00_intro.pdf https://www.cis.upenn.edu/~milom/cis501- Fall11/lectures/00_intro.pdf https://www.cis.upenn.edu/~milom/cis501- Fall11/lectures/00_intro.pdf https://www.cis.upenn.edu/~milom/cis501- Fall11/lectures/00_intro.pdf What Is An ISA? http://www.cis.upenn.edu/~cis501/ • ISA (instruction
Load more

Recommended publications
  • Fill Your Boots: Enhanced Embedded Bootloader Exploits Via Fault Injection and Binary Analysis
    IACR Transactions on Cryptographic Hardware and Embedded Systems ISSN 2569-2925, Vol. 2021, No. 1, pp. 56–81. DOI:10.46586/tches.v2021.i1.56-81 Fill your Boots: Enhanced Embedded Bootloader Exploits via Fault Injection and Binary Analysis Jan Van den Herrewegen1, David Oswald1, Flavio D. Garcia1 and Qais Temeiza2 1 School of Computer Science, University of Birmingham, UK, {jxv572,d.f.oswald,f.garcia}@cs.bham.ac.uk 2 Independent Researcher, [email protected] Abstract. The bootloader of an embedded microcontroller is responsible for guarding the device’s internal (flash) memory, enforcing read/write protection mechanisms. Fault injection techniques such as voltage or clock glitching have been proven successful in bypassing such protection for specific microcontrollers, but this often requires expensive equipment and/or exhaustive search of the fault parameters. When multiple glitches are required (e.g., when countermeasures are in place) this search becomes of exponential complexity and thus infeasible. Another challenge which makes embedded bootloaders notoriously hard to analyse is their lack of debugging capabilities. This paper proposes a grey-box approach that leverages binary analysis and advanced software exploitation techniques combined with voltage glitching to develop a powerful attack methodology against embedded bootloaders. We showcase our techniques with three real-world microcontrollers as case studies: 1) we combine static and on-chip dynamic analysis to enable a Return-Oriented Programming exploit on the bootloader of the NXP LPC microcontrollers; 2) we leverage on-chip dynamic analysis on the bootloader of the popular STM8 microcontrollers to constrain the glitch parameter search, achieving the first fully-documented multi-glitch attack on a real-world target; 3) we apply symbolic execution to precisely aim voltage glitches at target instructions based on the execution path in the bootloader of the Renesas 78K0 automotive microcontroller.
    [Show full text]
  • Getting the Most out of Your Professional RISC-V Compiler and Debugger
    Getting the most out of your professional RISC-V compiler and debugger Ryan Sheng / 盛磊, [email protected], 021-63758658 IAR Systems (China) 2019.11.13 Highlight . Meet the demand of quality & time-to-market for your RISC-V project . Easy code reuse and widest customers base from IAR Embedded Workbench, the complete IDE toolchain . Fit the needs of both memory size and necessary performance by the outstanding C/C++ compiler . Improve the code quality and find potential issues earlier by the integrated C-STAT analysis . Identify low level bugs and provide graphical visibility to all SoC resource by the powerful debugger IAR Embedded Workbench Complete C/C++ compiler and debugger toolchain Most widely used development tools for embedded applications User-friendly IDE features and broad ecosystem integration Industry leading code optimization technology Comprehensive debugger Integrated code analysis tools ISO/ANSI C/C++ compliance with C18 and C++17 Support for 12,000+ devices Different architecture, One solution All available 8-,16- and 32-bit MCUs Cortex-M0 Cortex-R8 AVR H8 Cortex-M0+ Cortex-A5 AVR32 STM8 Cortex-M1 Cortex-A7 RX ColdFire Cortex-M3 Cortex-A8 RL78 HCS12 Cortex-M4 Cortex-A9 RH850 S08 Cortex-M7 Cortex-A15 78K MAXQ Cortex-M23 ARM11 SuperH CR16C Cortex-M33 ARM9 V850 SAM8 Cortex-R4 ARM7 R32C RISC-V Cortex-R5 SecurCore M32C Cortex-R52 8051 M16C Cortex-R7 MSP430 R8C Compiler optimizations x = y - 15; Function C Source inlining Dead code elimination Parser Compiler Loop = unrolling Intermediate Code High-Level Optimizer x – Scheduling y 15 Code Generator Low-Level Peephole Target Code Optimizer c.mv a3, sp Crosscall c.li a1, 1 Assembler lui a0, 0x80002 Link time optimizations 01001000111001101001 Object Code Linker Controlling optimizations Multi-file compilation allows Language standards the optimizer to operate on .
    [Show full text]
  • Natalia Nikolaevna Shusharina Maxin.Pmd
    BIOSCIENCES BIOTECHNOLOGY RESEARCH ASIA, September 2016. Vol. 13(3), 1523-1536 Development of the Brain-computer Interface Based on the Biometric Control Channels and Multi-modal Feedback to Provide A Human with Neuro-electronic Systems and Exoskeleton Structures to Compensate the Motor Functions Natalia Nikolaevna Shusharina1, Evgeny Anatolyevich Bogdanov1, Stepan Aleksandrovich Botman1, Ekaterina Vladimirovna Silina2, Victor Aleksandrovich Stupin3 and Maksim Vladimirovich Patrushev1 1Immanuel Kant Baltic Federal University (IKBFU), Nevskogo Str., 14, Kaliningrad, 236041, Russia 2I.M. Sechenov First Moscow State Medical University (First MSMU), Trubetskaya str, 8, Moscow, 119991, Russia 3Pirogov´s Russian National Research Medical University (RNRMU), Ostrovityanova str, 1, Moscow, 117997, Russia http://dx.doi.org/10.13005/bbra/2295 (Received: 15 June 2016; accepted: 05 August 2016) The aim of this paper is to create a multi-functional neuro-device and to study the possibilities of long-term monitoring of several physiological parameters of an organism controlled by brain activity with transmitting the data to the exoskeleton. To achieve this goal, analytical review of modern scientific-and-technical, normative, technical, and medical literature involving scientific and technical problems has been performed; the research area has been chosen and justified, including the definition of optimal electrodes and their affixing to the body of the patient, the definition of the best suitable power source and its operation mode, the definition of the best suitable useful signal amplifiers, and a system of filtering off external noises. A neuro-device mock-up has been made for recognizing electrophysiological signals and transmitting them to the exoskeleton, also the software has been written.
    [Show full text]
  • Lecture #3 PIC Microcontrollers
    Integrated Technical Education Cluster Banna - At AlAmeeria ‎ © Ahmad © Ahmad El E-626-A Real-Time Embedded Systems (RTES) Lecture #3 PIC Microcontrollers Instructor: 2015 SPRING Dr. Ahmad El-Banna Banna Agenda - What’s a Microcontroller? © Ahmad El Types of Microcontrollers Features and Internal structure of PIC 16F877A RTES, Lec#3 , Spring Lec#3 , 2015 RTES, Instruction Execution 2 Banna What is a microcontroller? - • A microcontroller (sometimes abbreviated µC, uC or MCU) is a small computer on a single integrated circuit © Ahmad El containing a processor core, memory, and programmable input/output peripherals. • It can only perform simple/specific tasks. • A microcontroller is often described as a ‘computer-on-a- chip’. RTES, Lec#3 , Spring Lec#3 , 2015 RTES, 3 Microcomputer system and Microcontroller Banna based system - © Ahmad © Ahmad El RTES, Lec#3 , Spring Lec#3 , 2015 RTES, 4 Banna Microcontrollers.. - • Microcontrollers are purchased ‘blank’ and then programmed with a specific control program. © Ahmad El • Once programmed the microcontroller is build into a product to make the product more intelligent and easier to use. • A designer will use a Microcontroller to: • Gather input from various sensors • Process this input into a set of actions • Use the output mechanisms on the microcontroller to do something useful. RTES, Lec#3 , Spring Lec#3 , 2015 RTES, 5 Banna Types of Microcontrollers - • Parallax Propeller • Freescale 68HC11 (8-bit) • Intel 8051 © Ahmad El • Silicon Laboratories Pipelined 8051 Microcontrollers • ARM processors (from many vendors) using ARM7 or Cortex-M3 cores are generally microcontrollers • STMicroelectronics STM8 (8-bit), ST10 (16-bit) and STM32 (32-bit) • Atmel AVR (8-bit), AVR32 (32-bit), and AT91SAM (32-bit) • Freescale ColdFire (32-bit) and S08 (8-bit) • Hitachi H8, Hitachi SuperH (32-bit) • Hyperstone E1/E2 (32-bit, First full integration of RISC and DSP on one processor core [1996]) • Infineon Microcontroller: 8, 16, 32 Bit microcontrollers for Spring Lec#3 , 2015 RTES, automotive and industrial applications.
    [Show full text]
  • Flasher ATE User Guide
    Flasher ATE User Guide Document: UM08035 Manual Version: 1.16 Revision: a Date: August 19, 2021 A product of SEGGER Microcontroller GmbH www.segger.com 2 Disclaimer Specifications written in this document are believed to be accurate, but are not guaranteed to be entirely free of error. The information in this manual is subject to change for functional or performance improvements without notice. Please make sure your manual is the latest edition. While the information herein is assumed to be accurate, SEGGER Microcontroller GmbH (SEG- GER) assumes no responsibility for any errors or omissions. SEGGER makes and you receive no warranties or conditions, express, implied, statutory or in any communication with you. SEGGER specifically disclaims any implied warranty of merchantability or fitness for a particular purpose. Copyright notice You may not extract portions of this manual or modify the PDF file in any way without the prior written permission of SEGGER. The software described in this document is furnished under a license and may only be used or copied in accordance with the terms of such a license. © 2017-2021 SEGGER Microcontroller GmbH, Monheim am Rhein / Germany Trademarks Names mentioned in this manual may be trademarks of their respective companies. Brand and product names are trademarks or registered trademarks of their respective holders. Contact address SEGGER Microcontroller GmbH Ecolab-Allee 5 D-40789 Monheim am Rhein Germany Tel. +49-2173-99312-0 Fax. +49-2173-99312-28 E-mail: [email protected] Internet: www.segger.com Flasher ATE User Guide (UM08035) © 2017-2021 SEGGER Microcontroller GmbH 3 Manual versions This manual describes the Flasher ATE device.
    [Show full text]
  • SDCC Compiler User Guide
    SDCC Compiler User Guide SDCC 4.1.11 $Date:: 2021-09-17 #$ $Revision: 12682 $ Contents 1 Introduction 7 1.1 About SDCC.............................................7 1.2 SDCC Suite Licenses.........................................8 1.3 Documentation............................................9 1.4 Typographic conventions.......................................9 1.5 Compatibility with previous versions.................................9 1.6 System Requirements......................................... 11 1.7 Other Resources............................................ 12 2 Installing SDCC 13 2.1 Configure Options........................................... 13 2.2 Install paths.............................................. 15 2.3 Search Paths.............................................. 16 2.4 Building SDCC............................................ 18 2.4.1 Building SDCC on Linux.................................. 18 2.4.2 Building SDCC on Mac OS X................................ 19 2.4.3 Cross compiling SDCC on Linux for Windows....................... 19 2.4.4 Building SDCC using Cygwin and Mingw32........................ 19 2.4.5 Building SDCC Using Microsoft Visual C++ 2010 (MSVC)................ 20 2.4.6 Windows Install Using a ZIP Package............................ 21 2.4.7 Windows Install Using the Setup Program.......................... 21 2.4.8 VPATH feature........................................ 21 2.5 Building the Documentation..................................... 22 2.6 Reading the Documentation....................................
    [Show full text]
  • Winidea 2012 Release Notes
    _ RELEASE NOTES winIDEA 2012 / 9.12 9.12.1 (18.1.2012) CPU Support Renesas 78k RL78 Family On-Chip-Debug support Full debug feature set for G13 and F12 lines is supported on iC5000 platform. isystem.connect Profiler controller classes CProfilerController2 and CProfilerData2 classes provide access to profiler configuration and recorded data access. For more information see Help/SDK/isystem.connect. iSYSTEM, September 2018 1/169 9.12.2 (31.1.2012) CPU Support MPC 5xxx MPC5676R Cobra Support Full debug and trace feature set for MPC and eTPU cores. Preliminary support for dual eDMA trace. winIDEA Analyzer Bookmarks Any number of bookmarks can be set in the trace and timeline views using the Ctrl+F2 shortcut. The F2 shortcut moves from one bookmark to another. Watch window Expanded watch structure Watch window retains expanded structure of a complex type even if the expression goes out of scope. iSYSTEM, September 2018 2/169 When out of scope, the structure is retained, but Value reflects Note: If the expression is changed or the expression can evaluate to a different type in a changed context, the structure is collapsed. Binary constants Binary constants of the form <digits>b are recognized. e.g. 100b == 4 This format should be used if one intends to modify binary values in the watch window. Other binary display formats cannot be used to modify the value. iSYSTEM, September 2018 3/169 isystem.connect Hot attach/detach capability IConnectDebug::RunControl provides means to hot-attach the target. CExecutionController::hotAttach() and hotDetach() can be used from scripts.
    [Show full text]
  • Compiler/Debugger/Emulators
    Compilers and Debuggers/Emulators supported by TESSY Table A :: 1-3 supported targets since TESSY v4.0.22 * * * * * CCS (TI) CCS Debugger CDT Codewarrior(Eclipse) Codewarrior(Classic) (CCES) Core Cross (IAR) C-Spy DS-5 eSoleBinder (HighTec) GNU HighTec (Hitex) HiTOP 2000Hills)MULTI (Green NiosDebuggerII GNU (Noral)NoralFlex QEMU debugger JLink SEGGER SingleStep(Windriver) TrueSTUDIO (Fujitsu) Softune Microelectr.) (ST STVD (Lauterbach) TRACE32 (PLS) UDE Devices)(Analog DSP Visual Workbench River Wind (Keil)µVision (iSYSTEM) winIDEA (Cosmic) ZAP ALTERA NIOS II P P Analog Devices Blackfin P P SHARC P Atollic GCC ARM P P ARM ADS Arm (legacy) P P ARM V5 P P P P P P P ARM V6 P P Cosmic ARM P P HC11 P P P HCS12 P P P P P HCS08 P P P S12X P P P S12G P P S12Z P ST7 P P P STM8 P DiabData PPC5xx (s. WindRiver) P P P Freescale (Metrowerks) Coldfire V1 P P P DSP568E P HCS12 P P P P HCS08 (Classic) P P P P P P P P _Compiler HCS08 (Eclipse) MPC P P P P S12X P P P S12Z P P P ST7 P P Fujitsu FFMC16 P FFMC32 P GNU Arm (Arm Cortex) P P P P P P P GCC (MinGW) P GCC (Cygwin) P PPC P P >> Table A :: 2-3 P currently supported by P new or updated DocRev 4.0-18 * These targets do not provide interactive debugger functionality while running TESSY tests, but special procedures are available (s. respective AppNotes for the debugger).
    [Show full text]
  • Manufacturer Proc.Name Core Mail WDC 65816 16 WDC 65C02 8 LEFTER MARIAN M Freescale 68HC08 8 68HC08 Paun Petronel M Freescale 68
    Manufacturer Proc.name core mail WDC 65816 16 WDC 65C02 8 LEFTER MARIAN m Freescale 68HC08 8 68HC08 Paun Petronel m Freescale 68HC11 8 68HC11 Mirica Daniel m Freescale 68HC12 S12,6812, HC12 16 Dediu Stelian Mihai m Motorola/Freescale 68k Coldfire 32 Motorola M·CORE MCORE Cristea Daniel [Bogdan Mihai][m] Motorola 68HC16 16 68HC16 Freescale i.MX 32 Freescale HC16 16 Pavel Marius Freescale S12 S12X 16 Petrache Sbastian Freescale 56800 16 Apple-IBM-Motorola PowerPC 32,64 Baicu Laurentiu m Microchip PIC10 8 PIC10 Stamate Cornelia m Microchip PIC12 Microchip PIC16 Microchip PIC18 PIC18 Tudor Mihaela m Microchip PIC24 16 Microchip PIC32 32 MIPS32 M4K Banica Andrei m Microchip dsPIC30 dsPIC33 dePIC33 Lungeanu Loredana m Atmel AVR tinyAVR, megaAVR, XMEGA tinyAVR Moise Catalina Tarbuc Sorin mm XMEGA Vintila Gabriel m Atmel AVR32 AVR32 Ciocianu Alina Analog Devices SHARC tigerSHARC SHARC Banica Iulian m Analog Devices Blackfin BF Feodorov Analog Devices ADuC ARM7 TDMI ADUC ARM Spanachi Mihai m Analog Devices ADuC 8052 8051 ADUC 8052 Olariu Adriana m Parallax Propeller Buleu Alexandru Maxim MAXQ Zilog Z8 eZ8 Encore! Dimofte Claudia m Zilog eZ80 eZ80Acclaim! eZ80 Radu Alina m Intel 80x86 80286 Iliuta Silviu m Intel P5 Pentium Deaconu m Intel Atom Atom Barbieru Florin m Intel/Marvell XScale PXA,IOP,IXP,IXC,CE ARMv5 Anton Laurentiu m NEC 78K0 8 Cojocaru Alexandru m NEC 78K0R 16 NEC V850 32 Renesas/Hitachi H8 H8 Renesas M16C R8C, R32C, M32C M16C Tiplea Marius m Renesas/Hitachi SuperH Samsung S3C... ARM Luca George STMicroelectronics STM8 8 Matei Irina
    [Show full text]
  • Fast Symmetric Crypto on Embedded Cpus
    Fast symmetric crypto on embedded CPUs Peter Schwabe Radboud University Nijmegen, The Netherlands June 5, 2014 Summer School on the design and security of cryptographic algorithms and devices for real-world applications Embedded CPUs 4-bit CPUs 16-bit CPUs I TMS 1000 I TI MSP430 I Intel 4004 I Microchip Technology PIC24 I Atmel MARC4 I Toshiba TLCS-47 32-bit CPUs I ARM11 8-bit CPUs I ARM Cortex-M∗ I Atmel AVR I ARM Cortex-A∗ I Intel 8051 I Atmel AVR32 I Microchip Technology PIC I MIPS32 I STMicroelectronics STM8 I AIM 32-bit PowerPC I STMicroelectronics STM32 Fast symmetric crypto on embedded CPUs2 Symmetric crypto Fast symmetric crypto on embedded CPUs3 Symmetric crypto Fast symmetric crypto on embedded CPUs3 Symmetric crypto Fast symmetric crypto on embedded CPUs3 Symmetric crypto Fast symmetric crypto on embedded CPUs3 Symmetric crypto Fast symmetric crypto on embedded CPUs3 I Throughput: number of instructions (of a certain type) we can do per cycle I Latency of an instruction: number of cycles we have to wait before using the result I Latency and throughput are determined by the microarchitecture I Optimizing software in assembly means: I Find good representation of data I Choose suitable instructions that implement the algorithm I Schedule those instruction to hide latencies I Assign registers efficiently (avoid spills) Optimizing crypto I This talk: optimize for speed I Implement algorithms in assembly I Available instructions and registers are determined by the target architecture Fast symmetric crypto on embedded CPUs4 I Latency
    [Show full text]
  • Open On-Chip Debugger: Openocd User's Guide
    Open On-Chip Debugger: OpenOCD User's Guide for release 0.11.0+dev 27 September 2021 This User's Guide documents release 0.11.0+dev, dated 27 September 2021, of the Open On-Chip Debugger (OpenOCD). • Copyright c 2008 The OpenOCD Project • Copyright c 2007-2008 Spencer Oliver [email protected] • Copyright c 2008-2010 Oyvind Harboe [email protected] • Copyright c 2008 Duane Ellis [email protected] • Copyright c 2009-2010 David Brownell Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled \GNU Free Documentation License". i Short Contents About :::::::::::::::::::::::::::::::::::::::::::::::::: 1 1 OpenOCD Developer Resources :::::::::::::::::::::::::: 3 2 Debug Adapter Hardware ::::::::::::::::::::::::::::::: 5 3 About Jim-Tcl ::::::::::::::::::::::::::::::::::::::: 11 4 Running :::::::::::::::::::::::::::::::::::::::::::: 12 5 OpenOCD Project Setup :::::::::::::::::::::::::::::: 14 6 Config File Guidelines ::::::::::::::::::::::::::::::::: 21 7 Server Configuration :::::::::::::::::::::::::::::::::: 32 8 Debug Adapter Configuration::::::::::::::::::::::::::: 36 9 Reset Configuration::::::::::::::::::::::::::::::::::: 56 10 TAP Declaration ::::::::::::::::::::::::::::::::::::: 61 11 CPU Configuration ::::::::::::::::::::::::::::::::::: 69 12 Flash
    [Show full text]
  • Macro Assembler AS V1.42 User's Manual
    Alfred Arnold, Stefan Hilse, Stephan Kanthak, Oliver Sellke, Vittorio De Tomasi Macro Assembler AS V1.42 User's Manual Edition September 2020 IBM, PPC403Gx, OS/2, and PowerPC are registered trademarks of IBM Corporation. Intel, MCS-48, MCS-51, MCS-251, MCS-96, MCS-196 und MCS-296 are registered trademarks of Intel Corp. Motorola and ColdFire are registered trademarks of Motorola Inc. MagniV is a registered trademark of Freescale Semiconductor. PicoBlaze is a registered trademark of Xilinx Inc. UNIX is a registered trademark of the The Open Group. Linux is a registered trademark of Linus Thorvalds. Microsoft, Windows, and MS-DOS are registered trademarks of Microsoft Corporation. All other trademarks not explicitly mentioned in this section and used in this manual are properties of their respective owners. This document has been processed with the LaTeX typesetting system, using the Linux operating system. Contents 1 Introduction 11 1.1 License Agreement . 11 1.2 General Capabilities of the Assembler . 13 1.3 Supported Platforms . 19 2 Assembler Usage 21 2.1 Hardware Requirements . 21 2.2 Delivery . 22 2.3 Installation . 26 2.4 Start-Up Command, Parameters . 29 2.5 Format of the Input Files . 39 2.6 Format of the Listing . 41 2.7 Symbol Conventions . 43 2.8 Temporary Symbols . 46 2.9 Named Temporary Symbols . 46 2.9.1 Nameless Temporary Symbols . 47 2.9.2 Composed Temporary Symbols . 49 2.10 Formula Expressions . 49 2.10.1 Integer Constants . 50 2.10.2 Floating Point Constants . 51 2.10.3 String Constants . 52 2.10.4 String to Integer Conversion and Character Constants .
    [Show full text]