Serial Digital Interface (SDI) Megacore Function User Guide
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Serial Digital Interface (SDI) MegaCore Function User Guide Serial Digital Interface (SDI) MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-SDI1005-16.0 Document last updated for Altera Complete Design Suite version: 12.1 Document publication date: February 2013 Feedback Subscribe © 2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its ISO semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and 9001:2008 services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service Registered described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. February 2013 Altera Corporation Serial Digital Interface (SDI) MegaCore Function User Guide Contents Chapter 1. About This MegaCore Function Features . 1–1 Release Information . 1–2 Device Family Support . 1–2 General Description . 1–3 OpenCore Plus Evaluation . 1–5 Resource Utilization . 1–6 Chapter 2. Getting Started Design Flow . 2–1 SDI Walkthrough . 2–3 Creating a New Quartus II Project . 2–3 Launching MegaWizard Plug-In Manager . 2–4 Parameterizing . 2–5 Setting Up Simulation . 2–6 Generating Files . 2–6 Simulating the Design . 2–8 Testbench . 2–8 Simulate with IP Functional Simulation Models . 2–9 Simulating with the ModelSim Simulator . 2–9 Simulating in Third-Party Simulation Tools Using NativeLink . 2–10 Specifying Constraints . 2–11 Single Channel . 2–11 Multiple Channels . 2–12 Compiling the Design . 2–14 Programming a Device . 2–14 Setting Up Licensing . 2–15 Chapter 3. Functional Description Block Description . 3–2 Transmitter . 3–2 HD-SDI LN Insertion . 3–4 HD-SDI CRC Generation and Insertion . 3–4 Scrambling and NRZI Coding . 3–5 Transceiver Clock . 3–5 Receiver . 3–6 NRZI Decoding and Descrambling . 3–8 Word Alignment . 3–8 Video Timing Flags Extraction . 3–9 RP168 Switching Compliance . 3–9 HD-SDI LN Extraction . 3–10 HD-SDI CRC Checking . 3–10 Accessing Transceiver . 3–10 Transceiver Clock . 3–12 Transceiver—Soft-Logic Implementation . 3–12 Transmitter . 3–12 Transmitter Clocks . 3–12 Receiver . 3–13 February 2013 Altera Corporation Serial Digital Interface (SDI) MegaCore Function User Guide iv Contents Receiver Clocks . 3–13 Transceiver—Stratix GX Devices . 3–13 Transmitter Clocks . 3–13 Receiver Clocks . 3–15 Transmitter Transceiver Interface . 3–16 Receiver Transceiver Interface . 3–17 Transceiver—Arria GX, Arria II GX, Arria V, Cyclone IV GX, Cyclone V, Stratix II GX, Stratix IV GX, and Stratix V Devices . 3–18 Transmitter Clocks ..