Car Audio, Automotive LAN Data Communication Equipment

Car Audio, Automotive LAN Data Communication Equipment '05-8 SANYOSANYO CCarar AAudioudio CombiningCombining viv ivividd imag imageses and re aandlistic realisticsound sound Contents

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Decoder...... 58 RDS System Chipsets CCarar R Radio/Caradio/Car St eStereoreo 5 W 5 T Wwo -Two-ChannelChannel Power PowerAmplifie Amplifierr that Req uthatires RequiresMinimal Ex tMinimalernal Co mExternalponents ...... 59.Components...... 59 Car Audio Electronic Tuning PLL Frequency Synthesizer CCarRDSar R Radio/Car aSignal-Processingdio/Car St eStereoreo 5 W 5 P System-on-ChipWow ePowerr Ampl iAmplifierfier that ICRe thatquire Requiress Minimal EMinimalxternal C Externalomponen tComponentss ...... 60...... 60 FMF M RDS MMultiplexul tDemodulatoriplex B rBroadcastingoadc ICsasting Sys tSystemem Chips Chipsetsets ...... 6161 ttoo 6 622 MMobileSingle-Chipobile F MFM M uMultiplex lRDStiplex BSignalro Broadcastadca Processingst (DAR (DARCC Sy sSystemte mSystem)) Re cICeiv eReceiverr IC...... 63...... IC...... 63 ttoo 6644 Package MMobileobile F MFM DimensionsM uMultiplexltiplex Bro Broadcastadcast Rece Receiveriver IC with IC Bu withilt-in VBuilt-inICS De VICScoder...... 65. .Decoder...... 65 ttoo 6666 RDSRDS S Systemystem C hChipsetsipsets ...... 6767 ttoo 6 688 CCarar A Audioudio E lElectronicectronic Tun Tuninging PLL FPLLreq uFrequencyency Synthe sSynthesizerizer...... 6699 RRDSDS S Signal-Processingignal-Processing Sys tSystem-on-Chipem-on-Chip IC...... 70...... IC...... 70 RRDSDS D Demodulatoremodulator ICs ICs...... 71...... 71 SSingle-Chipingle-Chip R DRDSS Sig Signalnal Pro cProcessingessing Syste mSystem IC...... 72...... IC...... 72 PackagePackage D Dimensionsimensions...... 7373 ttoo 7 788 CARNET Automotive LAN

CARNETCARNET isis a LLANAN thatthat uusesses thethe ARCNETARCNET tokentoken ppassingassing bbusus mmethod.ethod. ItIt cancan achieveachieve a highhigh transmissiontransmission speedspeed ofof 77.5.5 MMbps.bps. SinceSince noisenoise cancan bebe minimizedminimized bbyy iinstallingnstalling thisthis LANLAN inin vehicles,vehicles, ssuchuch iinstallationnstallation hhasas

CD, VICS veryvery littlelittle impactimpact oonn ootherther ddevices.evices. TEL GPS The audio equipment control bus transceiver + comparator Under development Radio LA2333T Car navigation system 1-chip IC incorporating an The audio equipment control bus transceiver and comparator

Features Features The audio equipment control bus output withstand voltage of 18 V Vehicle signal detection block input withstand voltage of 18V Hub function supporting connection of up to 8 nodes Functions Construction of LAN with high transmission speed of 7.5 Mbps yet ultra low noise possible Driver/receiver block for The audio equipment control bus Twisted pair cables can be used (1) Transmitter (output driver) Easy to use due to compact size (2) Receiver (receiving amplifier, hysteresis comparator (for waveform shaping)) Non-inverted type open collector output comparator

LA2330W CARNET/transceiver Under development A 7.5 Mbps automotive LAN can be configured by combining the LA2330W with a protocol IC for CARNET LA2351M Transceiver for CARNET (ARCNET controller TMC20040C Series). The LA2351M is a low-noise transceiver IC for automotive LANs. On-chip driver/receiver for The audio equipment control bus On-chip driver/receiver for CAN Features Includes 8 non-inverted type open-collector output comparator circuits Support of either 3-bit digital or staircase signals as input signal Features If a 3-bit digital signal cannot be routed as an EMI countermeasure, place an R-2R ladder in the vicinity of the protocol chip and route the signal following D/A conversion, connecting it to the LPF input. The audio equipment control bus block, CAN block bus output withstand voltage of 18 V A 5-Mbps or 7.5 Mbps automotive LAN can be constructed by combining the LA2351M with a protocol IC Vehicle signal detection block input withstand voltage of 18 V for automotive LAN (ARCNET controller TMC20040C Series). Each block is independent (incl. power supply and GND line), and each is provided with a standby function. On-chip adjustment LPF Low-noise data communication is possible. Functions Functions Transceiver block for CARNET (1) Transmitter (D/A converter (3-bit), LPF (for EMI prevention), output driver) Transmitter (transmit) block (2) Receiver (attenuator, receiving amplifier, noise elimination LPF (for reception signal), 1) D/A converter (3-bit) comparator (for waveform shaping) 2) LPF (for EMI prevention) Driver/receiver block for The audio equipment control bus 3) Output driver (1) Transmitter (output driver) Receiver (receive) block (2) Receiver (receiving amplifier, hysteresis comparator (for waveform shaping) 1) Receiving amplifier Driver/receiver block for CAN 2) Noise elimination LPF (for reception signal) (1) Transmitter (LPF (for EMI prevention), output driver) 3) Comparator (for waveform shaping) (2) Receiver (attenuator, comparator) Non-inverted type open-collector output comparator

3 Car Audio 4 Car Audio CARNET Automotive LAN

3 Car Audio 4 Car Audio CAN MOST Automotive LAN

CANCAN isis a high-reliabilityhigh-reliability LANLAN forfor controllingcontrolling bbodyody ttransmissionransmission ddevices.evices. MOST is an automotive LAN that uses POF (plastic optical fiber). CANCAN cancan achieveachieve a highhigh transmissiontransmission raterate ofof It allows the construction of a low-noise high-speed (50 Mbps) LAN.

1 MbpsMbps andand isis strongstrong againstagainst externalexternal noise,noise, POF multimedia (TV, DVD, car navigation, etc.) can be Speaker

thusthus allowingallowing stablestable communication.communication. Powered controlled in one go by using this high-speed LAN. Speaker window Speaker The MOST standard is licensed by OASIS. DVD Door mirror TV

Panel Air Door conditioner Wipers Speaker

Door Sheet

Sheet Features Features

ISO11898 compliant MOST standard compliant Low power consumption (low current during standby) Low power consumption Transmission speed of up to 50 Mbps Transmission speed of up to 1 Mbps Few external parts (unit downsizing possible) On-chip lamp signal control High throughput makes stable communication possible

LA2360M Transceiver for CAN Under development The LA2360M is a transceiver IC for CAN.

Features ISO11898 compliant LA2340M/LV2341M MOST transceiver Under development Transmission speed of 1 Mbps The LA2340M is an I/V converter that can be used to configure an optical electric converter (OEC) Functions when combined with a photo diode (PD). The LV2341M is a LED driver that can be used to configure an electric optical converter (EOC) Transmitter (transmit) block Receiver (receive) block when combined with a LED. • Output driver • Attenuator • Comparator Features

50-Mbps automotive LAN can be constructed with POF Standby function Transmission speed of up to 50 Mbps Transceiver for CAN Under development LA2361JM/LA2361AM POF cable Power supply voltage: +5 V Features

ISO11898 compliant Transmission speed of 1 Mbps Low power consumption Low output noise

Functions

Transmitter (transmit) block Receiver (receive) block • Output driver • Attenuator • Comparator

5 Car Audio 6 Car Audio For Automotive AV Equipment

Digital Radio System Chipsets SANYO's digital radio system is a chipset consisting of the LC75030W car audio tuner/IF-DSP system IC and the LV25300M tuner system IC. By converting the analog waveform to digital with the DSP, this chipset achieves a significant reduction in the number of external components and improvements in reception performance Single-chip radio tuner and reliability. LV25300M P9

FM/AM-FE/IF Tuner/IF-DSP:LC75030W P10

...... Under development PLL

IF-ADC Tuner-DSP RDS FM/AM Power Input source Single-Chip Radio Tuner MPX IC FM:IF-BPF/Dem. P9 MRC LV25300M AM:IF-BPF/Dem. DIR MD NC •FM front end •FM IF •AM ROM RAM •PLL Changer •Bus control Analog A/D D/A Tuner/IF-DSP •Switching control Source (2ch) Audio-DSP EVR Selector (6ch) DSP for Automotive Tuners and •Automatic adjustment CD Bass/Tre/Mid Audio Systems •Interface to the LC75030W EQ function •Diversity Dedekind* LC75030W P10 •Package: QFP80 (14 14) AUX Functions •IF signal input (450 kHz) •Variable bandwidth IF filter processing •FM/AM detection processing and noise cancellation processing •FM stereo demodulation •RDS data demodulation circuit MPU P23 to 26 •Analog source selector and A/D converter LC877 Series •Electronic volume control LC87F7XXX •6-channel D/A converter For Microcontrollers Control Wide Range of RAM and ROM Options LC875 Series •Interrupt audio mixing LC87F5XXX Featuring Microcontroller with On-Chip LCD Drivers Signal Control Microcontrollers •High-precision adjacent channel detection LC877 Series P25 to 26 LC875 Series P23 to 24 algorithm and variable bandwidth IF filter •Two noise detection circuit systems and •ROM: 24 K to 128 KB All products described in this catalog contain developed products or software waveform interpolation •RAM 1536 to 4096 9bits •This series is optimal since the abundant internal products that are diverted from general types. In accordance with standard RAM can be used for smooth data management. •DSP software provides optimal tuner settings, •VDD: 5 V (300 ns), 2.5 V (750 ns) of quality management system ISO/TS16949 for automotive industry, there standardization, and adjustment-free •DC control software packages are available, and ROM: 8 KB to 256 KB is a case where all demanded articles couldn't be supported, so please RAM: 1024 to 8192 9 bits confirm to the salesman of our company at every order. manufacturing custom development can be easily supported. •Provides a 6-channel D/A converter and •Package: Refer to the package lineup. P26 Flash memory version P23 to 24 dedicated analog output pins for independent Flash memory version P25 to 26 CCB is a SANYO’s original bus rear seat outputs. format and all the bus addresses •Low power achieved by optimized design of the are controlled by SANYO. tuner circuit and DSP software. Flash products are licensed from Silicon Storage Technology, Inc.,(USA), and manufactured and sold by SANYO Electric Co., Ltd. •Package: SQFP144 (20 20)

Dedekind function(Dedekind*) is Dedekind R&D's trade name. Extensive lineup provides full support for a wide range of systems

AM/FM Tuner Block SVC273 (CR (C2.0V/C8.0V) ≥3.1,Q ≥100) Transistors for buffers PicoMOS™ *: SV272, SV273: MCPH3 miniature package (2.1 2.0 mm) 2SC2812N (V = 50 V, I = 150 mA, f = typ 100 MHz), 5LN 01M (Nch) Package: MCP (2.1 2.0 mm) Varactor diodes for AM tuning CEO C T Dual gate MOSFETs for amplifiers 2SC2814 (V = 20 V, I = 30 mA, f = typ 320 MHz) V = 50 V, I = 100 mA, R (on) = max 9.9 Ω SVC354 (3 diodes), SVC364 (4 diodes), SVC371 (6 diodes) CEO C T DSS D DS 3SK263 (V = 15 Vmin, I = 2.4 to 24 mA, yfs = typ 14 ms), PIN diodes for AGC and switching Low on registance power MOSFET Varactor diodes for FM tuning DS DSX 3SK264 (V = 15 V, I = 5.0 to 24 mA, yfs = typ 17 ms) Series with rs = typ 6 Ω: ISV294, ISV315, ISV316, ISV298H CPH6424 (Nch) Package: CPH6 (2.8 2.9 mm) SVC230 (CR (C2.0V/C8.0V) ≥1.65, Q ≥100) DS DSX JFET and transistors for AMP amplifiers Other transistors (power supply, interface, and switch drive) V = 60 V, I = 3 A, R (on) = 150 mΩ SVC243 (CR (C1.0V/C6.5V) ≥7.0, Q ≥40) DSS D DS GS CPH5901 (high gain, typ 50 ms), CPH5905 (High ESD resistance type) Bipolar transistors: 50C02CH (V = 15 V, I =1 A, V (sat) = max 280 V) SVC272 (CR (C2.0V/C8.0V) ≥2.3, Q ≥150) CEO C CE 2SC5706 (VCEO = 50 V, IC = 5 A, VCES (sat) = typ 90 mV) 2SD1913 (VCEO = 60 V, IC = 3A, PC = 20 W, hFE 70 to 280)

7 Car Audio 8 Car Audio 1-chip Tuner Tuner/IF-DSP

UnderUnder UnderUnder LV25300M developmentdevelopment LC75030WLC75030W developmentdevelopment Functions Functions

The LV25300M is a tuning system that supports the LC75030W (SANYO audio DSP) that allows the creation of standard The LC75030W is a DSP for car tuner/audio. tuner modules. Various setting changes can be performed with the software of the control microcontroller according to the intended application, making the LV25300M ideal for combined use with the LC75030W. Small tuner modules can be Features developed with a smaller number of parts compared to conventional tuners and at a lower total cost. Since the LV25300M ■ IF signal input (450 kHz) has a serial bus (CCB SANYO bus), the number of communication lines with the microcontroller is reduced by 4 and line ■ Processing for variable IF filter bandwidth routing problems during set production can be avoided, making a smaller board size possible. AM/FM wave demodulation ■ FM/AM demodulation processing, noise cancellation processing is done through digital processing by outputting the IF signal (450 kHz) of the LV25300M to the LC75030W. ■ FM stereo demodulation Since the LC75030W has a function to change the IF selectivity according to the level of adjacent interference, just two ■ RDS data demodulation circuit ■ 10.7 MHz ceramic filters suffice to achieve both high sound quality and adjacent interference, which used to be difficult until Analog source selector and ADC ■ Electronic volume now because these are somewhat mutually exclusive characteristics. Moreover, the LV25300M comes with an antenna ■ DAC: 6 channels switching diversity function that switches two antennas in response to various electric field changes during operation, a ■ Interrupt voice mixing malfunction prevention circuit that operates through antenna switching frequency detection, and a weak electric field detection and antenna fixing circuit that uses S meter voltage, making stable reception possible. Optimum tuner reception is possible by outputting the voltages of the LV25300M' S meter output and the AM/FM IF outputs to a DSP and judging the radio wave status in real time, and performance combinations and specification differentiation can Features be performed by software. ■ High-accuracy adjacent station detection algorithm and variable IF bandwidth filter ■ Waveform interpolation processing using two noise detection circuit and software systems Features ■ DSP software for optimum tuning, standardization, and adjustment-free operation ■ FM F.E ■ Bass control ■ Diversity function ■ Analog output pin for dedicated rear sheet output that is independent of 6-channel DAC ■ FM IF ■ Switching control ■ Package: QFP80 (14 14) ■ Realization of low power consumption through optimized design of tuner circuit and DSP software ■ AM ■ Automatic adjustment ■ Package: SQFP144 (20 20) ■ PLL ■ Connection to LC75030W (Interface)

CCB is a SANYO’s original bus format and all the bus addresses are controlled by SANYO. Block Diagram Block Diagram

FM antenna circuit

FM antenna sync circuit FM RF amp circuit MIX COIL CF 10.7MHz CF 10.7MHz AM TRANS CF 10.7MHz FM-RF amp circuit FM RF sync circuit BPF

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 AMNCT 14bit AM/FM Detector FM Stereo FE FM/AM ADC IF Signal de-modulator Program Memory 1 Program Memory 2 1 AM block AM-NC 4.9V AM 10bit 2 ANT-D FM AM ANT-D REG NC STOP 1stAMP TRIG SM-DC ADC TEST1 1st 1st 10bit Bus-Interface Bus-Interface 3 60 MIX MIX NOIZE NOIZE SM-AC ADC

RF RF AMP AGC TEST 59 MIC O FAVOR-30 FAVOR-30 4 N W W Digital TESTn Keyed M AGC SD MIC P AGC AGC AGC AGC AM 58 Data CORE-1 CORE-2 Data RAM 5 S-METER IF AGC 2ndMIX MIC N Buffer Data RAM TEL O FM AM 57 & Coil sync 6 AM demodulation 2ndIFAM CF 450kHz TEL P OSC Lo/DX Lo/DX 56 ADC circuit TEL N 24bit DATA 7 Low cut DifferentialDifferential L Control Analog AMP DETECTET amp 2 amp 1 55 CHG L (BTL) ADC1 Buffer DAC block Mixing 8 PLL CHG R (BTL) FL 54 ADC2 DAC SW EVR (VOUT1L) ECT POWER ON CD L (OTL) 9 R PERIPHERAL Control FR NMOS Tr 1/4.1/6 RESET 53 SW EVR 1/8.1/10 BUS- CD R (OTL) Timing Control DAC (VOUT1R) 10 52 MD L (OTL) RL swallow IF IN 1 DAC SW EVR (VOUT2L) COUNTER FM IF MD R (OTL) Gain Control 11 counter IN 2 51 Buffer RR LPF DAC AUX L (OTL) ADC Input Selector EVR 6/8bit AD IN 3-1 FM S-METER Limitter & DAC SW (VOUT2R) P-CTR IN 3-2 CIRCUIT AUX R (OTL) 12 convertor 1stAMP (DC/AC) AMP 50 DAC SUB Woofer IN 3-3 DAC EVR (VOUT3L) phase IN 3-4 49 R.S.E Control 13 det R-CTR SD REAR R EVR Center BUS 2ndMIX REAR L EVR Selector DAC EVR (VOUT3R) 48 14 charge pump NAV O DAC 47 15 AUDIO MUTE NAV P DAC Diversity AFC CIRCUIT CIRCUIT DETECTOR RDS 46 NAV N Digital Interface ANT selector Decoder 16 PLL & VCO Receiver CCB Interface BCLKO CURRENT 45 IIS Digital Input 17 DRIVER LOGIC LRCKO 44 COUNTER 2.7V REG FDATO 18 Time constant DIVIDER 43 generator 450kHz

19 DI CL

42 CE DO 3V REG 450kHz XIN

MAIN FIX XTAL VCO PDO IIS IN RSTB BUSY

NOIZE AMP XOUT PWDB

OUTPUT IIS WS RDS_C RDS_D DIR CD CIRCUIT IIS CLK

20 OSC 41 DIR MD RDS_ID

BUFFER DIR AUX

22 2321 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

XTAL 10.25MHz

9 Car Audio 10 Car Audio For Automotive AV Equipment

Car Audio DSP System Chipsets The LC75010W is a system-on-chip audio DSP that integrates A/D and D/A converters, a DSP core and all other required functions on the same chip, making it optimal for use in car audio systems. It is provided as a custom IC that includes DSP software that conforms to user specifications.

Car Audio DSP LC75010W P13 Hardware configuration •Analog source selector (Single-sided inputs: 3 channels, differential inputs: 1 channel) •A/D converter (stereo, one system) Audio-DSP:LC75010W P13 •DSP core •Program ROM and data RAM Input source •D/A converter (4 channels) •Electronic volume control (4 channels) MD •Microcontroller interface (CCB: A SANYO-designed bus format) DSP Software functions (example) Bass/Tre/Mid Radio •Equalizer function Analog EQ function D/A A/D Power •Bass, middle, and treble control functions Source Dedekind* EVR (2ch) IC •Balance and fader functions Selector (4ch) •Volume control CD •Dedekind functions ROM RAM •User-specified DSP software functions Package: SQFP100 (14 14) AUX

MPU P23 to 26 For rear seat audio LC877 Series P14 LC87F7XXX For Microcontrollers Control Wide Range of RAM and ROM Options LC875 Series Dolby Headphone LC87F5XXX Microcontroller with On-Chip LCD Drivers Signal Control Microcontrollers LC83200W LC877 Series P25 to 26 LC875 Series P23 to 24 •ROM: 24 K to 128 KB •RAM 1536 to 4096 9bits •This series is optimal since the abundant internal •VDD: 5 V (300 ns), 2.5 V (750 ns) RAM can be used for smooth data management. •DC control software packages are available, and ROM: 8 KB to 256 KB custom development can be easily supported. RAM: 1024 to 8192 9 bits •Package: Refer to the package lineup. P26 Flash memory version P23 to 24 All products described in this catalog contain developed products or products that are diverted from general types. In accordance with standard Flash memory version P25 to 26 of quality management system ISO/TS16949 for automotive industry, there is a case where all demanded articles couldn't be supported, so please confirm to the salesman of our company at every order. CCB is a SANYO’s original bus format and all the bus addresses Dedekind function(Dedekind*) is Dedekind R&D's trade name. are controlled by SANYO. Flash products are licensed from Silicon Storage Technology, Inc.,(USA), and manufactured and sold by SANYO Electric Co., Ltd. Manufactured under license from Dolby Laboratories. R "Dolby" and the double-D symbol are trademarks of Dolby Laboratories. Confidential unpublished works. Copyright 1998–1999 Dolby Laboratories. All rights reserved.

Extensive lineup provides full support for a wide range of systems

AM/FM Tuner Block SVC273 (CR (C2.0V/C8.0V) ≥3.1, Q ≥100) Transistors for AM and FM buffers Other transistors (power supply, interface, and switch drive) *: SV272, SV273: MCPH3 miniature package (2.1 2.0 mm) 2SC2812N (V = 50 V, I = 150 mA, f = typ 100 MHz), Bipolar transistors: 50C02CH (V = 15 V, I =1 A, V (sat) = max 280 mV) Varactor diodes for AM tuning CEO C T CEO C CE JFET and transistors for AMP amplifiers 2SC2814 (V = 20 V, I = 30 mA, f = typ 320 MHz) (NPN) 2SC5706 ( V = 50 V, I = 5 A, V (sat) = typ 90 mV) SVC354 (3 diodes), SVC364 (4 diodes), SVC371 (6 diodes) CEO C T CEO C CES CPH5901 (high gain, typ 50 ms), CPH5905 (High ESD resistance type) PIN diodes for AM AGC and switching 2SD1913 (V = 60 V, I = 3 A, PC = 20 W, h 70 to 280) Varactor diodes for FM tuning CEO C FE Dual gate MOSFETs for FM amplifiers Series with rs = typ 5 Ω: ISV247, ISV233, ISV246, ISV234, CPH5512 MOSFET: 5LN 01M (V = 50 V, I = 100 mA R (on) SVC230 (CR (C2.0V/C8.0V) ≥1.65, Q≥100) DSS D DS 3SK263 (V = 15 Vmin, I = 2.4 to 24 mA, yfs = typ 14 ms), PIN diodes for FM AGC and switching (Nch) = 9.9 Ω) SVC243 (CR (C1.0V/C6.5V) ≥7.0, Q ≥40) DS DSX GS 3SK264 (V = 15 V, I = 5.0 to 24 mA, yfs = typ 17 ms) Series with rs = typ 6 Ω: ISV294, ISV315, ISV316, ISV298H CPH6424 (V = 60 V, I = 3 A R (on) SVC272 (CR (C2.0V/C8.0V) ≥2.3, Q ≥150) DS DSX DSS D DS typ 150 mΩ)

11 Car Audio 12 Car Audio Car Audio DSP Dolby Headphone IC

LC750100WLC75010WW LC83200WLC83200W R Overview Overview

The LC75010W is a 1-chip DSP that is ideal for car stereos as it incorporates major required functions The LC83200W is an IC that integrates the functions required for Dolby Headphone on one chip. It such as A/D, D/A, and a DSP core. This is a custom IC that incorporates DSP software based on the user generates a Dolby Headphone audio output signal from either a 5.1-channel or 2-channel audio input. specifications. The LC83200W provides DH1, DH2, DH3, and Stereo Mixdown as room modes and can be used in all products that have a headphone pin.

Features Features ■ Supports Dolby Headphone room modes DH1, DH2, DH3, and Stereo Mixdown. ■ ■ Analog source selector ■ Analog characteristic (S/N) Sampling rate of 44.1/48 kHz ■ ◆Single input: 3 systems, differential input: 1 system ◆Typ. 90 dB (Note) Audio serial input: 2 channels (L, R) or 5.1 channels (L, C, R, Ls, Rs, LFE) ■ ■ A/D ■ Analog characteristic (dynamic range) Audio serial output: 2 channels (L, R) ■ ◆Stereo: 1 system ◆Typ. 90 dB (Note) External memory not required ■ ■ DSP core ■ Analog characteristic (THD + N) 50 MHz internal operation frequency (External clock: 27 MHz/13.5 MHz or 512/256 fs clock) ■ ◆24-bit fixed decimal point DSP ◆Typ. -85 dB (Note) 2 power supplies (Logic block: 2.5 V; I/O block: 3.3 V) ■ ■ D/A ■ Power supply voltage (5 V) PLL stop (PLL STOP pin) ■ ◆4 systems ◆4.75 V to 5.25 V Registers can be controlled through serial setting via microcontroller I/F or parallel setting via pins. ■ ■ Analog volume ■ Power supply voltage (3.3 V) Package: SQFP48 (7 7) ◆4 systems ◆3.0 V to 3.6 V ■ Microcontroller interface ■ Operating ambient temperature ◆ ◆ ° ° 1 system (SANYO Electric original format) -40 C to 85 C Manufactured under license from Dolby Laboratories. (CCB: Computer Control Bus) ■ Package: SQFP100 (14 14) "Dolby" and the double-D symbol are trademarks of Dolby Laboratories. R Confidential unpublished works. Copyright 1998–1999 Dolby Laboratories. Note: Analog characteristics are according to SANYO Electric measurement conditions. All rights reserved. CCB is a SANYO’s original bus format and all the bus addresses are controlled by SANYO. Block Diagram Block Diagram

VFLO C 1µ SCLOCK SDI0,1,2

R SDO Als3 DAC VFLI LRCLOCK Als4 DSP · CORE (24bit) L.P.F (24bit) AOUT1 Vref VFRO 3 AINLP1 C 1µ AINLN1 R RESET /STOP ADC DAC VFRI AINRP1 (20bit) (24bit) L.P.F R AINRN1 AOUT2 RESET RESET AINLP2 Vref VRLO MCLOCK AINRP2 C 1µ Program ROM AINLP3 ADC R VRLI VCNT PLL SYS CLK (8kw) DAC PLL AINRR3 (20bit) L.P.F PLL STOP AINLP4 (24bit) Analog Source Selector Analog Source AOUT3 Data I/O I/F STOP AINRP4 Vref VRRO PDO C 1µ R Ars3 DAC VRRI Output registers Input registers Ars4 (24bit) L.P.F LR LR AOUT4 Vref Ls Rs Data RAM C LFE Data (896w) DVDD 3.3V RAM

DVSS 11.5k X 24bits

AVDD ENABLE 5V CLOCK FIR Filter PLL AVSS CCB VCO Host I/F Core VCO VREF DATA (DSP) Program Control register ROM 15k X 32bits DI CL CE DO XIN INTB BUSY RESB XOUT PWDB TEST14

13 Car Audio 14 Car Audio Car Audio CD/MP3/WMA For Automotive AV Equipment

System Chipsets Supports system simplification by providing both single-chip CD signal processing with built-in analog signal processing and an MP3 decoder with built-in CD-ROM decoder.

...... New product

...... Under development Digital Servo Integrated RF Amplifier DRAM MP3 Decoder + CD-ROM Decoder System-on-Chip IC L R LC78684E* P18 LC78648NEH* P17 CD CD signal processing •Low power: Operates on 1.8 V internally and 3.3 V externally •Servo error amplifier Hardwired structure adopted for all decoding •Automatic adjustment Mechanism Digital servo MP3 decoder functions •Defect and jitter detection + CD-DSP with built-in CD-ROM decoder •Antishock control •Digital servo signal processing RF amplifier + (CD-DA playback mode: up to 180 s) •Audio CD playback Spindle motor LC78648NEH Antishock Pickup •Supports memory card playback at external •Jitter-free playback (VCEC) P17 LC78684E P18 MPEG data input •Simplified CLV playback •CD-ROM (MP3) playback function •2X-speed playback Feed motor •Digital audio output from LRCK, BCK, •Supports AGC and CD-R/RW playback and DATA signals (serial data) •Mechanical shock detection, interruption WMA decoder •Digital bass boost function (4 modes) and detection attenuator function LC78685V •Error detection and correction •Serial microcontroller interface Drivers P19 (dual errors in both C1 and C2) •Package: QFP80 (14 14) •8X oversampling digital filters LA6541ND P27 LV8280T P32 •Package : QFP80 (14 14) LA6541NH P28 LV8222W P33 LA6548ND P29 LV8212T P34 LA6548NH P30 LA6565 P31

MPU P23 to 26 WMA* Decoder LC877 Series LC78685V P19 LC87F7XXX For Microcontrollers Control Wide Range of RAM and ROM Options LC875 Series WMA decoder LC87F5XXX Microcontroller with On-Chip LCD Drivers Signal Control Microcontrollers •Supports WMA version 8 •Bit rates: 192 bps to 32 kbps P23 to 24 LC877 Series P25 to 26 LC875 Series •Sampling frequency: 22.05 kHz to 48 kHz •ROM: 24 K to 128 KB Digital attenuator •This series is optimal since the abundant internal Package: SSOP24 (275mil) •RAM 1536 to 4096 9bits KEY LCD/LED •VDD: 5 V (300 ns), 2.5 V (750 ns) RAM can be used for smooth data management. •DC control software packages are available, and ROM: 8 KB to 256 KB custom development can be easily supported. RAM: 1024 to 8192 9 bits •Package: Refer to the package lineup. P26 Flash memory version P23 to 24 LAN drivers Flash memory version P25 to 26 CARNET P1 to 2 CAN P1 to 2 MOST P1 to 2 LA2330W P3 LA2360M P5 . 22 LA2340M P6 . 21 LA2333T P4 LA2361AM P5 LV2341M P6 . 21 Flash products are licensed from Silicon Storage Technology, Inc.,(USA), and manufactured and sold by SANYO Electric Co., Ltd. LA2351M P4 . P20 LA2361JM P5

*WMA (Windows Media Audio) All products described in this catalog contain developed products or Windows MediaTM is a trademark or registered trademark of products that are diverted from general types. In accordance with standard Microsoft Corporation in the US and other countries. of quality management system ISO/TS16949 for automotive industry, there is a case where all demanded articles couldn't be supported, so please Requires a priori consultation with your SANYO sales confirm to the salesman of our company at every order. * representative or SANYO business office before their use. Extensive lineup provides full support for a wide range of systems AM/FM Tuner Block SVC273 (CR (C2.0V/C8.0V) ≥3.1, Q ≥100) Transistors for AM and FM buffers Other transistors (power supply, interface, and switch drive) *: SV272, SV273: MCPH3 miniature package (2.1 2.0 mm) 2SC2812N (VCEO = 50 V, IC = 150 mA, fT = typ 100 MHz), Bipolar transistors: 50C02CH (VCEO = 15 V, IC=1 A, VCE (sat) = max 280 mV) Varactor diodes for AM tuning JFET and transistors for AMP amplifiers 2SC2814 (VCEO = 20 V, IC = 30 mA, fT = typ 320 MHz) (NPN) 2SC5706 ( VCEO = 50 V, IC = 5 A, VCEO (sat) = typ 90 mV) SVC354 (3 diodes), SVC364 (4 diodes), SVC371 (6 diodes) CPH5901 (high gain, typ 50 ms), CPH5905 (High ESD resistance type) PIN diodes for AM AGC and switching 2SD1913 (VCEO = 60 V, IC = 3 A, PC = 20 W, hFE 70 to 280) Varactor diodes for FM tuning Dual gate MOSFETs for FM amplifiers Series with rs = typ 5 Ω: ISV247, ISV233, ISV246, ISV234, CPH5512 MOSFET: 5LN 01M (VDSS = 50 V, ID = 100 mA RDS (on) SVC230 (CR (C2.0V/C8.0V) ≥1.65, Q ≥100) 3SK263 (VDS = 15 Vmin, IDSX = 2.4 to 24 mA, yfs = typ 14 ms), PIN diodes for FM AGC and switching (Nch) = max 9.9 Ω) SVC243 (CR (C1.0V/C6.5V) ≥7.0, Q ≥40) 3SK264 (VDS = 15 V, IDSX = 5.0 to 24 mA, yfs = typ 17 ms) Series with rs = typ 6 Ω: ISV294, ISV315, ISV316, ISV298H CPH6424 (VDSS = 60 V, ID = 3 A RDS (on) SVC272 (CR (C2.0V/C8.0V) ≥ 2.3, Q ≥150) typ 150 mΩ)

15 Car Audio 16 Car Audio

Super System-on-Chip Digital Servo IC with On-Chip RF SystemCompact Disc Player MP3 Decoder

Conditional ❋ : Use of conditional products requires ❋ : Use of conditional products requires Product consultation with a SANYO representative consultation with a SANYO representative prior to the use of the device. Conditional prior to the use of the device. Under Product LC78648NEH development Overview Overview The LC78648NEH integrates, on a single chip, the RF signal processing, servo control, EFM signal processing, The LC78684E integrates, on a single chip, CD-ROM signal-processing functions, MP3 signal-processing and audio signal processing required for audio CD playback. functions, and CD-DA anti-skip signal-processing functions. This single IC can perform all the CD data signal processing required to convert the signal read from the disc to These signal-processing functions are implemented as hard-wired circuits for reduced power consumption. an analog audio signal. A basic CD player system can be implemented with just three ICs The LC78684E, in combination with a CD DSP, DRAM, an audio D/A converter, and other devices can (this IC, a microcontroller, and a driver IC) and a minimal number of external components. implement CD players that provide playback of MPEG layer 3 (MP3) audio recorded on CD media as well as anti-skip CD-DA playback. Features Features ■ Playback functions ■ EFM processing block ■ MP3 (MPEG audio standard ISO/IEC 11172-3 layer 3) decoder functions ◆Playback speeds: 1 , 2 - CD-R/W: 1 , 2 ◆Error detection and correction (C1: double, C2: double) ◆Decoding and outputLC78684E as a digital audio signal of MP3 data decoded by the CD-ROM decoder ◆Jitter-free playback (VCEC) ◆Jitter margin: ±4 frames ◆Supports all bit rates including variable bit rate decoding ■ RF processing block ◆DOUT output ◆Supports the following sampling frequencies ◆RF system: AGC, CD-R and R/W playback, peak hold, bottom hold ◆Built-in text decoder ◆MPEG1 (Fs = 32, 44.1, and 48 kHz) ◆Error system: Variable balance TE signal playback, FE signal playback ◆EFM signal sync detection, protection, and interpolation ◆MPEG2 (Fs = 16, 22.05, and 24 kHz) ◆Detection: Track count signal, jitter, defect (black and mirror) ■ Audio processing block ◆MPEG2.5 (Fs = 8, 11.025, and 12 kHz) ◆Laser power control ◆Interpolation (4 sample interpolation) ◆Supports readout of the MPEG header information and ancillary information ◆DC offset voltage cancellation ◆Digital attenuator ◆Provides automatic muting on CRC errors using an MP3 CRC check function ■ Servo control block ◆Deemphasis filter ◆MPEG data external serial input function supports memory card playback ◆Implements all servo functions (tracking, focus, sled, and spindle) in digital ◆1-bit D/A converter (third-order ∆∑ noise shaper converter) ■ CD-ROM decoder functions ◆Automatic control function: Focus gain, focus bias, focus offset, tracking ◆8 oversampling digital filters ◆Support for CD-ROM mode 1 and mode 2 (form 1 and form 2) gain, tracking offset, tracking balance ◆Fadeout function ◆CD-ROM error correction function for faithful decoding of data written to CD-ROM discs ◆Mechanical shock detection ◆Bilingual function ◆Header and sector management ◆Interruption detection ◆Built-in second-order audio output low-pass filter ◆Supports up to 4 speed playback ◆Supports external supply of the digital filter and D/A converter clock ◆In addition to data buffering also supports C2 error flag buffering ■ Supply voltage: 3.3 V ◆Can provide external serial output of the decoded CD-ROM data ■ Package: QFP80 (14 14) ■ CD-DA playback functions (anti-skip support) ❋:This product is subject to change without notice for improvement. When considering the use of this ◆Up to 180 seconds of skip-proof operation when 64M of DRAM is used product, first refer to the latest SANYO "Semiconductor News" publication related to this device and ◆Provides compressed/uncompressed selection as well as a data through output function Block Diagram finally refer to the latest specifications for the device. ◆VCEC (variable speed) function supports up to 4 speed playback ■ Audio signal processing ◆Serial audio signal output using the LRCK, BCK, and DATA signals (Output supports the I2S format, 16- or 20-bit PCM output precision, 16-, 24-, and 32-bit output modes selectable for data-slot output) PHLPF/RFMON MONITOR ◆Digital bass boost function (4 modes), attenuator function, and muting (-∞, -12 dB) function ◆Base clock (384 Fs) output pin for external digital filters and D/A converter VREF VREF FDO TDO ■ DRAM interface LDD D/A D/A SPDO ◆ LDS Supports use of 1 to 64M bits of external memory (EDO, 2 CAS, 16-bit data bus memory) SLDO ◆A user area can be allocated in DRAM during CD-ROM (MP3) playback LPF AUTO AVDD1 ■ Supply voltages ADJUST RF RAM AVSS ◆Internal: 1.8 V AIN SERVO AVDD2 PROCESSEROR ◆I/O: 3.3 V CIN TRACK RUPTURE ◆ BIN APC JUMP DEFECR Analog system: 3.3 V DIN ■ Package: QFP80 (14 14) CLA DEFECT FEC CAV DRF RF SIGNAL CONTROL DRF ❋:This product is subject to change without notice for improvement. When considering the use of this PROCESSOR product, first refer to the latest SANYO "Semiconductor News" publication related to this device and EIN finally refer to the latest specifications for the device. FIN VPB Block Diagram TEC FOCUS ERROR CPU I/F TE PROCESSOR CL TEIN CE TRACKING DI JITTC ERROR PORT DO WEB OEB CASLB CASUB RASB MADRS[12:0] MDATA[15:0] CL CE CMDIN CMDOUT INTB PROCESSOR WRQB

SLCO CONT1 to 6 JITTER/DETECT EFMIN OUT1 CPU-I/F

PDO1 SLICE LEVEL CKIN PDO2 CONTROL FRAME SYNC VPRFR DETECT,PROTECT SystemVCOC PCKIST INSERT FSEQ EFM DECODE Clock-genVPDO DRAM-I/F VVDD CKOUT VVSS PLL VCO ERROR FSX + PLL XVDD RAM CORRECTION EFLG XVSS C2F XIN STREQ WOK STCK MONITOR SIGNAL MONI 1 to 5 XOUT CNTOK CLOCK INTERPOLATION SELECTOR Data-I/F STDAT F16MIN OVF Anti-Shock CDROM GENERATOR CRCF F16MOUT MUTE Compressed, uncompressed Decoder

ATTENUATION ASLRCK EXTERNAL SUBCODE DECODE CRC & ASDACK TEXT LRSY AUDIO IN DATACK MP3 ASDFIN Decoder FSYNC DATAIN 8FS DIGITAL C2FIN RVDD FILTER AUDIO OUT DOUT SFSY RCHO DEEMPHASIS PW M SERIAL U LRVSS LPF LRSY SBSY X LCHO 1bit DAC OUT DATACK SBCK LVDD DATA

RESB DVDD RESB Audio I/F ADLRCK TEST DVDD ADBCK IOMODE DVSS ADDATA DVSS

17 Car Audio 18 Car Audio

WMA Decoder 7.5 Mbps Automotive LAN Transceiver

Conditional ❋ : Use of conditional products requires Product consultation with a SANYO representative prior to the use of the device. NewNew LC78685V productproduct LA2351M Overview Overview The LC78685V is a WMA❋ decoder IC. This IC is implemented using a dedicated hard wired circuit structure The LA2351M is a low-noise transceiver IC for automotive LANs. to achieve low power consumption. Various format (CD-DA, MP3, and WMA) audio data recorded on CDs can be played back by adding this IC to a system structure consisting of a CD player signal-processing IC and a Functions CD-MP3 IC (such as the LC78684). ■ Transmitter block The LC78685V makes it easy to implement CD players that provide multiformat decoding functions. ◆A/D converter (3 bits) ◆Low-pass filter (for EMI prevention) Features ◆Output driver ■ Receiver block ■ WMA (Windows Media Audio) decoding functions ◆Reception amplifier ◆Supports version 8 ◆Noise rejection low-pass filter (for the received signal) ◆Bit rates: 32 to 192 kbps ◆Comparator (for waveshaping) ◆Sampling frequencies: 22.05 kHz to 48 kHz ◆Header information readout function ◆Automatic framing error recovery function ■ Audio data functions Features ◆WMA playback mode : Serial audio signal output using the LRCK, BCK, and DATA signals ■ Accepts either 3-bit digital or stepped waveform signals as the input signal. (Output supports the I2S format, 16- or 20-bit PCM output precision, 16-, 24-, and 32-bit output modes selectable for If a 3-bit digital signal cannot be used due to EMI and wiring issues, provide an R-2R ladder near the protocol chip and connect the data-slot output) D/A converted signal to the low-pass filter input. : Attenuator and muting (-∞, -12 dB) functions ■ A 5 Mbps or 7.5 Mbps automotive LAN can be implemented by combining the LA2351M with an automotive LAN : Base clock (384 Fs) output for external digital filters and D/A converter protocol IC (ARCNET controller TMC20040C series device). ■ Audio data other than WMA ■ The low-pass filter required for adjustment is built in ◆The system clock and audio data input to the CKIN, LRCKIN, BCKIN, and DATAIN pins is output directly without ■ Supports low-noise data communication change from the CKOUT, LRCKO, BCKO, and DATA pins. That is, CD-DA and MP3 playback data from the LC78684 is directly ■ Package: MFP30SD (375 mil) output to the D/A converter. ■ Supply voltages ◆Internal: 1.8 V ◆I/O: 3.3 V Block Diagram ■ Package: SSOP24 (275 mil)

❋ : WMA: Windows Media Audio Windows Media is a registered trademark of Microsoft Corporation in the US and other countries. µF 0.1 Block Diagram VCC µ 0.1 F External DAC 3.3 µF µF µF 0.1 0.1µ 0.1 µ F RADO F TXEN V TXI1 TXI2 TXI0

CC µF 0.1 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 STRDY CE CL CMIDIN CMIDOUT 0.1

CKIN Clock DAC LPF Driver CKOUT Generator MICOM I/F Amp

WMA Receiver Amp DEMAND Decoder Noise Filter ZCSWMA Input STCKIN Buffer STDATIN Main Memory Comparater V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 CC

µF Ω µ 0.1 F 2.2k F µ 0.1 LRIN LRCKO Ω 0.1 33k 3.3 0.1 0.1 µF Audio VCC µF µ 0.1µF Ω BCKIN BCKO 0.1 F 330k Output DATAIN DATAO COMP OUT-OFFCOMP 330kΩ OUT PUT 3.3V GND GND CONTROLBIAS RESB VCC µF 2.2kΩ TEST DATA OUT

19 Car Audio 20 Car Audio

POF 50 Mbps Automotive LAN

Under Under LA2340M/LV2341Mdevelopment LA2360M development Overview Overview The LA2340M is an I/V converter that can form an OEC (optical-electrical converter) when combined with a The LA2360M is a CAN transceiver. photodiode. Functions The LV2341M is an LED driver that can form an EOC (electrical-optical converter) when combined with an LED. ■ Transmitter block ◆ Low-pass filterCAN (for EMI Transceiver prevention) Features ◆ Output driver ■ ■ These ICs can form a POF-based 50 Mbps automotive LAN Receiver block ■ Standby function ◆ Attenuator ◆ Comparator

Features ■ Conforms to the ISO 11898 standard ■ Transmission speed: 1 Mbps ■ Up to 100 nodes can be connected ■ Package: MFP8 (225 mil)

❋:This product is subject to change without notice for improvement. When considering the use of this product, first refer to the latest SANYO "Semiconductor News" publication related to this device and finally refer to the latest specifications for the device. Block Diagram

5V 0.1µF R µF TXD 10 VREF RS VCC P8 1 8 5 3 0.1 10 µF µF VCC SW P7 Protection VCC 15k 0.1µF 3.3µF AGC VCC P6 Ajdust GND GND

P5 5 4 P1 IV PT9 PT8 LPF PT2 PT7 Acceleration capacitor OUT Driver AMP. PT1 LED AMP PT6 IN 1 Driver 3 per-Amp ATT. Comparator Standby mode control

GND CMP

GND 2 P2 PT5 PT4 PT3 4 6 7 2 P3 P4 RXD CANL CANH GND

60Ω Bus line Ω

21 Car Audio 22 Car Audio

LC875LC875SeriesSeries Flash ROM Versions LC87F5BP6A, LC87F5CC8A, LC87F5DC8A, LC87F5864B, LC87F5G32A, LC87F5JC8A

Overview

The LC875 Series are 8-bit microcontrollers based on a CPU core that operates with a minimum instruction cycle time of 100 ns and feature a rich set of peripheral functions. These peripheral functions include two multifunction 16-bit timer/counter circuits that can be split into 8-bit timers, four 8-bit timers with built-in prescaler, a clock time base timer, two synchronous SIO circuits with an automatic transfer function, a synchronous/asynchronous SIO circuit, two 12-bit PWM circuits, a 12-input 8-bit A/D converter, a high-speed 8-bit parallel interface, a LC875 Series Product System high-speed clock counter, a system clock divider function, and a powerful interrupt system. FLASH LC875BXX FLASH New product 100 pinsRAM: 4/6 K Features Under FLASH ■ Timers ■ Remote controller receiver LC875CXX development ● One 16-bit timer/counter with capture register (shared function of the P73/INT3/TOIN pin) RAM: 2/4 K Under (can be divided and used as two 8-bit timers) ■ Watchdog timer development ● One 16-bit timer/counter with PWM/toggle output function (using external resistor and capacitor components) 80 pins FLASH (can be divided and used as two 8-bit timers) ■ Interrupts (Multiple interrupt control with three levels LC875DXX RAM: 2/3/4 K New product ● Four 8-bit timers with 6-bit prescaler function : low level (L), high level (H), and highest level (X)) ● Clock time base timer ● 26 sources/10 vectors (LC875B series)

■ High-speed clock counter ● FLASH 21 sources/10 vectors (LC8752/54/5A series) 64 pins LC875JXX New product This circuit can count up to 20 MHz clock signals when a ● 20 sources/10 vectors (LC8757/55 series) RAM: 2/3/4 K 10 MHz main clock frequency is used. ■ High-speed multiply and divide instructions New product ■ SIO ● 16 bits 8 bits (execution time: 5 tCYC) ● FLASH Two 8-bit SIO circuits with automatic transfer function ● 24 bits 16 bits (execution time: 12 tCYC) LC8758XX 48 pins RAM: 1 K Two 8-bit baud rate generator circuits included ● 16 bits ÷ 8 bits (execution time: 8 tCYC) Maximum clock frequency: 4/3 tCYC ● 24 bits ÷ 16 bits (execution time: 12 tCYC) ● One 8-bit synchronous/asynchronous SIO circuit ■ System clock divider function LC875GXX FLASH Asynchronous operation: 8 to 2048 tCYC, ● 36 pins Standby functions RAM: 1 K synchronous operation: 2 to 512 tCYC ● Halt mode: instruction execution is stopped, peripheral ■ AD converter: 8-bit converter with 12 input channels circuit operation continues ■ ● FLASH PWM: Two 12-bit variable period PWM generator circuits Hold mode: instruction execution is stopped, peripheral LC875XXX FLASH ■ Parallel interface circuit operation is stopped RAM: 0.5 K Planned product Provides a polarity reversing function. Readout and write ● Crystal hold mode: instruction execution is stopped, operations can be performed in 1 tCYC cycle. peripheral circuit operation other than the clock time base 100 pinsROM(KB)8 16 80 24pins 3248 56 64 72 64 pins80 96 112 128 144 48160 pins 176 192 256 36 pins timer is stopped.

Lineup Package Lineup ■ LC875B Series (100 pins) ■ LC875D Series (80 pins) ■ LC8758 Series (64 pins)

● ROM: 176 to 256 KB ● ROM: 48 to 96 KB ● ROM: 16 to 32 KB

● RAM: 4096 to 6144 9 bits ● RAM: 2048 to 4096 9 bits ● RAM: 1024 9 bits QIP100E(14 20) QIP80E(14 20) QIP64E(14 14) QIP48E(14 14) MFP36SDJ(375mil) ■ LC875C Series (100 pins) ■ LC875J Series (64 pins) ■ LC875G Series (48 pins) TQFP100(14 14) TQFP80J(12 12) DIP64S(600mil) DIP36S(400mil) ● ROM: 48 to 128 KB ● ROM: 48 to 128 KB ● ROM: 8 to 32 KB

● RAM: 2048 to 4096 9 bits ● RAM: 2048 to 4096 9 bits ● RAM: 1024 9 bits QFP80(14 14) SQFP64(10 10) TQFP64J(7 7)

All products described in this catalog contain developed products or products that are diverted from general types. In accordance with standard of quality management system ISO/TS16949 for automotive industry, there is a case where all demanded articles couldn't be supported, so please ❋ : The packages listed above are representative types. confirm to the salesman of our company at every order. The content of this catalog is current as of June 2004 but is subject to change without notice for improvements to the products. Flash products are licensed from Silicon Storage Technology, Inc.,(USA), and manufactured and sold by SANYO Electric Co., Ltd. Accordingly, when considering using these products, always contact your SANYO representative for the latest delivery specifications for these products.

23 Car Audio 24 Car Audio

LC877LC877SeriesSeries Flash ROM Versions LC87F7CC8A, LC87F7BC8A

Overview

The LC877 Series are 8-bit microcontrollers based on a CPU core that operates with a minimum instruction cycle time of 100 ns and feature a rich set of peripheral functions. These peripheral functions include 24 to 128 KB of ROM, 2048, or 4096 bytes of RAM, an LCD display controller/driver, a multifunction 16-bit timer /counter circuit that can be split into 8-bit timers, a 16-bit timer/PWM generator that can be split into 8-bit timers, four 8-bit timers with built-in prescaler, a clock time base timer, a high-speed clock counter, a system clock divider function, a synchronous SIO circuit with an automatic transfer function, a synchronous /asynchronous SIO circuit, an 8-bit A/D converter, a small-signal detection circuit, and a powerful interrupt system.

Features LC877 (LCD) Series Product System ■ LCD display controller/driver ■ AD converter LC877B FLASH (48 segments 4 common signals) 15-input 8-bit A/D converter (LC877B series) Current product ■ Small-signal detection circuit ■ Remote controller receiver RAM: 1.5/2/4 K LCD 48 4 (for microphone and similar signals) (shared function of the P73/INT3/TOIN pin) ■ Timers ■ Watchdog timer Current product 100 pins LC877C FLASH ● One 16-bit timer/counter with capture register (using external resistor and capacitor components) RAM: 1.5/4 K (can be divided and used as two 8-bit timers) ■ Interrupts LCD 32 4 Under development ● One 16-bit timer/counter with PWM/toggle output function 20 sources/10 vectors (LC877B series) 80 pins (can be divided and used as two 8-bit timers) (Multiple interrupt control with three levels: low level (L), LC8770XX FLASH ● Four 8-bit timers with 6-bit prescaler function high level (H), and highest level (X)) RAM: (LC877B series) ■ High-speed multiply and divide instructions 64 pins LCD 24 4 ● Clock time base timer ● 16 bits 8 bits (execution time: 5 tCYC) ROM(KB)8 16 24 3248 56 64 7280 96 112 128 144 160 176 192 256 ■ High-speed clock counter ● 24 bits 16 bits (execution time: 12 tCYC) This circuit can count up to 20 MHz clock signals when ● 16 bits ÷ 8 bits (execution time: 8 tCYC) a 10 MHz main clock frequency is used. ● 24 bits ÷ 16 bits (execution time: 12 tCYC) ■ Serial interface circuits ■ System clock divider function Package Lineup ● 8-bit synchronous serial interface ■ Standby functions ● 8-bit synchronous/asynchronous serial interface ● Halt mode: instruction execution is stopped, 100 pins 80 pins 64 pins peripheral circuit operation continues ● Hold mode: instruction execution is stopped, QIP100E(14 20) QFP80(14 14) TQFP64J(7 7) peripheral circuit operation is stopped SQFP100(14 14) TQFP80J(12 12) QIP64E(14 14) ● Crystal hold mode: instruction execution is stopped, peripheral circuit operation other than the clock time TQFP100(14 14) base timer is stopped

Lineup

■ LC877C series ■ LC877B series ● ROM: 24 to 48 KB ● ROM: 24 or 128 KB ● RAM 2048 9 bits and 4096 9 bits ● RAM 2048 9 bits to 4096 9 bits All products described in this catalog contain developed products or products that are diverted from general types. In accordance with standard of quality management system ISO/TS16949 for automotive industry, there is a case where all demanded articles couldn't be supported, so please confirm to the salesman of our company at every order.

❋ : The packages listed above are representative types. The content of this catalog is current as of June 2004 but is subject to change without notice for improvements to the products. Accordingly, when considering using these products, always contact your SANYO representative for the latest delivery specifications for these products. Flash products are licensed from Silicon Storage Technology, Inc.,(USA), and manufactured and sold by SANYO Electric Co., Ltd. 25 Car Audio 26 Car Audio

Four-Channel Driver IC for CD Players/Decks LA6541ND LA6541NMLA6541NH Overview Overview

The LA6541ND is a 4-channel driver for CD players/decks that features BTL amplifier circuits in all four channels. The LA6541NH is a 4-channel driver for CD players/decks that features BTL amplifier circuits in all four channels. Four-Channel Driver IC for CD Players/Decks

Functions and Features Functions and Features ■ Four power amplifier (BTL connection) circuits ■ Four power amplifier (BTL connection) circuits ■ Iomax: 0.7 A ■ Iomax: 0.7 A ■ Built-in level shifter circuits ■ Built-in level shifter circuits ■ Built-in muting circuit mutes all outputs (This circuit operates for the BTL ■ Built-in muting circuit mutes all outputs (This circuit operates for the BTL amplifier channels but does not affect the regulator circuit.) amplifier channels but does not affect the regulator circuit.) ■ Built-in regulator (5 V output, requires an external pnp transistor) ■ Built-in regulator (5 V output, requires an external pnp transistor) ■ Thermal shutdown circuit ■ Thermal shutdown circuit ■ Package: DIP30SDLF (400 mil) ■ Package: HSOP28H (375 mil)

Block Diagram Block Diagram

VCC1 1 30 VCC1 1 28 MUTE 2 - 29 - Muting (output on/off) + MUTE 2 Muting (output on/off) + 27 15.4k 15.4k 15.4k 15.4k VIN1 3 11k - - 11k 28 VIN1 3 11k - 26 11k + + + -+ VG1 4 27 VCC2 VG1 4 25 VCC2 VO1+ VO1+ 5 26 VREF 5 24 VREF

VO1 VO1 6 25 VIN4 6 23 VIN4 ( NC- ) 7 22 - GND- 7 24 VG4 Level shifter Level shifter VG4 Level shifter Level shifter -

GND 23 VO4+ VO4+

VO4 GND 22 VO4 ( NC ) - - FR8 + FR21 ( NC ) + 21 GND 9 20 VO2+ 8 20 GND GND GND VO2+10 19 VO2VG2- 9 19 VO3- GND VO2VG2- 11 18 VO3- ( NC ) VIN2 10 18 VIN212 17 REG-C 11 VO3+ 17 REG-C 13 16 VO3+ 15.4k Level shifter Level shifter REG-B 12 15.4k VIN3G 11k 16 11k REG-B 15.4k 15.4k - - 11k Level shifter Level shifter 11k VIN3G 13 + + VIN3 -+ -+ VIN3 14 Collector connection for the CD external pnp transistor Collector connection for the CD 5V REG RESET external pnp transistor 15 Base connection for the RESET 5V REG RESET external pnp transistor 14 Base connection for the 15 RESET external pnp transistor

27 Car Audio 28 Car Audio LA6548ND

Four-Channel Driver IC for CD Players/Decks LA6548NH Overview Overview

The LA6548ND is a 4-channel driver for CD players/decks that features BTL amplifier circuits in all four channels. The LA6548NH is a 4-channel driver for CD players/decks that features BTL amplifier circuits in all four channels. Four-Channel Driver IC for CD Players/Decks

Functions and Features Functions and Features ■ Four power amplifier (BTL connection) circuits ■ Four power amplifier (BTL connection) circuits ■ Iomax: 0.7 A ■ Iomax: 0.7 A ■ Built-in level shifter circuits ■ Built-in level shifter circuits ■ Built-in muting circuit mutes all outputs (This circuit operates for the BTL ■ Built-in muting circuit mutes all outputs (This circuit operates for the BTL amplifier channels but does not affect the regulator circuit.) amplifier channels but does not affect the regulator circuit.) ■ Built-in regulator (3.3 V output, requires an external pnp transistor) ■ Built-in regulator (3.3 V output, requires an external pnp transistor) ■ Thermal shutdown circuit ■ Thermal shutdown circuit ■ Package: DIP30SDLF (400 mil) ■ Package: HSOP28H (375 mil)

Block Diagram Block Diagram

V 1 CC 1 30 VCC1 1 28 - - MUTE 2 Muting (output on/off) + 29 MUTE 2 Muting (output on/off) + 27 15.4k 15.4k 15.4k 15.4k VIN1 3 11k 28 11k VIN1 3 11k - - 26 11k -+ - + + VG1 V 2 VG1 4 25 4 27 CC VCC2 VO1+ 5 24 VO1+ 5 26 VREF VREF VO1 6 23 VO1 VIN4 VIN4 6 + 25 ( NC- ) 7 22 - GND 7 24 VG4 Level shifter Level shifter VG4

- Level shifter Level shifter - VO4+ GND 23 VO4+ VO4 GND 22 VO4 ( NC ) 8 - 21 - FR + FR ( NC ) + 21 GND 9 20 GND GND VO2+ 8 20 GND VO2+10 19 VO2VG2- 9 19 VO3- GND VO2VG2- 11 18 VO3- ( NC ) VIN2 10 18 VIN212 17 11 REG-C 17 VO3+ REG-C 13 16 VO3+ Level shifter Level shifter REG-B 12 15.4k 15.4k 15.4k 11k 16 VIN3G REG-B 15.4k - - 11k 11k Level shifter Level shifter 11k VG3 13 + + VIN3 -+ -+ VIN3

14 CD Collector connection for the Collector connection for the CD external pnp transistor external pnp transistor 3.3V REG RESET 15 Base connection for the RESET Base connection for the 3.3V REG RESET RESET external pnp transistor 14 external pnp transistor 15

29 Car Audio 30 Car Audio

Five-Channel Driver IC for CD Players/Decks DVD-ROM Spindle Motor Driver IC LA6565 LV8280T Overview Overview The LA6565 is a 5-channel driver for CD players/decks that features BTL amplifier circuits in four channels The LV8280T is a sensorless motor driver IC that provides a reverse torque braking function and is appropriate plus a single H-bridge driver circuit. as the spindle motor driver in CD-ROM/DVD players. This IC adopts a direct PWM drive technique and uses a MOSFET as the output transistor for high-efficiency motor drive. Since this IC can implement motor drive without the use of a Hall effect device, it can be effective in supporting motor system miniaturization, thinner form factors, and reduced power consumption.

Functions and Features Functions and Features ■ Five power amplifier circuits (bridge connection (BTL connection): 4 channels, H bridge: 1 channel) ■ Three-phase full-wave sensorless motor driver ■ Iomax: 1 A ■ Direct PWM drive (low side control) ■ Built-in level shifter circuits (except for the H-bridge channel) ■ MOSFET output ■ Built-in muting circuits (two systems) mute all outputs (This circuit operates for the BTL ■ Synchronous commutation amplifier channels but does not affect H-bridge and the regulator circuit.) ■ Supports switching between reverse torque braking and short-circuit braking ■ Built-in regulator (requires an external pnp transistor and is set with an external resistor) ■ Voltage controlled amplifier ■ Output voltage setting function (for the loading motor channel) ■ Analog input, PWM output ■ Thermal shutdown circuit ■ FG output (Two outputs: single Hall device equivalent FG and three Hall device equivalent FG outputs) ■ Package: HSOP36R (375 mil) ■ Current limiter circuit ■ Thermal protection circuit ■ Standby mode power saving circuit ■ Package: TSSOP30 (275 mil)

Block Diagram Block Diagram

Signal system Thermal shutdown SGND circuit ground Input (Loading motor driver output voltage setting)VCONT COMIN FIL CPC1 CP1 Muting VCOIN RMIN RMAX VCO 1 Controls the on/off state of 36 MUTE1 VCCP2 the corresponding channel. 2 35 MUTE234 High: output on, Charge FWD - 3 low: output off CH2,3,4 34 VIN4 VCO OSC pump VLO+ REV 4 33 + Output control VG + -+ - VO4+ - VCC Phase Waveform 5 To VREFOUT32 comparator synthesis CH1 VIN4 VO4 VLO 6 31 44k -+ VREF-IN COM - Level shifter 7 11k 30 + VREF-OUT FG VS VO3+ 8 (V ) 29 DD REG-OUT Sensorless VO3 BRK drive logic - 9 28 Commutation Power REG IN UOUT system ground S/S logic

Level shifter - ground + REG OUT VREF RF -+ - RF REG-OUT Power system VOUT VIN+OP VO2+ + TSD VIN VO2- 10 -+ 27 WOUT VO1 OP RF - 11 26 - Level shifter To VREFOUT 12 25 - Signal system - VO1+ VIN3VO-OP + 13 power supply 24 + VCCP1 + VIN3 - 14 44k 23 - + VCCS 11k- -

Level shifter - + 15 + 22 44k VIN1+ 11k VIN2 VIN1 16 + 21 - -+ 44k 11k - 17 - 20 VIN2- + VCTL VIN1 -+ VIN2+ 18 19 VCREF

31 Car Audio 32 Car Audio System Motor Driver IC for CD and MD Players

System Motor Driver IC for CD and DVD Players LV8222W LV8212T Overview Overview The LV8222W is a system motor driver IC that integrates, on a single chip, all the motor driver circuits required The LV8212T is a system motor driver IC that integrates, on a single chip, all the motor driver circuits required by CD and MD players. Since this IC provide both a 3-phase PWM spindle motor driver and sled, focus, and by CD and DVD players. Since this IC provide not only a spindle motor driver, but also sled, focus, and tracking drivers (3 PWM H-bridge driver channels), it can contribute to end product motor system miniaturization, tracking motor drivers (H-bridge drivers) for a total of 5 driver channels, it can contribute to end product motor thinner form factors, and reduced power consumption. system miniaturization and thinner form factors. Since the spindle motor driver adopts a direct PWM sensorless Since the spindle motor driver adopts a direct PWM sensorless drive technique, it provides high-efficiency motor drive technique, it provides high-efficiency motor drive with a minimal number of external components. drive with a minimal number of external components. Functions and Features Functions and Features ■ Direct PWM drive ■ Direct PWM drive (low side control) ■ Three-phase full-wave sensorless motor driver (spindle block) ■ Three-phase full-wave sensorless motor driver (spindle block) ■ Reverse torque braking (spindle block) ■ Soft switching drive (spindle block) ■ MOS output transistors ■ Synchronous commutation drive circuit ■ Standby mode power saving function ■ Supports switching between reverse torque braking and short-circuit braking (spindle block) ■ Digital inputs, PWM outputs (spindle, sled, focus, and tracking) ■ Analog input, PWM output (focus, tracking, sled, and spindle) ■ FG output ■ Current control adopted in the sled block (channels 4 and 5) ■ VS voltage detection function ■ MOS output transistors ■ Current limiter circuit ■ Standby mode power saving function ■ Thermal protection circuit ■ FG output (Two outputs: single Hall device equivalent FG (1FG) and three Hall device equivalent FG ■ Package: SQFP48 (7 7 mm) (3FG) outputs) ■ Current limiter circuit ■ Thermal protection circuit ■ Package: TQFP64J (7 7 mm)

Block Diagram Block Diagram OUT3R IN1F IN1R OUT1F OUT1R IN2F IN2R OUT2F OUT2R VS2 PGND2 IN3F IN3R OUT3F AREF SREF VCTL VG CPC PC IN4 IN5 RF5 PGND5

VS1 VS3

GSW

LOGIC OUT5F

PRE DRIVE OUT5R PGND1 PGND3 PUMP CHARGE RF4 LOGIC PRE DRIVELOGIC PRE DRIVE LOGIC PRE DRIVE PGND4 V MUTE CC Q Q OUT4F

Q VS4 S S R R

GND LOGIC S R RMAX PRE DRIVE OUT4R VCO

1/2VS VCO 1/N VSMON 1FG MON VS3

LOGIC PGND3

3FG TSD

1/NPhase OSC2 OSC OSC1 OUT3F VCOIN PRE DRIVE

comparator AREF SEL Sensorless drive logic FIL OUT3R CLK 1/N COMIN PRE DRIVE OUT2R VREF

LOGIC PGND1 VCC Waveform COM SUB LOGIC OUT2F

synthesis SENSORLESS SPINDLE PREDRIVE

VG PRE DRIVE CP1 limiterVG VS AREF REG CPC1 Charge UOUT pump CP2 VOUT WOUT OUT1F OSC

CPC2 LOGIC VSI

FR PRE DRIVE OUT1R SELECTOR 0.19V S/S IN1 IN2 IN3 CF1 FG VG CF3 BRK S/S CF2 OSC AREF BRK GND SPRF SPVS PWM VOUT SPFIL MUTE UOUT WOUT SPCIN SPGND SPCOM MODE1 MODE2 VGREG

33Car Audio 34 Car Audio Car Audio Built-in PLL For Automotive AV Equipment SANYO has now added a PLL circuit to their original-design single-chip Tuner System Chipsets (1) tuner IC. Microcontroller control provides increased performance and reliability and fewer adjustments in tuner systems. External amplifier

Microcontroller single-chip car tuner with on-chip PLL circuit ...... Under development LV25200M P37 Line amplifier Analog block LA2901V Line Amplifier P40 Four-Channel High Output Microcontroller Tuner IC Preamplifier IC FM-IF FM front end FM/AM noise Sensor Microcontroller Single-Chip demodulator LA2901V P40 Car Tuner with On-Chip PLL Circuit canceler SW Surround Electronic •Provides a high output voltage of 5.3 V rms LV25200M P37 processor ICs volume with (with a THD of 0.1%) for improved signal-to- L new zero-cross AF power noise ratio when driving an external power LA2655V* output muting circuits •No external FM RF amplifier required MRC Conditional amplifier amplifier AM tuner FM-MPX LC75410E/W •Low output noise voltage: 12 µV •Adjacent channel noise reduction variable (multipath stereo Products LA47510 (double conversion) reject circuit) P44 band filter demodulation P38 P47 •Low total harmonic distortion: 0.005% •AM noise canceller R LC75411E/W LA47536 •Superb audio fidelity LA2657M* output •Tuner supports all broadcast band (built-in P45 P48 •Package: SSOP24 (275mil) standards used worldwide electronic Digital block LC75412E/W •Meets the new FCC regulations volume) P39 P46 •Tuner specifications can be modified by changing the microprocessor software Electronic Volume Control Single-Chip Electronic Volume •Auto-adjustment system 9-bit 1-channel CCB* Automatic adjustment achieved by D/A converter bus interface Control with New Zero-Cross connecting the line computer and the Muting Circuit E2PROM through the microprocessor LC75410E/W, LC75411E/W, •Best receiving system LC75412E/W P44 to 46 Optimizes the tuner functions in real time according to the reception conditions •Built-in differential input amplifiers •Improved performance and reliability, PLL (LC75410E/W, LC75412E/W) circuit simplification, and design •AM double-conversion support circuit Test •Zero-cross muting standardization achieved by the adoption •High-speed lockup circuit instrument •Input gain control of a microprocessor controlled tuner •Dead zone control (GP-IB) •Loudness control •Oscillator division circuit •On-chip PLL circuit •Package: (LC75410E) QIP64E (14 14) •Package: QFP80 (14 14) (LC75410W) SQFP64 (10 10) (LC75411E) QIP44M (10 10) CCB Process (LC75411W) SQFP48 (7 7) line computer (LC75412E) QIP64E (14 14) (PC) CCB Microcontroller (LC75412W) SQFP64 (10 10) LCD drivers P23 to 26 VFD drivers LC875 Series LAN drivers CCB is a SANYO’s original bus format and all the bus addresses P1 to 2 P1 to 2 CARNET CAN MOST P1 to 2 are controlled by SANYO. LA2330W P3 LA2360M P5 . 22 LA2340M P6 . 21 All products described in this catalog contain developed products or P4 P5 P6 . 21 products that are diverted from general types. In accordance with standard LA2333T LA2361AM LV2341M of quality management system ISO/TS16949 for automotive industry, there LA2351M P4 . P20 LA2361JM P5 is a case where all demanded articles couldn't be supported, so please E2PROM confirm to the salesman of our company at every order.

Extensive lineup provides full support for a wide range of systems

AM/FM Tuner Block SVC273 (CR (C2.0V/C8.0V) ≥3.1, Q ≥100) Transistors for AM and FM buffers Other transistors (power supply, interface, and switch drive) *: SV272, SV273: MCPH3 miniature package (2.1 2.0 mm) 2SC2812N (VCEO = 50 V, IC = 150 mA, fT = typ 100 MHz), Bipolar transistors: 50C02CH (VCEO = 15 V, IC=1 A, VCE (sat) = max 280 mV) Varactor diodes for AM tuning JFET and transistors for AMP amplifiers 2SC2814 (V = 20 V, I = 30 mA, f = typ 320 MHz) (NPN) 2SC5706 ( V = 50 V, I = 5 A, V (sat) = typ 90 mV) SVC354 (3 diodes), SVC364 (4 diodes), SVC371 (6 diodes) CEO C T CEO C CES CPH5901 (high gain, typ 50 ms), CPH5905 (High ESD resistance type) PIN diodes for AM AGC and switching 2SD1913 (VCEO = 60 V, IC = 3 A, PC = 20 W, hFE 70 to 280) Varactor diodes for FM tuning Dual gate MOSFETs for FM amplifiers Series with rs = typ 5 Ω: ISV247, ISV233, ISV246, ISV234, CPH5512 MOSFET: 5LN 01M (V = 50 V, I = 100 mA R (on) ≥ ≥ DSS D DS SVC230 (CR (C2.0V/C8.0V) 1.65, Q 100) 3SK263 (V = 15 Vmin, I = 2.4 to 24 mA, yfs = typ 14 ms), PIN diodes for FM AGC and switching (Nch) = 9.9 Ω) ≥ ≥ DS DSX GS SVC243 (CR (C1.0V/C6.5V) 7.0, Q 40) 3SK264 (VDS = 15 V, I = 5.0 to 24 mA, yfs = typ 17 ms) Series with rs = typ 6 Ω: ISV294, ISV315, ISV316, ISV298H CPH6424 (V = 60 V, I = 3 A R (on) SVC272 (CR (C2.0V/C8.0V) ≥2.3, Q ≥150) DSX DSS D DS typ 150 mΩ)

35 Car Audio 36 Car Audio

Bus Control Tuner IC Clear Surround Control IC Includes Plus Sound Algorithm

❋ : Use of conditional products requires Under consultation with a SANYO representative Conditional prior to the use of the device. LV25200M development LA2655V Product Overview Overview The LV25200M integrates an optimal reception system for varying reception conditions plus AM NC functions The LA2655V is a sound field recreation IC that is optimal for audio equipment and that includes the Plus Sound that support reception worldwide. It also reduces the number of external components required. algorithm. The LA2655V is optimal for use in radio/cassette players, personal computers, TV sets, and other consumer Functions Features audio products including mini-compo systems. ■ FM front end FM The Plus Sound algorithm corrects for both delays and attenuations of the high and low frequency signals due to ■ ■ Multiplex Image rejection mixer adopted the characteristics of the speakers and creates audio with extreme clarity. ■ ■ Built-in IF band filter PLL ■ Supports reception in all areas worldwide ■ FM IF ■ Crystal oscillator: 20.5 MHz Functions ■ AM upconversion PLL ■ Autoalignment ■ Supports high-speed locking ■ Plus Sound algorithm ■ ■ Noise canceller Serial bus control circuit (SANYO CCB bus) ■ Clear Surround signal processing ■ AM FM/AM switch ■ Increased mixer dynamic range, improved ■ Variable clear level effect (using external components) ■ MRC noise filter ■ Package: SSOP20 (225 mil) ■ Increased IF amplifier dynamic range, improved noise filter ■ Built-in noise canceller ❋: CCB is SANYO's original bus format. MC, MPX, and MRC All bus addresses are managed by SANYO for this format. ■ Built-in MPX VCO (Obviates the need for a ceramic oscillator) ■ Package: QFP80 (14 14 mm) Block Diagram

10K 10K C57 R574.7U R56 C ++ C50B

F ❋:This product is subject to change without notice for improvement. When considering the use of this µ µ C56 10KC51 R47 0.10.47F µF 0.22µF R55 C47 + 10U C46 C43 C42 68K product, first refer to the latest SANYO "Semiconductor News" publication related to this device and 0.22 R43 C59 + 1U 8200p R41 0.02U + 1U 10K 3300p finally refer to the latest specifications for the device. + C50 C49 1000p Block Diagram

CC C48 C41

PLL TEST PLL TEST PLL C44 DET OUT DET VREF AFC IN MUTE DRIVE MRC IN AM IF-IN RF-AGC BYPASS AM-W-AGC IF AGC PILOT-DET AMCL ROS-OUT Undesire Det-out V MOD INDEX 0.022C61 NC-IN µF C40 3.3U 1U C62 VSM-2 3.3U + R40 - rey2.7V AFC MRC-OUT 0.022µF AM- low cut QD N amc C39 450K AM IF AMP Mute 1U C58 CF10.7 det AM/FMTime AMP C38 0.22U 0.022µF + MIX + VSM 1M - NOISER37 10.7MS3 60 59 58 57 56 55 54- 53 52 51 50 49 48 47 46 45 44 43 42 41 + BPF C37 NC in AMGtime AGC 0.47U 61 delay 10K 40 C7 IF-IN2 IF AGC s-meter Mute Ccont NOISE C36 C67 FM-IF-IN2 SENC 1000p R4 MIX62 R38 39 + C11 2200pF FM-IF-IN C35 L_MI 2 63 CHCC 38 + C69 reg4.9V N AGC 2200p µ 10µF + AM RF-AGC LPF + MPX F 64 RF AGC - C34 37 4.7 L_AM3 1ST-IF-OUT W AGC PLL-IN µ C10 C12 L_AM4 0.47 F C13µ 65 HPF AM NC 36 F 1 OUT VCC Lch-IN C Lch-OUT 0.022µF AM-MI 2 Triger OUT C R R66 Vref66 35 µ 75 R58 + 4.9V select AGC GND 1F 2200pF 620 DAC BUFF R31 3K + + 67 8bit AD 34 82000pF ANT d µ AM-MI 2-IN 0.47µF 4.7 F FET Trig Gate 0.022µF 68 anp 33 FM cut CPH5905 IN3-1 IN3-3 C30 AM-MI 2 Phase 19K<90 N.CVCC AGND L-IN LC1LV1L LC2 LC3 V2 L-OUT µ 69 1U 32 F BYPASS P-DET MPX VCC C29 Lodins coil IN3-2 IN3-4 19K<0 1U 0.022 70 RF-DAC 31 100K Keyed AGC TRIG C35 10.7MS3 N AGCIF-IN FF 38K<0 HCC R29 15K + 47U CF10.7TESTC7171W AGC 82K 30 1SV234 470 BIAS 20 19 18 17 16 15 14 13 12 11 AM-ANT-D P-CAN HCC SNC R280.22µF R73 0.022 72 C27 29 0.022 FM1stIF-IN µF N-AGC SNC µF MIX-OUT73 28 Pin_D C78L_MIX Sub VDD C74 30P IN1/IN2 decorder C73 74 R-OUT C26 27 bus 0.015µF 32K OSC BUFFER MATRIXL-OUT swallow orogramable ohase reference R70 75 C25 26 30 MIX-OUT C75 counter divider detector counter 0.015µF R101 µ 0 FE-VCC76 25 330 R102 0.025 F 1/10.1/8div 2.2k C106 µ 1/6.1/4 X' TAL GND Brightness control F L104 R77 X TAL IN C105 Pin_D 2200P0.075 0.022µF77 AM MIX C23 24 C77 3K CP1 2200P FM-MIX-IN SD Stereo FM-MIX IQ MIX div 18pF L102 C102Pin_D0.047 20.5M µF L103 78 OSC 23 6P 1000PIN R8 C22 0.47 µF FM-MIX ANT D RF AGC Vref 3V 18pF SVC203 79 Vo1. 22 C101 IN L101 C103 C79 FM OSC X TAL OUT On/off control 18P 1000P 80 21 A 0.22 1P 500K X' TAL VCC µF C104 12P C105 SW C80 1234567891011121314151617181920 DI 3V CL CE DO IN2 GND

GND Brightness control

C6 C7 C11B (L-ch) C12 TEST B ANT D ANT C15 2p 3p sep adj. AM-MIX RF AGC FM OSC F F + µ F OSC-GND

100 C12B µ

C2 µ p11 up + µ C4VCD_OSC

C107 R103 F C10A 0.47

1 0.022 0.22

2200P R11 100K 0.01µF F µ R20 A 4700p 100K C109 L_OSC R13

CPAM 2.4K p11 up 00 0 0 8V 30K (R-ch) 0.039 R12 C9A VCC SD Stereo IND. BSW 6.8K TEST C8 1000p 1 2 3 4 5 6 7 8 9 10

220pF 0 CONT1 GND VREF R-IN RC1RV1 RC2 RC3 RV2 R-OUT 0 GND DO Lch Rch AM-NC RDS-OUT C5 µ OUT OUT Gate-OUT + + + F 0 C R 1 TEST DI C C C 0 NC SK µ 2200pFµ 82000pF VDD CS 4.7 F 1 F 30 R2 C 2200pF EEPROM CE

L/H Rch-IN Rch-OUT CS DI CLDO DO VCCV2CC TUNEREEPROM 5V 5V

37 Car Audio 38 Car Audio Car Audio Electronic Volume Control IC FourFour ChannelChannel High-OutputHigh-Output LineLine AmplifierAmplifier with BBE Surround Processor forfor CarCar AudioAudio

❋ : Use of conditional products requires ConditionalCon diti ona l consultation with a SANYO representative LA2657M ProductProduct prior to the use of the device. LA2901VLA2901V Overview Overview The LA2657M is an audio signal processor for car audio that integrates the functions of the LC75421 IC and a The LA2901V is a 4-channel high-output line amplifier designed for car audio applications. BBE surround processing on a single chip. The LA2657M's main functions include input functions, input gain Since the output voltage is increased significantly over conventional line amplifiers, the LA2901V achieves a high adjustment, tone controls, super bass function, balance control, volume fader control, and the BBE surround signal-to-noise ratio and high audio quality in the connection from the main unit to the external amplifier and processor. can improve power amplifier performance. The LA2901V also provides significant space savings over earlier solution but reducing by one half the number of capacitors previously required to boost the signal system supply voltage and by adopting the SSOP miniature R package. BBE and BBE symbol are registered trademarks of BBE Sound, Inc. Functions Functions and Features ■ Input functions: Four input systems (L+R) (The LC75421 provides five input systems.) ■ High output level (5.3 V rms) ■ Input gain control (0 to 18.75 dB in 1.25 dB steps) ■ Low output noise voltage (12 µV) ■ BBE processor ■ Low total harmonic distortion (0.004 %) ■ Tone controls (Bass: ±11.9 dB, treble: ±11.9 dB. Both in 1.7 dB steps) ■ High ripple rejection ratio (70 dB) ■ Super bass (0 to 20 dB in 2 dB steps) ■ Minimal number of external components required ■ Master volume control (0 dB to -79 dB in 1 dB steps, -∞) ■ Superb audio quality ■ Bus control ■ Package: SSOP24 (275 mil) ■ Fader (0 to -20 dB in 2 dB steps, -20 to -25 dB in 5 dB steps, -25 to -45 dB in 10 dB steps, -60 dB, -∞) ■ CCB bus (On/off control of the BEE function is not provided over the CCB bus.) ■ Package: QIP64E (14 14 mm)

BBE BBE PA VCC PA + LF-OUT LR-OUT 100µF 9.0V 100µF + NC + NC + CE DI CL + RF-OUT RR-OUT 10µF 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 + 10kΩ 10kΩ 10kΩ 10kΩ 22µF 22µF 1.5NF 1.5NF 22µF 22µF + + + + + 1 CCB 48 NC TONE FADER + EVR INTERFACE 2 F. S-BASS 47 VDD 24 23 22 21 20 19 18 17 16 15 14 13 + + 3 SW 46 PA FADER + + 4 45 PA + LIFT 5 Vreg 44 AMP AMP AMP SIGNAL SIGNAL LIFT F.SW AMP AMP AMP + SIGNAL SIGNAL Ω 6 43 Ω CC CC -- + + -- CC CC 36k 36k V V -- + -- + + -- + -- V V + 7 42 F. + Ω Ω Ω Ω Ω 8 SW 41 Ω 30k 30k 12k 12k 30k 30k + 9 BBE 40 X NC 10 39 NC X ------+ + + + + + BBE 11 38 Ω Ω Ω BBE 12 37 Ω

EVR 36k 36k REF REF REF REF REF REF 36k 36k V V V V EVR V V + 13 36

14 TONE 35 12 3 45 6 7 89 101112 BBE EVR 24kΩ NC 15 S-BASS SW 34 BBE DC-L DC-R V ef 24kΩ 16 33 NC 24kΩ + + + + 22µF Ripple + 22 F 22µF 47µF µ 22µF 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 24kΩ Filter NC + NC NC LF-IN LR-IN RF-IN RR-IN VCC BBE F.SW We recommend the use of 1% tolerance or better resistors on/off for the 24 kΩ and 36 kΩ feedback resistors.

39 Car Audio 40 Car Audio Car Audio Built-in PLL For Automotive AV Equipment

SANYO has now added a PLL circuit to their original-design single-chip tuner IC. Tuner System Chipsets (2) The optimum chip segmentation realized high-performance, unadjusted, and high-reliability of car tuner systems at low costs.

...... Under development

Electronic Volume Control Car Audio Single-Chip Tuner Single-Chip Electronic Volume Complete Car Tuner with Built-in Complete car tuner with on-chip PLL circuit Control with New Zero-cross PLL Circuit Muting Circuit P43 LA17000M P43 LA17000M LC75410E/W, LC75411E/W, Built-in PLL circuit LC75412E/W P44,P45,P46 •A/D converter (6 bits, 1 channel) •Built-in differential input amplifiers •Includes an IF counter and I/O ports for FM-IF FM/AM noise FM front end (LC75410E/W, LC75412E/W) simplified interfacing demodulator canceler •Adopts an AM double conversion reception •Zero-cross muting Electronic •Input gain control technique Surround volume with AF power •Loudness control Further improved to noise reduction processor ICs L new zero-cross amplifier output •Package: (LC75410E) QIP64E (14 14) •Superlative three-signal characteristics muting circuits MRC FM-MPX LA2655V* LA47510 (LC75410W) SQFP64 (10 10) •Improved medium and weak field NC AM tuner stereo Conditional (multipath LC75410E/W P47 (LC75411E) QIP44M (10 10) characteristics (double conversion) reject circuit) demodulation Products P44 (LC75411W) SQFP48 (7 7) •Improved separation characteristics P38 R LA47536 P48 (LC75412E) QIP64E (14 14) •Built-in anti-birdie filter LA2657M* output LC75411E/W P45 (LC75412W) SQFP64 (10 10) •Multipath sensor outputs (built-in VCO electronic LC75412E/W (analog and digital outputs) VT 2nd OSC volume) Support for lower total system costs P39 P46 •AM double-conversion (up-conversion system) •Improved FM IF circuit (automatic wide/narrow BBE Sound Processor IC CF switching with software in the presence PLL synthesizer LA2657M* P39 of adjacent channel interference) •Reduction in sample-to-sample IF gain •Input function variations by 1/3 simplifies adjustments during •Input gain control manufacturing •BBE CCB PLL synthesizer Supports end-product miniaturization LC72144M •Tone and balance controls •High-frequency signal lines can be handled equivalent •Super bass inside the tuner pack Microcontroller •Master volume control •Fader •Easily meets the new FCC regulations LC875 Series Package: QFP80 (14 14) P23 to 26 •CCB support •Package: QFP64E (14 14)

All products described in this catalog contain developed products or products that are diverted from general types. In accordance with standard CCB of quality management system ISO/TS16949 for automotive industry, there is a case where all demanded articles couldn't be supported, so please LAN drivers confirm to the salesman of our company at every order. LCD drivers CARNET P1 to 2 CAN P1 to 2 MOST P1 to 2 BBE and BBE symbol are registered trademarks VFD drivers P3 P5 . 22 P6 . 21 of BBE Sound, Inc. CCB is a SANYO’s original bus format and all the LA2330W LA2360M LA2340M bus addresses are controlled by SANYO. LA2333T P4 LA2361AM P5 LV2341M P6 . 21 *Requires a priori consultation with your SANYO sales LA2351M P4 . P20 LA2361JM P5 representative or SANYO business office before their use.

Extensive lineup provides full support for a wide range of systems

AM/FM Tuner Block SVC273 (CR (C2.0V/C8.0V) ≥3.1, Q ≥100) Transistors for AM and FM buffers Other transistors (power supply, interface, and switch drive) *: SV272, SV273: MCPH3 miniature package (2.1 2.0 mm) 2SC2812N (VCEO = 50 V, IC = 150 mA, fT = typ 100 MHz), Bipolar transistors: 50C02CH (VCEO = 15 V, IC=1 A, VCE (sat) = max 280 mV) Varactor diodes for AM tuning JFET and transistors for AMP amplifiers 2SC2814 (V = 20 V, I = 30 mA, f = typ 320 MHz) (NPN) 2SC5706 ( V = 50 V, I = 5 A, V (sat) = typ 90 mV) SVC354 (3 diodes), SVC364 (4 diodes), SVC371 (6 diodes) CEO C T CEO C CES CPH5901 (high gain, typ 50 ms), CPH5905 (High ESD resistance type) PIN diodes for AM AGC and switching 2SD1913 (VCEO = 60 V, IC = 3 A, PC = 20 W, hFE 70 to 280) Varactor diodes for FM tuning Dual gate MOSFETs for FM amplifiers Series with rs = typ 5 Ω: ISV247, ISV233, ISV246, ISV234, CPH5512 MOSFET: 5LN 01M (V = 50 V, I = 100 mA R (on) ≥ ≥ DSS D DS SVC230 (CR (C2.0V/C8.0V) 1.65, Q 100) 3SK263 (V = 15 Vmin, I = 2.4 to 24 mA, yfs = typ 14 ms), PIN diodes for FM AGC and switching (Nch) = 9.9 Ω) ≥ ≥ DS DSX GS SVC243 (CR (C1.0V/C6.5V) 7.0, Q 40) 3SK264 (VDS = 15 V, I = 5.0 to 24 mA, yfs = typ 17 ms) Series with rs = typ 6 Ω: ISV294, ISV315, ISV316, ISV298H CPH6424 (V = 60 V, I = 3 A R (on) SVC272 (CR (C2.0V/C8.0V) ≥2.3, Q ≥150) DSX DSS D DS typ 150 mΩ)

41 Car Audio 42 Car Audio

Electronic Volume and Tone Control IC for Car Audio Tuner IC with Built-in PLL Circuit Car Audio Systems LA17000M LC75410E/W Overview Overview

The LA17000M is a car audio system tuner IC that integrates both a PLL frequency synthesizer and all AM/FM The LC75410E/W is an electronic volume and tone control IC that implements a rich set of audio control functions on a single chip. The LA17000M combines the functions of two ICs, a PLL IC (such as the LC72144) functions with a minimal number of external components. Functions include volume, balance, fader, and an FM tuner IC (such as the LA1781M) on a single chip that provides PLL, AM (upconversion), FM FE, FM IF, bass/midrange/treble, and loudness controls, as well as input selection/switching functions and an input NC, MCP, and MRC functions. The LA17000M achieves increased performance, adjustment-free manufacturing, gain control. and high reliability at low cost in car tuner systems by providing an optimal functional allocation in the IC. Functions ■ Volume control: A total of 161 positions from 0 dB to -79.5 dB in 0.5 dB steps and -∞ dB. A balance function can be implemented by controlling the left and right channel volume controls separately. Functions ■ Fader control: The rear or front outputs can be attenuated by one of 16 levels ■ Built-in PLL ■ Support for lower costs (A total of 16 settings with attenuations of 0 to -2 dB in 1dB steps, -2 to -20 dB in 2 dB steps, -20 to -30 dB in 10 dB steps, and -45, -60, and -∞ dB settings.) ◆ A/D converter (6 bits, 1 channel) ◆ AM double conversion (upconversion) ■ Bass/midrange/treble controls: Each band can be controlled in 1 dB steps from 0 dB to ±6 dB, and in 2 dB steps from ◆ ◆ IF counter and I/O ports for simplified interface Improved FM IF circuit (automatic wide/narrow ±8 dB to ±12 dB design ceramic filter switching under adjacent channel ■ Input gain control: The input signal can be amplified by 0 to +18.75 dB in 1.25 dB steps ◆ Supports AM double conversion reception interference conditions) ■ Input switching: One of five input systems (left and right channels) can be selected ■ Strengthened noise reduction ◆ IF gain sample-to-sample variations reduced to 1/3 (Four of the input systems are single-ended inputs, one uses differential inputs.) ■ Loudness control: The -32 dB position of the 2 dB step volume control ladder resistor can be tapped and a loudness ◆ Superlative three-signal characteristics that in previous devices. This simplifies end product function implemented with external capacitor and resistor components ◆ Improved weak and medium-field NC adjustment during manufacture. Furthermore, characteristics a shifter pin is provided for VSM adjustment. Features ◆ Improved separation characteristics ■ Supports end product miniaturization ■ On-chip buffer amplifiers reduce the number of external components ■ ◆ Built-in anti-birdie filter (analog and digital outputs) ◆ High-frequency signal lines can be handled within Internal switches are implemented in a silicon gate CMOS process that minimizes the noise generated when switching. This results in low noise even when switching in the no-signal state. ◆ Anti-multipath sensor outputs the tuner pack. ■ Zero-cross switching circuits used for low noise even when input signals are present ◆ (analog and digital outputs) Easily meets FCC requirements ■ Built-in VDD/2 reference voltage generation circuit ■ Package: QFP80 (14 14 mm) ■ All functions are controlled using serial data (CCB) ■ Block Diagram Packages: LC75410E: QIP64E (14 14 mm) LC75410W: SQFP64 (10 10 mm) ❋ :CCB is SANYO's original bus format. All bus addresses are managed by SANYO for this format. 0.022µF AM (STEFEO) Block Diagram IF OUT 33kΩ MUTE

F OFF(RDS) F Ω µ µ µ SEP Ω Ω 4.7k 0.1 F F Ω Ω F

Ω 10 ADJ µ 10k Ω F + µ F 0.01 82k 560

F [BASS fo 100Hz] [MID fo 1kHz] [TREBLE fo 10kHz] F µ 30k F µ 12k F + µ µ µ 56k µ 1 + 100 + 2.2 Ω + + 1 0.022 µ + + 0.22 0.47 F F 1000pF + 0.22 Ω

F 220pF µ 0.47 62k 24kΩ QD Ω 1 µ F F F 2200pF Ω 1 µ OUT + 33k To F F µ 10µF µ 10k micro F 0.1 IF PILOT AM C. KEYED FM QD AFC MUTEFM DET 50kΩ MRC AM/FM µ µ µ

68k 10 F

controller µ AGC DET LC HCC VCC AGC SD VREF 10kΩ IN IN DRIVES-METER OUT NC HCC SNC OUT S-METER F Ω PHASE + + COMP 1µF µ 0.1 0.01 0.01 0.001 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 + 0.001 + 5.6k F F µ 0.1 10µF µ

+ 1 + AM DET 0.22 61 40

AM ANTD LSELO LVRIN LCT LCOM LTIN LF1C1 LF1C2 LF1C3 LF2C1 LF2C2 LF2C3 LF3C1 LF3C2 LF3C3 LTOUT µ LVROUT 33Ω 0.022F WIDE AGC MUTE ANT OSC Q.DET GND 62 OSC AMP. F.F.19k 39 F D BUFF HCC PHASE 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 µ Ω FM MUTE 90 COMP. IF COUNT BUFF 1MH 470 ON ADJ SEEK/STOP Switch 0.022 µ 63 38 µ LFIN 100 H HOLE SNC 1 F L5P 11kΩ MUTE F.F.19k + 32 DET DRIVE VCO 49 FC18 RF AGC 90 CSB912TF108 µ µ - 10 F 100 H + 64 37 + LFOUT VSM µ VCO 1µF L5M + 3.3 F OC-C AFC MPX VCO + PA F SHIFTER + 31 H STOP Ω

µ + µ F 2nd MIX IN DET CI AMP 50 - µ 65 PILOT TRIG 36 Ω 100 100k 47 15pF 15pF

Ω LVref 0.022 51k DET. LROUT 100k 1µF L4 FM IF BYPASS + + 30 PA Pdot C - - - - + 66 35 MRC + + F ADJ 51 + +- + µ 510Ω 0.022µF IF LIMIT 0.01µF SENOR µ FM IF 300Ω - 10 F IN AMP. F.F.30k PILOT 100kΩ 5V AUTO ADJ 1µF L3 LVref LAVSS 0.022 67 0 CAN. 34 + + 29 BUFF µ Ω 52 + - 0.47 F AM SM FM SM 47k - 47kΩ TEST IF SEEKSW µ L2 68 DET AM SD FM SD F.F. UNTVERSAL 33 1 F AGC Ω +

LVref 28 COUNTER

47k 53 L.C. HCTR I/O-1 69 32 DVSS 1st IF OUT IF BUFFER DATA SHIFT REGISTER 100pF 1µF L1 LATCH Ω + 27 I/O-1 51k 70 MIX 31 54 LVref AM MIX OUT MRC CL RF AGC µ LVref AM SD ADJ TWEET 12Bits DO 10 F + Multiplexer ZERO-CROSS DET 26 CL 71 WB AGC 30 WIDE AGC IN PROGRAMMABLE 55 100kΩ DIVIDER + DI 1st IF IN CL CCB Micro 72 29 - CF 25 DI CCB VDD INTERFACE controller SW SWALLOW 56 AM/FM I/F CONTROL AM RF AGC OUT V COUNTER DI LOGIC CIRCUIT CE 73 REF 28 Micro controller + 1/16,1/17 4Bits µ Vref CIRCUIT Ω HPH LPF 47 F + - 24 CE 62pF

150 57 W.B AGC CE 74 REFERENCE 27 MUTE RF AGC Keyed DIVIDER RVref N-AGC IN 10µF AGC X' OUT + 23 MUTE ATT ADJ F.E FM/AM 24pF 58 Multiplexer ZERO-CROSS DET 75 26 REG SWITCH Ω — + 10.25 µ RAVSS 30Ω 15 MHz 1 F R1 Ω + 47k 22 76 25 F MIX 59 µ MIX OUT X' IN BUFF 24pF FE V POWER 51kΩ µ R2 0.022 CC 1 F NO SIGNAL 77 MAIN 24 + RVref 21 NC BUFF ON 1st IF HC SUB MAT I/O-2 60 TIMER Narrow IN RESET DEC RIX XBUFF 78 AM 23 1µF R3 TIM F

F AM 1st + - 20 µ + 1ST + RVref µ Ω MIX IN 61 -

8pF µ 30 OSC + 0.033 F 100 PDS

0.022 RVref 79 PHASE 22 RROUT µ AGC TRIG GATE 1µF R4 1000pF 0.022F PLL +

Ω DETECTOR + +- -+ -+ 19 PA 1000pF 18pF V + + + 5pF ANT OSC CHARGE SS 62 100k 80 21 - - - D PUMP 10µF FM 1µF R5M RFOUT + MIX IN Ω

Ω - 6pF + + 18 PA 10k F RVref Ω 63 37pF 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 µ 100k µ 220 10 F 1000pF 0.01 1000pF FM FM RF FE FM AM/FM AM NC NC AM Gore MPX SD PLL IN PD1 5V µ + Ω 1 F R5P RFIN

200k ANTD AGC GND OSC SW OSC Sens AGC F OSC OUT Pdot IN ST-IND

+ F F -

µ + 10kΩ F F

µ µ 17 µ µ Ω 1 64 Ω Ω 100pF Ω F + 10k 0.47 F F F + 30k µ µ µ µ 1M µ µ 0.015 Ω 0.015 F 0.01 6800pF 0.01F 0.22 F

Ω 100 100k 5pF µ

3.3 22kΩ 30k 0.022 Ω 0.1 300pF 0.022 0.022 10pF Ω Ω 30pF 51k 10k NC MPX 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Ω 350 30k GND

150pF SEEK AM/FM SD STOP FM ST IND RCT CC SDSTSW RTIN µ RCOM RVRIN RF3C1 RF3C2 RF3C3 RF2C1 RF2C2 RF2C3 RF1C1 RF1C2 RF1C3 10 F RSELO RTOUT AM ANT IN FM BF GND FM ANT IN AM V

F + RVROUT µ + VCC=8V CF SW L-CH R-CH PLL VDD=5V FMIF AMNCFM/AM FMIF AM F + F 0.022

µ F F F MPX V VT GND 1 F F µ CC µ µ µ µ + 10µF µ 0.1 µ 0.1

10 F 0.01 0.01 0.001 220pF 0.001 68kΩ 4.7kΩ 0.1µF [BASS fo 100Hz] [MID fo 1kHz] [TREBLE fo 10kHz]

43 Car Audio 44 Car Audio LC75411E/W

ElectronicElectronic VolumeVolume andand ToneTone ControlControl ICIC forfor Electronic Volume and Tone Control IC for Car Audio Systems Car Audio Systems LC75412E/W Overview Overview The LC75411E/W is an electronic volume and tone control IC that implements a rich set of audio control The LC75412E/W is an electronic volume and tone control IC that implements a rich set of audio control functions with a minimal number of external components. Functions include volume, balance, fader, functions withElectronic a minimal number of Volume external components. and Functions Tone include Control volume, balance, IC forfader, bass/treble, and loudness controls, as well as input selection/switching functions and an input gain control. bass/treble, and loudness controls, as well as input selection/switching functions and an input gain control.

Functions Functions ■ Volume control: A total of 161 positions from 0 dB to -79.5 dB in 0.5 dB steps and -∞ dB. A balance function can be ■ Volume control: A total of 81 positions from 0 dB to -79 dB in 1 dB steps and -∞ dB. implemented by controlling the left and right channel volume controls separately. A balance function can be implemented by controlling the left and right channel volume controls separately. ■ Fader control: The rear or front outputs can be attenuated by one of 16 levels ■ Fader control: The rear or front outputs can be attenuated by one of 16 levels (A total of 16 settings with attenuations of 0 to -2 dB in 1 dB steps, -2 to -20 dB in 2 dB steps, -20 to -30 dB in (A total of 16 settings with attenuations of 0 to -2 dB in 1 dB steps, -2 to -20 dB in 2 dB steps, -20 to -30 dB in 10 dB steps, 10 dB steps, and -45, -60, and -∞ dB settings.) and -45, -60, and -∞ dB settings.) ■ Bass/treble controls: Each band can be controlled in 1 dB steps from 0 dB to ±6 dB, and in 2 dB steps from ±8 dB to ±12 dB ■ Bass/treble controls: Each band can be controlled in 2 dB steps from 0 dB to ±18 dB ■ Input gain control: The input signal can be amplified by 0 to +18.75 dB in 1.25 dB steps ■ Input gain control: The input signal can be amplified by 0 to +18.75 dB in 1.25 dB steps ■ Input switching: One of 4 input systems (left and right channels) can be selected ■ Input switching: One of six input systems (left and right channels) can be selected (Five of the input systems are single- ■ Loudness control: The -32 dB position of the 2 dB step volume control ladder resistor can be tapped and a loudness function ended inputs, one uses differential inputs.) implemented with external capacitor and resistor components ■ Loudness control: Taps are output starting at the -32 dB position of the ladder resistor and a loudness function implemented with external capacitor and resistor components Features Features ■ On-chip buffer amplifiers reduce the number of external components ■ On-chip buffer amplifiers reduce the number of external components ■ Internal switches are implemented in a silicon gate CMOS process that minimizes the noise generated when switching. ■ Internal switches are implemented in a silicon gate CMOS process that minimizes the noise generated when switching. This results in low noise even when switching in the no-signal state This results in low noise even when switching in the no-signal state ■ Zero-cross switching circuits used for low noise even when input signals are present ■ Zero-cross switching circuits used for low noise even when input signals are present ■ Built-in VDD/2 reference voltage generation circuit ■ Built-in VDD/2 reference voltage generation circuit ■ All functions are controlled using serial data (CCB) ■ All functions are controlled using serial data (CCB) ■ Packages: LC75411E: QIP44M (10 10 mm) ■ Packages: LC75412E: QIP64E (14 14 mm) LC75411W: SQFP48 (7 7 mm) LC75412W: SQFP64 (10 10 mm) ❋ :CCB is SANYO's original bus format. ❋ :CCB is SANYO's original bus format. All bus addresses are managed by All bus addresses are managed by SANYO for this format. SANYO for this format. Block Diagram Block Diagram

[BASS fo 100Hz] [TREBLE] µ 4.7kΩ 0.1µF 0.33 F [BASS fo 100Hz] [TREBLE fo 10kHz] Ω 220pF Ω Ω F F

1000pF 1k µ µ 10k µ µ µ F 68k 0.1 F 0.1 F 10 F 2700pF µ

µ F + 10 F + µ 1µF µ 1 F 0.1 + 0.001 + + + 0.001 10µF 0.1 10µF LSELO LVRIN LCT NC NC NC LF1C1 LF1C2 LF1C3 NC NC NC LF3C1 LF3C2 LF3C3 LTOUT LF1C1 LF1C2 LTIN LF1C3 LF3C1 LSELO LVRIN LCT LCOM LTOUT LVROUT 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33

1µF L5P LFIN + 32 -+ 49 10µF 1µF L5M LFOUT + + 31 PA 50 - + LFIN 1µF L4 LVref LROUT + + 30 PA - 51 + -+ -+ - + + + 10µF +- µ - LFOUT - 10 F µ 1µF L3 LVref LAVSS 1 F L4 + PA + + + LVref -+ -+ - 29 + + 52 - - LVref LROUT µ TEST µ 1 F L2 1 F L3 + PA + LVref 28 + - + 53 µ LVref 10 F DVSS 1µF L2 VSS 1µF L1 + + 27

54 LVref 1µF L1 CL 1µF L6 CL + Multiplexer ZERO-CROSS DET + Multiplexer ZERO-CROSS DET 26 CL CL 55 + LVref CCB DI Micro CCB DI Micro - 25 DI VDD + DI VDD INTERFACE Controller - LVref CONTROL INTERFACE Controller 56 CONTROL LOGIC CIRCUIT LOGIC CIRCUIT CE µ CIRCUIT Vref + CIRCUIT 22 F + Vref CE 22µF + - RVref 24 CE + CE 57 - RVref V R1 DD 1µF R6 MUTE + TEST + 23 Multiplexer ZERO-CROSS DET 58 Multiplexer ZERO-CROSS DET NO SIGNAL R2 1µF R1 47kΩ RAVSS + TIMER + 22 TIM 59 Ω 0.033µF 1µF R2 NO SIGNAL R3 RVref RVref + RROUT + 1M 21 NC - 60 TIMER + + PA R4 1µF R3 TIM + - 10µF + 20

+ RFOUT RVref + + + 61 - 0.033µF RVref - -+ PA RVref + - RROUT

RVref µ µ 1 F R4 + - 10 F + +- -+ 19 PA + + RFIN 62 - + + + - - - 10µF 1µF R5M RFOUT + + -+ 18 PA

63 RVref 10µF + 1µF R5P RFIN - + 17 64

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 NC NC NC NC NC NC RCT RCT RTIN µ

µ RVRIN RF3C1 RF3C2 RF3C3 RF1C1 RF1C2 RF1C3 RCOM 10 F RVRIN

RF1C1 10 F RSELO RF1C2 RF1C3 RTOUT RF3C1 RSELO RTOUT +

RVROUT + + F µ + F F 1µF + 1 F F µ µ µ + 2700pF µ 10µF 0.1µF 0.1µF 0.1 0.1 10µF 0.001 220pF 1000pF 0.001 68kΩ 4.7kΩ 10kΩ 1kΩ 0.1µF [BASS fo 100Hz] [TREBLE] 0.33µF [BASS fo 100Hz] [TREBLE fo 10kHz]

45 Car Audio 46 Car Audio

Power Amplifier LA47510 LA47536 Overview Overview The LA47510 is a four-channel BTL power amplifier IC designed for use in car stereo systems. The LA47536 isPower a four-channel BTL powerAmplifier amplifier IC designed for use in car stereo systems.

Functions Functions ■ Maximum output: 50 W 4 (VCC = 14.4 V, RL = 4Ω) ■ Maximum output:LA47536 45 W 4 (VCC = 14.4 V, RL = 4Ω) ■ Offset detection function ■ Offset detection function ■ Offset detection function off switch ■ Offset detection function off switch ■ Muting function ■ Muting function ■ Standby switch ■ Standby switch ■ Built-in each protection circuit ■ Built-in each protection circuit ◆ Output pin-to-Vcc short ◆ Output pin-to-Vcc short ◆ Output pin-to-GND short ◆ Output pin-to-GND short ◆ Load short ◆ Load short ◆ Overvoltage ◆ Overvoltage ◆ Thermal shutdown ◆ Thermal shutdown ■ Package: HZIP25 ■ Package: HZIP25

Block Diagram Block Diagram

+ + 2200µF µF 2200µF µF VCC1/2 VCC3/4 VCC1/2 VCC3/4 6 20 6 20

0.022 0.022 OUT1+ + + OUT1+ + + + IN 1 11 + 9 IN 1 11 9 µ 0.22µF 0.22F OUT1 OUT1 Offset - Offset - 7 Ω Detect - 7 +5V 10kΩ Detect - +5V 10k Circuit - Circuit - 25 25 OFFSET DET OFFSET DET PWR GND1 Protective PWR GND1 Protective circuit 8 circuit 8

OUT2+ + OUT2+ - + 5 - 5 OUT2 OUT2 + + - + + - 12 3 IN 2 12 3 IN 2 µ 0.22µF 0.22F - - PWR GND2 PWR GND2 2 Aux 2 Aux circuit Stand by circuit Stand by 4 4 Switch Switch +5V ST BY +5V ST BY ST ON ST ON Ripple Ripple Ω Mute 10kΩ Mute Mute 10k Filter Mute Filter 10 22 + 10 22 R.F + circuit + R.F circuit + 47µF 47µF µF µF Low Level Low Level Mute ON OUT3+Mute ON + OUT3+ + + 15 + + 17 IN 3 15 + 17 3.3 IN 3 3.3 µ 0.22µF 0.22F OUT3 OUT3 OFFSET DET - OFFSET DET - - 19 OFF S.W - - 19 OFF S.W - 1 1 GND PWR GND3 GND Protective PWR GND3 PREOFFSET GND DET Protective PREOFFSET GND DET 8 OFF circuit 8 OFF circuit

13 OUT4+ 13 OUT4+ + IN 4 + IN 4 + 21 + 21 OUT4- OUT4- 14 23 + 14 23 + - µ - µF - F - 0.22 0.22 Muting & Muting & ON TIME C ON Time Control PWR GND4 ON TIME C ON Time Control PWR GND4 16 + 16 24 + Circuit 24 Circuit 22µF 22µF

47 Car Audio 48 Car Audio Car Audio Standard Tuner For Automotive AV Equipment

System Chipsets Bus interface incorporated in SANYO's original single-chip tuner IC. With the SANYO ETR controller IC, computer control of the tuner is possible.

...... New product Surround AF power processor ICs amplifier Car Audio Single-Chip Tuner ...... Under development Single-Chip Tuner ICs for Car Audio LA2655V* LA47510 Conditional P47 P51 Products LA1776M Car audio bus controlled 1-chip tuner IC P38 LA47536 LA1776M P51 P48 Further improved noise reduction LA2657M* •Superlative three-signal characteristics (Built-in electronic •Improved medium and weak field NC FM-IF FM/AM noise volume control) FM front end characteristics demodulator canceler P39 •Improved separation characteristics •Built-in anti-birdie filter Support for lower total system costs L •AM double conversion (up-conversion system) MRC FM-MPX output Electronic Volume Control •Sample-to-sample IF gain variations reduced AM tuner (multipath stereo Electronic (double conversion) reject circuit) demodulation volume with Single-chip Electronic Volume by 1/3 from earlier Sanyo products, making new zero-cross adjustments during final product assembly muting circuits Control with New Zero-cross significantly easier. R output LC75410E/W Muting Circuit Package: QIP64E (14 4) ETR controller P44 LC75410E/W, LC75411E/W LC72350 Series P52 LC75411E/W LC75412E/W P44 to 46 LC723780 Series P53 P45 LC72336 / LC72338 P54 LC75412E/W Built-in differential input amplifiers P46 (LC75410E/W, LC75412E/W) ETR Controller Zero-cross muting Electronic Tuning Radio Controller PLL A/D converter Input gain control LC72350 Series P52 •AM double-conversion support circuit 6-bit/8-bit 6 channels Loudness control •High-speed lockup circuit CCB Line amplifier LCD drivers LC723780 Series P53 •Dead zone control LA2901V Package: (LC75410E) QIP64E (14 14) •Oscillator division circuit VFD drivers P40 (LC75410W) SQFP64 (10 10) Large-capacity ROM: up to 128 Kbytes 8-bit serial I/O (LC75411E) QIP44M (10 10) High-speed operation: (LC75411W) SQFP48 (7 7) µ One machine cycle takes 1.33 s CPU (LC75412E) QIP64E (14 14) High-performance built-in PLL ROM: 16/24/32/64/128 Kbytes Three external (LC75412W) SQFP64 (10 10) •Direct PLL RAM: 256/512/2048/4096/ interrupt pins External •High-speed lockup circuit 8192 bytes amplifier Package: (LC72350) QIP80E (14 20) Requires a priori consultation with your SANYO sales *representative or SANYO business office before their use. (LC723780) QIP100E (14 20) LAN drivers CARNET P1 to 2 CAN P1 to 2 MOST P1 to 2 All products described in this catalog contain developed products or CCB is a SANYO’s original bus products that are diverted from general types. In accordance with standard format and all the bus addresses LA2330W P3 LA2360M P5 . 22 LA2340M P6 . 21 of quality management system ISO/TS16949 for automotive industry, there are controlled by SANYO. LA2333T P4 LA2361AM P5 LV2341M P6 . 21 is a case where all demanded articles couldn't be supported, so please confirm to the salesman of our company at every order. LA2351M P4 . P20 LA2361JM P5

Extensive lineup provides full support for a wide range of systems

AM/FM Tuner Block SVC273 (CR (C2.0V/C8.0V) ≥3.1, Q ≥100) Transistors for AM and FM buffers Other transistors (power supply, interface, and switch drive) *: SV272, SV273: MCPH3 miniature package (2.1 2.0 mm) 2SC2812N (VCEO = 50 V, IC = 150 mA, fT = typ 100 MHz), Bipolar transistors: 50C02CH (VCEO = 15 V, IC=1 A, VCE (sat) = max 280 mV) Varactor diodes for AM tuning JFET and transistors for AMP amplifiers 2SC2814 (V = 20 V, I = 30 mA, f = typ 320 MHz) (NPN) 2SC5706 ( V = 50 V, I = 5 A, V (sat) = typ 90 mV) SVC354 (3 diodes), SVC364 (4 diodes), SVC371 (6 diodes) CEO C T CEO C CES CPH5901 (high gain, typ 50 ms), CPH5905 (High ESD resistance type) PIN diodes for AM AGC and switching 2SD1913 (VCEO = 60 V, IC = 3 A, PC = 20 W, hFE 70 to 280) Varactor diodes for FM tuning Dual gate MOSFETs for FM amplifiers Series with rs = typ 5 Ω: ISV247, ISV233, ISV246, ISV234, CPH5512 MOSFET: 5LN 01M (V = 50 V, I = 100 mA R (on) ≥ ≥ DSS D DS SVC230 (CR (C2.0V/C8.0V) 1.65, Q 100) 3SK263 (V = 15 Vmin, I = 2.4 to 24 mA, yfs = typ 14 ms), PIN diodes for FM AGC and switching (Nch) = 9.9 Ω) ≥ ≥ DS DSX GS SVC243 (CR (C1.0V/C6.5V) 7.0, Q 40) 3SK264 (VDS = 15 V, I = 5.0 to 24 mA, yfs = typ 17 ms) Series with rs = typ 6 Ω: ISV294, ISV315, ISV316, ISV298H CPH6424 (V = 60 V, I = 3 A R (on) SVC272 (CR (C2.0V/C8.0V) ≥2.3, Q ≥150) DSX DSS D DS typ 150 mΩ)

49 Car Audio 50 Car Audio LA1776M

System-on-Chip Tuner IC for Car Stereo Systems Electronic Tuning ETR Controllers

NewNew LA1776M productproduct LC72350 Series Overview Overview The LA1776M is a car radio AM/FM tuner IC that is based on the current LA1787M but features improved AM The LC72350 Series (LC72358N, LC72362N, and LC72366) are system-on-chip electronic tuning upconversion (for improved reception characteristics) and improvements in most other characteristics as well. microcontrollers with a 1.33 µs instruction execution time. The LA1776M pin arrangement is only slightly changed from the LA1787M for easy printed circuit board pattern These devices include both a high-speed locking circuit and a high-performance direct PLL circuit that can control design. the local oscillator C/N characteristics.

Functions Functions ■ FM front end ■ FM IF ■ Noise canceller ■ MRC ■ ROM: 16 KB (LC72358N) ■ Multiplex ■ AM upconversion ■ FM/AM switch 24 KB (LC72362N) 32 KB (LC72366) Features ■ RAM: 512 nibbles (LC72358N and LC72362N) ■ Characteristics improved by new noise prevention measures in the mixer and amplifier blocks 1024 nibbles (LC72366) ■ ■ Three-signal characteristics improved due to increased dynamic range in the FM front end mixer A/D converter: 6-bit successive approximation A/D converter with 6 input channels ■ ■ Improved AM practical sensitivity and saturation signal-to-noise ratio PLL: Built-in sub-charge pump for high-speed locking, built-in dead zone control ■ ■ FM S-meter shifter function can adjust for sample-to-sample variations in the S-meter Serial I/O: Three channels (8-bit 3-wire serial I/O) ■ (Fixed resistors are used for SD, KEYEDAGC, MUTE ON ADJ, MUTE ATT, SNC, and HCC.) Multiple interrupt support: 4 levels ■ µ ■ High-speed search is possible using the FM band muting time constant switching function Cycle time: 1.33 s (4.5 MHz) ■ ■ The low power consumption of the earlier device has been reduced even further QTP version: LC72P366 ■ ■ Increased flexibility in the MRC setting Package: QIP80E (14 20 mm) ■ Package: QIP64E (14 14 mm)

Block Diagram Block Diagram

ST IND 5V AM/FM SD PI0/ADI4 PH3/ADI3 PH2/ADI2 PH1/ADI1 PH0/ADI0 PPQ PP3 PP2 PP1 PP0 PO3 PO2 PO1 PO0 PN3 PN2 PN1 PN0/BEEP PM3 PM2 PM1 PM0 PL3 PL2 PL1 PL0 PK3 PK2 PK1/INT1 PK0/INT0 PJ3 PJ2 PJ1 PJ0 PI1/ADI5 EO1 EO2 BUSPD EO3 0.022 F ADJ F µ F ST IND ST F F

µ µ µ µ 56k µ 0.022F 1 VCC F

1.3k F µ

3.3 30k 0.022 2.2 µ 1 100 100k AM-IF-AGC MUTE-ON FM-SD-ADJ

+ 0.022 F AM-ANT-D AM-WAGC-IN + 10k µ MPX

+ + + 9p 1 PILOT-DET AM LC 2.7V VREF F AM/FM SD RF-AGC BYPASS F MUTE-DRIVE AFC-IN µ AM-IFT INTERUPT µ VCC 48 47 46 45 44 43 KEYED AGC 42 41 40 +39 38 37 36 35 34 33 75 100k BV BUS BUS BUS BUS BUS BUS BUS BUS BUS MPX DATA DATA DATA DATA DATA DATA DATA DATA DATA BUS LATCH LATCH LATCH LATCH LATCH LATCH LATCH LATCH LATCH DRIVR. FM-VSM DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. 0.022 PHASE

min:5k PHASE DRIVR. SUB C.P DETECTOR

49 32 1000p DETECTOR IOS IOS IOS IOS IOS FM-IF-IN2 DET-OUT 220

AM 2nd F F

MUTE BEEP TONE µ µ 50 31 100 MIX IN drive 3 + 620 1M IF-AMP 8200pSW

REG 0.22

0.022 MUTE 1 Q.DET IF-AMP 2 2.7V 68k µF 100 51 AM 30 + ANT D FM AFC IF2 IF-AMP REG 0.22IF µF AM-IF-IN AM MUTE NC.MPX count30k AMP 52 AM AGC IF-AMP H det AMP. 29 SKIP IF1 drive NC-IN IF-AMP REG HCC IF AM-IF-OUT s mute Mute FM IF count SW FM-IF-OUT ATT JUDGE 15p 15p 53 AMDET IF-AMP control 28 BUS AMLC FM Vsm REG SNC µ

MRC-OUT status status

AM-MIX-OUT REG ADC Zap F INSTRU- CTION DECODER register register AM + CONTROL

BUFF MRC (6 bits) read/sritc 3.3 read only 54 AMIF out2 27 +

100 JMP CAL RETURN INTERRUPT RESET FM-WB-AGC AGC REG AM-SD-ADJ AM MRCADJ µ AM MIX KEYED timeFE F X OSC PLL CONTROL AGC FM/AM const GAD F 55 AM SD-ST IND 26 BANK CF

+ BANK

µ 100k RF-AGC Vsm AM µ FC18G MRC + F 51k ADDRESS

100k W-AGC DECODER noise JDC CCD

100 3.3GND AM amp 30M AM-IF-IN1 56 25 N-AGC AM/FM AM/FM VSM

100k FM-IF-IN1 F 470 1ST SW 0.022µF µ IF

AMP CSUST DO AM-NB-AGC57 24 6pMUTE-ATT µ IN F DATA BUS

F IF COUNT 200 0.022 µ

BUFFER ALU 58 phase 23 F LEVEL tri 14 14

µ VCO

NC NC comp RAM DET HCC ger 0.022 (LC72358) 8k 16bits

stop ROM 1/114,1/124 MIX-OUT HPF LPF (LC72366) (LC72362) (LC72366) 512k 4bits

ECL PROGRAMABLE DIVIDER 1024k 4bits pilot 12k 16bits 16k 16bits 59 22 (LC72358/362)

0.022 SNC FF 38k FF PLL Data Latch det + STACK MIX-OUT ECL 19k PHASE-COM47k IF Buffer INTERRUPT

W-AGC A B 0.022

ECL pilot + ADDRESS DECODER 30 AM/FM MIX REFERENCE DIVIDER 60 21PHASE- TIMER 0 TIMER 1 can Time PHASE CONTROL 1000p UNIVERSAL COUNTER (20 bits) FF VCO 5/2.5/0V LATCE LATCE 33 FE ECL COM NC TRIG AGTE Sud De VCC10p AGCN-AGC coder

ECL -

+ PROGRAM COUNTER F Main

3p 61 MATRIX20 µ F + HC VCO µ AM-MIX-IN10p CSB

22 SEP-ADJ 62 AM OSC 19 912kHz 1000p FM RF AM OSC 20k µF AGC BUFF FM OSC 0.047 0.022 MIX-IN FM OSC 100k 63 18 1/16,1/17 BUFF 1/2

15p 1000p SNS

ANT-D DIVIDER SYSTEM CLOCK GEMERATOR

PI-CAN IOS IOS IOS 100k 64 17 µFOUT RESET RESET MIX-IN SNS F/F 0.01 1000p 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 PI-CAN 3 ISO BUS BUS BUS BUS BUS BUS BUS

100k IN DATA DATA DATA DATA DATA DATA 300p SEN LATCH LATCH LATCH LATCH LATCH LATCH DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. 22p 33k 180 + 100k 100k

1000p SVC208 + VDET FE GND 6800p F F F AM/FM 150k µ F

220k µ µ PLL IN PLL 10.25M IN AGC µ NOISE AGC OSC BUFF F FM ANT D ANT FM F µ MPX OUT L MPX OUT

100 18p MPX OUT R MPX OUT µ 0.01 LPF OUT AGC ADJ NC,MPX GND HOLD FM OSC 1000p 30k AM VCC 8V AM ANT AM/FM ANT INFE GND AM/FM VT FE VCC AM/FM SWAM/FM 10.25kHz0.015 IN L-ch R-ch GND VCC FM/AM VSM 0.015 0.47 FM RF1-AGC 0.001 8p OSC BUFF 33p SVC208 100k 0.1 AM OSC XIN PF0 PE0 PA0 PA1 PA2 PA3 PB0 PB1 PB2 PB3 PC2 PC3 PD0 PD1 PD2 PD3 PC0 PC1 PG0 VSS SNS VDD FMIN AMIN LCTR HCTR XOUT MOLD TEST2 TEST1 SI1/PF3 SI2/PE3 SI0/PG3 SO1/PF2 SO2/PE2 SO0/PG2 PCK1/PF1 PCK2/PE1 PCK0/PG1

51 Car Audio 52 Car Audio

Electronic Tuning ETR Controllers LC723780 Series Overview Overview The LC723780 series are large-memory ETR controllers that provide up to 128 KB of ROM and up to 8 KB of The LC72336 and LC72338 are system-on-chip electronic tuning microcontrollers that integrate both a PLL circuit RAM. that can operate at up to 150 MHz and a 1/3 duty LCD driver. They also feature a highly efficient instruction set In addition to a rich set of table reference instructions to take advantage of the large ROM capacity, these devices and powerful hardware also feature an improved interrupt system for direct control of the CD mechanism and the CD DSP, support for Electronic Tuning ETR Controllers RDS products, and powerful communications for use within the end product and with external systems as well. In car audio applications in particular, these communication functions allow a reduction in the number connecting wires between the front panel circuit board and the main system circuit board. Functions Functions ■ High-speedLC72336/LC72338 programmable divider ■ Program memory (ROM): LC72336 - 6143 words 16 bits (12 KB) ■ ROM/RAM: 40 KB/2 KB (LC723781) LC72338 - 8191 words 16 bits (16 KB) 48 KB/2 KB (LC723782) ■ Data memory (RAM): 512 4 bits 64 KB/4 KB (LC723783) ■ All instructions are one word 96 KB/6 KB (LC723784) ■ Cycle time: 1.33 µs 128 KB/8 KB (LC723785) ■ Stack: 8 levels ■ Cycle time: 1.33 µs/833 ns (all instructions are one word) at 4.5 MHz/7.2 MHz ■ LCD driver: Up to 96 segments (1/3 duty, 1/3 bias) ■ Serial I/O: Three channels (supports 8-bit, 2- or 3-wire systems) MSB/LSB first switching ■ Serial I/O: Up to 3 channels (8-bit 3-wire type) ■ Multiple interrupts: 16 levels ■ External interrupt: Two channels (INT0 and INT1) ■ A/D converter: 8-bit successive approximation A/D converter with 8 input channels Supports both rising edge and falling edge detection ■ PLL block: Dead zone control, unlocked state detection circuit ■ Package: LC72336 - QIP80E (14 20 mm) ■ QTP version: LC72F3781 LC72338 - QIP80E (14 20 mm) ■ Package: QIP100E (14 20 mm)

Block Diagram Block Diagram 1 2 DD DD V V PL3 PL2 PL1 PL0 PK3/INT PK2/INT PK1/INT PKO/INT PJ3 PJ2 PJ1 PJ0 INE0 PT1 PT0 PS3 PS2 PS1 PS0 PR3 PR2 PR1 PR0 PQ3 PQ2 PQ1 PQ0 PP3 PP2 PP1 PP0 PO3 PO2 PO1 PO0 PN3 PN2 PN1 PN0/BEEP PM3 PM2 PM1 PM0 EO1 EO2 SUBPD C.P. SUB EO1 EO2 COM1 COM2 COM2 PJ1 / DAC1 PJ0 / DAC0 PK3 PK2 PK1 / INT1 PK0 / INT0 PH3 / ADI3 PH2 / ADI2 PH1 / ADI1 PH0 / ADI0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 S17 / PE0 S18 / PE1 / SCK2 S19 / PE2 / SO2 S20 / PE3 / SI2 S21 / PF0 S22 / PF1 / SCK1 S23 / PF2 / SO1 S24 / PF3 / SI1 S25 / PM0 S26 / PM1 S27 / PM2 S28 / PM3 S29 / PN0 / BEEP S30 / PN1 S31 / PN2 S32 / PN3 PJ3 / DAC3 PJ2 / DAC2 MPX BUS BUS BUS BUS BUS BUS BUS BUS BUS BUS BUS DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA LATCH LATCH LATCH LATCH LATCH LATCH LATCH LATCH LATCH LATCH LATCH LATCH DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. (PRG/FIX) BEEP GEN LCD PORT DRIVER F/F PHASE UNLOCK 96 MPX MPX MPX MPX DETECTOR INTERRUPT INTERRUPT COMMON DRIVER MPX SKIP LATCH LATCH BUS DRIV. LATCH BUS DRIV. LATCH BUS DRIV. LATCH BUS DRIV. LATCH BUS DRIV. LATCH BUS DRIV. LATCH BUS DRIV. JUDGE BEEP 7 READ WRITE STATUS STATUS MPX PF REGISTER REGISTER BUS FIX 2 TIMER DECODER 4 PROG 2 PHASE DETECTOR SEG PLA CONTROL SELECTOR INSTRUCTION UNLOCK F / F LCPA / B LCPA / B 4 BANK ADDRESS DECODER BUS DRIVER ALU BUS CONTROL INTERRUPT (PC,BANK,CF,PF) STACK 32k 16bits DAC ADC ROM RAM 64k 16bits SELECTOR 16k 4bits A B JUDGE LATCH LATCH ∗ DTR/ADR INSTRU- CTION DECODER PLL DATA LATCH REFERENCE DIVIDER A/D-C (8bits) ADDRESS DECODER PROGRAM COUNTER PROGRAMMBLE DIVIDER PROGRAMMBLE ADDRESS DECODER (20bits) COUNTER UNIVERSAL ALU 3 SIO BUS BUS BUS BUS BUS BUS BUS BUS BUS MPX(8ch) DATA DATA DATA DATA DATA DATA LATCH LATCH LATCH LATCH LATCH LATCH DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. DRIVR. ROM LATCH RAM STACK 1/2 1/16,1/17 GENERATOR 8k X 16bits DIVIDER LC72336 6k X 16bits ADDRESS DECODER PROGRAM COUNTER 512 X 4bits SYSTEM CLOCK VDET SNS PROGRAMMABLE DIVIDER REFERENCE DIVIDER SNSF/F (20bits) XIN PF0 PE0 PA2 PA3 PB0 PB1 PB2 PB3 PA0 PA1 COUNTER PD2 PD3 PC0 PC1 PC2 PC3 PG0 VSS SNS VDD UNIVERSAL SS FMIN AMIN DD LCTR HCTR HOLD XOUT PA0 XIN TEST1 TEST2 PB3 PA1 PA2 PA3 PB0 PB1 PB2 PC0 PC1 PC2 PC3 V PG0 RESET SNS V SI2/PE3 SI1/PF3 FMIN AMIN SI0/PG3 ADI4/PI0 ADI5/PI1 ADI6/PI2 ADI7/PI3 SO2/PE2 LCTR SO1/PF2 HOLD XOUT INTERRUPT SO0/PG2 HCTR INT5/PD1 INT4/PD0 ADI1/PH1 ADI2/PH2 ADI3/PH3 ADI0/PH0 TEST2 TEST1 SCK1/PF1 SCK2/PE1 SCK0/PG1 SI0 / PG3 SO0 / PG2 SCK0 / PG1 SIO LATCH BUS DRIV. 1 /16, 1 /17 DIVIDER BUS DRIV. 1 /2 LATCH BUS DRIV. LATCH BUS DRIV. SNSFF

53 Car Audio 54 Car Audio

V-DET Multiplexed Stereo Decoder For Automotive AV Equipment

System Chipsets Automotive AV Equipment Related Products System Chipsets SANYO provides high-quality TV audio based on unique audio processing technologies.

Car stereo two-channel BTL audio frequency power amplifier 15 W (Total output: 25 W + 25 W) LA4705NA P57 20 W (Total output: 30 W + 30 W) LA4708NF P58

Speaker AF output •Extremely low levels of impulse noise •Supports loads as low as RL = 2 Ω 2ch LA4485 P59 •Superb sound quality design Tuner SIF P57 LA4705NA (fL < 10 Hz, fH = 130 kHz) LA4708NF P58 1ch LA4425A P60 •Noise filter circuit does not required capacitors •The turn-on time can be set arbitrarily with an external capacitor •Built-in standby mode switching circuit (microcontroller support) •Full complement of protection circuits (Protection against shorting to power, shorting to ground, and load shorting as well as overvoltage and thermal protection circuits) CRT Chroma output Car Stereo 5 W AF Power Amplifiers VIF Chroma circuit Vertical output that Require Minimal External Horizontal output Components Two channels: LA4485 P59 One channel: LA4425A P60

•Extremely few external components required LA4485: Dual mode: 4 or 5 components BTL mode: 3 or 4 components LA4425A: 2 components •Wide operating supply voltage range •Impulse noise reduction circuit •Standby mode switching function (LA4485) •Audio muting function (LA4485) •Full complement of protection circuits (Protection against overvoltage, excessive temperatures, and output DC shorting)

55 Car Audio 56 Car Audio

Monolithic Linear IC Monolithic Linear IC Car Stereo 17 W Two-Channel BTL AF Amplifier Car Stereo 20 W Two-Channel BTL AF Amplifier LA4705NA LA4708LA4708NF Overview Overview The LA4705NA is a two-channel BTL power amplifier IC designed for car stereo systems. It was designed with The LA4708NF is two-channel BTL power amplifier IC designed for car stereo systems. It was designed with particular emphasis placed on achieving superb audio quality. particular emphasis placed on achieving superb audio quality. The low band frequency characteristics were extended with a new capacitor-free noise filter circuit, and The low band frequency characteristics were extended with a new capacitor-free noise filter circuit, and improvements in both circuit and pattern designs allow crosstalk, a source of audio quality problems, to be improvements in both circuit and pattern designs allow crosstalk, a source of audio quality problems, to be reduced, resulting in audio with powerful bass and clear treble. reduced, resulting in audio with powerful bass and clear treble. The LA4705NA also features a full complement of protection circuits and a standby mode switch. The LA4708NF also features a full complement of protection circuits and a standby mode switch. Note that the LA4708NF is pin compatible with the LA4705NA (car stereo 17 W two-channel power amplifier Functions IC), and allows end product power to be increased simply by switching ICs. (Pins 1 and 9 must be left open to allow the same circuit board to be used.) ■ Ω Total output: 25 W + 25 W (VCC = 14.4 V, THD = 30%, RL = 4 ) ■ Ω Functions Supports loads as low as RL = 2 ■ Superb sound quality design (fL < 10 Hz, fH = 130 kHz) ■ High power with a total output of 30 W + 30 W (V = 13.2 V, THD = 30%, R = 4 Ω) ■ CC L Noise filter circuit does not require capacitors ■ Supports loads as low as R = 2 Ω (V = 13.2 V, THD = 30%, P = 30 W) ■ L CC O The turn-on time can be set arbitrarily with an external capacitor ■ Superb sound quality design (f < 10 Hz, f = 130 kHz) ■ L H Extremely low levels of impulse noise ■ Noise filter circuit does not require capacitors ■ Built-in standby mode switching circuit (microcontroller support) ■ The turn-on time can be set arbitrarily with an external capacitor ■ Built-in each protection circuit ■ Extremely low levels of impulse noise ◆ Output pin-to-Vcc short ■ Built-in standby mode switching circuit (microcontroller support) ◆ Output pin-to-GND short ■ Built-in each protection circuit ◆ Load short ◆ Output pin-to-Vcc short ◆ Overvoltage ◆ Output pin-to-GND short ◆ Thermal shutdown ◆ Load short ■ Package: SIP18H ◆ Overvoltage ◆ Thermal shutdown ■ Package: SIP18H Block Diagram

100µF/16V Block Diagram + V 100µF/16V CC + VCC VCC1 C2 2200µF 3 1 18 + 2200µF NC 3 1 18 C5 + RIPPLE OUTPUT PIN TO VCC SHORT PROTECTOR FILTER RIPPLE OUTPUT PIN TO VCC FILTER SHORT PROTECTOR PREDRIVER POWER 17 POWER µF INVERTING GND1 PREDRIVER POWER 17 µ + ** 0.1Ω + C1 POWER OUT10.1 F 2 + LOAD SHORT INVERTING2.2 IN1 C6 IN + GND1 Ω + µ PROTECTOR 16 OUT1 Ω + ** 2.2 2.2 F/ - Ω 2 LOAD SHORT R2 6.3VIN1 2.2 IN PROTECTOR R ** - 2.2µF/ 16 2.2Ω LΩ 0.1µF - 2 to 4 R 6.3V R3 µ - PREDRIVER POWER 15 L ** 0.1 F 2 to 4 C7 PREDRIVER POWER 15 PRE GND NON-INVERTING 4 BIAS OUTPUT PIN-TO-GND PRE GND SHORT PROTECTOR CIRCUIT OVER VOLTAGE/ OUT1 V NON-INVERTING 4 BIAS OUTPUT PIN-TO-GND SURGE PROTECTORCC SHORT PROTECTOR POLYESTEROUT1 FILM CIRCUIT OVER VOLTAGE/ VCC AMP THERMAL **CAPACITOR SURGE PROTECTOR POLYESTER FILM OFF ON 10KΩ SHUTDOWN AMP STANDBY R1 THERMAL **CAPACITOR OUTPUT PIN-TO-GND OFF ON SHUTDOWN 5 SW SHORT PROTECTOR 10KΩ POWER 0.1 STANDBY OUTPUT PIN-TO-GND 5 SW SHORT PROTECTOR GND2 POWER PREDRIVER POWER 14 NON-INVERTING GND2 2.2 OUT2µF +5V PREDRIVER POWER 14 NON-INVERTINGµ + ** Ω OUT20.1 F 7 + LOAD SHORT 2.2 +5V C8 POP NOISE IN + Ω + IN2PREVENTIONµF/ PROTECTOR 13 RLΩ C4 + ** 2.2 - Ω 7 LOAD SHORT R4 6.3VCIRCUIT + 2.2 2 to 4 IN2 IN PROTECTOR R ** 0.1 - 2.2µF/ - 13 2.2Ω LΩ µF 6.3V R5 2 to 4 V 2 µ - PREDRIVER POWER CC 12 ** 0.1 F INVERTING V 2 C9 PREDRIVER POWER CC 12 OUT2 INVERTING OUTPUT PIN TO VCC POP NOISE OUT2 SHORT PROTECTOR PREVENTION OUTPUT PIN TO VCC CIRCUIT + SHORT PROTECTOR 6 8 NC9 10NC 11 + N.C + 33 6 8 9 10 11 33µF/ 0.47µF/ + 1,9,10 PinááááááNon connect 6.3V 6.3V 1,9 PinááááááDon' t use µF/ C3 0.47µF/ 10 PinááááááNon connect 6.3V 6.3V

57 Car Audio 58 Car Audio LA4485 LA4425A

Monolithic Linear IC Monolithic Linear IC Car Radio/Car Stereo 5 W Two-Channel Power Amplifier Car Radio/Car Stereo 5 W Power Amplifier that Requires that Requires Minimal External Components MinimalMinimal ExternalExternal ComponentsComponents LC4425A Overview Overview

The LA4485 obviates the need for the BS capacitor, noise filter capacitor, and oscillation prevention RC The LA4425A is a 5 W power amplifier IC for car radio and car stereo systems that requires an extremely small components previously required by power amplifier ICs by integrating them on the IC itself. The LA4485 requires number of external components. only the barest minimum of external components and both dual and BTL type operation are supported in the power series ("stylish power").

Functions Functions ■ Dual: 5 W 2, BTL: 15 W ■ The industry's first power amplifier that requires so few external components ■ Extremely few external components required: 4 or 5 in dual mode, 3 or 4 in BTL mode ◆ Provided in the industry's smallest package: SIP-5H (a TP126 type package) ■ Built-in Each protection circuits ◆ Only required 2 external components: input and output coupling capacitors only ◆ Overvoltage protection circuit ■ As a power IC, evaluation, adjustment, and investigation are essentially unnecessary ◆ Thermal protection circuit This leads to simplified management ◆ Output DC short protection circuit (with respect to both VCC and ground) ■ Wide operating supply voltage range: 5 to 16 V ■ Circuit to handle application of +VCC to the outputs ■ Built-in Each protection circuits ■ Built-in impulse protection circuit ◆ Overvoltage protection circuit ■ Standby mode switching function ◆ Thermal protection circuit ■ Audio muting function ◆ Output DC short protection circuit ■ Package: SIP13H ■ Built-in impulse protection circuit ■ Package: SIP5H

Block Diagram Block Diagram

V Large signal Small signal CC13.2V Filter system VCC system VCC + 1000 µF 6 7 8

Filter Channel 1 input Short to ground 5 protection circuit Channel 1 output 1 Input amplifier Pre-driver Output (CH1) amplifier amplifier 13 + µF Ci 2.2 Short to V Rf1 CC Co 1000 protection circuit 1 RNF1 Thermal protection µF circuit + LA4425A 4 REF Small signal system ground 3 amplifier 12 Large signal system ground RNF2 speaker Rf2 2 Overvoltage 4Ω protection circuit Channel 2 output Short to V Channel 2 input Input CC amplifier Pre-driverprotection circuitOutput amplifier (CH2) Short to ground amplifier BTL IN 4 protection circuit 11 3 2

Standby mode switch MUTE

5 BTL OUT9 10 Standby mode MUTE

59 Car Audio 60 Car Audio FM Multiplex Broadcasting For Automotive AV Equipment System Chipset s FM multiplex broadcasting is a new data transmission system that allows reception by mobile System Chipset s receivers and features a large transmission capacity and a wide service area. SANYO has proposed ICs that exactly match the requirements of each functional block and is now aiming at further product line expansion in this area.

*The DARC system is an FM multiplex broadcasting system proposed by NHK (Japan Broadcasting Corporation). It is appropriate for DARC System FM Multiplex reception from mobile receivers. Data Decoder *A contract with VICS Center is required to acquire VICS decoder ICs. VICS-IC ...... New product LC72713W P65 LC72714W P66 ...... Under development •Built-in dedicated VICS decoder circuit •VICS data and D-GPS data can be acquired at the same time with a single Stereo AF tuner. Tuner amplifier •On-chip 76-kHz bandpass filter based matrix Wide Range of RAM and ROM Options on SC technology Signal Control Microcontrollers •Adopts a delay detection technique that Program LC875B Series P23 to 24 is particularly effective in mobile reception DARC FM multiplex broadcast decoder IC storage memory •Clock recovery using a digital PLL circuit •Block and frame synchronization •Manages the broadcast (received) data and detection circuits controls the LCD driver as an FM multiplex •Error correction circuit using (272, 190) broadcasting signal controller codes •This series is optimal since the abundant 76 kHz CPU •On-chip frame memory for product code MSK internal RAM can be used for smooth data band-pass demodulation interface •Layer 4 CRC code check circuit filter management •Selectable CCB serial and parallel ROM: 176 Kbytes to 256 Kbytes Signal control microcontrollers interfaces RAM: 4 to 6 Kbytes LC875B Series •Operating temperature: – 40 to + 85˚C LC87F5BP6A P23 to 26 LC87F5BP6A (Flash Version) P23 to 24 •Supply voltage:4.5 to 5.5 V (LC72713W) Synchronization 2.7 to 3.6 V (LC72714W) regeneration •Provides a dedicated 8-bit bus for optimal data •Package: SQFP64 (10 10) management and LCD display •Includes 256 KB of flash memory as on-board Support for All Broadcast Systems reprogramable ROM LC72711W P63 LCD driver •Includes 6 KB of RAM LC72711LW P64 Frame Error VICS •Supports FM multiplex all frame methods memory correction decoder (methods A though C) •For reception of FM multiplex services All products described in this catalog contain developed products or other than VICS ICs that support all formats products that are diverted from general types. In accordance with standard of quality management system ISO/TS16949 for automotive industry, there •Operating temperature: – 40 to + 85˚C LC72711W/LC72711LW P63 to P64 ICs that support VICS and D-GPS CRTC Display panel is a case where all demanded articles couldn't be supported, so please •Supply voltage:4.5 to 5.5 V (LC72711W) confirm to the salesman of our company at every order. LC72713W/LC72714W P65 to P66 2.7 to 3.6 V (LC72711LW) •Package: SQFP64 (10 10) Flash products are licensed from Silicon Storage Technology, Inc.,(USA), and manufactured and sold by SANYO Electric Co., Ltd.

LAN drivers Graphics CCB is a SANYO’s original bus format and all the P1 to 2 P1 to 2 P1 to 2 CARNET CAN MOST display bus addresses are controlled by SANYO. LA2330W P3 LA2360M P5 . 22 LA2340M P6 . 21 LA2333T P4 LA2361AM P5 LV2341M P6 . 21 The DARC (Data Radio Channel) FM multiplex broadcasting technology was developed by NHK LA2351M P4 . P20 LA2361JM P5 (Japan Broadcasting Corporation) . DARC is a registered trademark of NHK Engineering Service (NHK-ES) . A separate contract with NHK-ES is required for the production and sale of electronic equipment using DARC technology . The logo shown here can be displayed on electronic equipment using DARC technology. Extensive lineup provides full support for a wide range of systems

Tuner Block Dual gate MOSFETs for amplifiers Transistors for AM and FM buffers Other transistors (power supply, interface, and switch drive) 3SK263 (V = 15 Vmin, I = 2.4 to 24 mA, yfs = typ 14 ms), 2SC2812N (V = 50 V, I = 150 mA, f = typ 100 MHz), Bipolar transistors: 50C02CH (V = 15 V, I =1 A, V (sat) = max 280 mV) Varactor diodes for tuning DS DSX CEO C T CEO C CE 3SK264 (V = 15 V, I = 5.0 to 24 mA, yfs = typ 17 ms) 2SC2814 (V =20 V, I =30 mA, f = typ 320 MHz) (NPN) 2SC5706 ( V = 50 V, I = 5 A, V (sat) = typ 90 mV) SVC230 (CR (C2.0V/C8.0V) ≥1.65, Q ≥100) DS DSX CEO C T CEO C CES Transistors for buffers PIN diodes for AM AGC and switching 2SD1913 (V = 60 V, I = 3 A, PC = 20 W, h 70 to 280) SVC243 (CR (C1.0V/C6.5V) ≥7.0, Q ≥40) CEO C FE 2SC2812N (V = 50 V, I = 150 mA, f = typ 100 MHz), Series with rs = typ 5 Ω: ISV247, ISV233, ISV246, ISV234, CPH5512 MOSFET: 5LN 01M (V = 50 V, I = 100 mA R (on) SVC272 (CR (C2.0V/C8.0V) ≥2.3, Q ≥150) CEO C T DSS D DS 2SC2814 (V = 20 V, I = 30 mA, f = typ 320 MHz) PIN diodes for FM AGC and switching (Nch) = 9.9 Ω) SVC273 (CR (C2.0V/C8.0V) ≥3.1, Q ≥100) CEO C T GS PIN diodes for AGC and switching Series with rs = typ 6 Ω: ISV294, ISV315, ISV316, ISV298H CPH6424 (V = 60 V, I = 3 A R (on) *: SV272, SV273: MCPH3 miniature package (2.1 2.0 mm) DSS D DS Series with rs = typ 6 Ω: ISV294, ISV315, ISV316, ISV298H typ 150 mΩ)

61 Car Audio 62 Car Audio

MobileMobile FMFM MultiplexMultiplex BroadcastBroadcast (DARC(DARC System)System) Mobile FM Multiplex Broadcast (DARC System) Receiver IC Receiver IC LC72711W LC72711LW Overview Overview The LC72711W is a data demodulation IC for the reception of mobile FM multiplex broadcasts in the DARC The LC72711LW is a data demodulation IC for the reception of mobile FM multiplex broadcasts in the DARC system. system. The LC72711W includes a bandpass filter for the extraction of the DARC signal from the FM baseband. The LC72711LWMobile includes a bandpass FM Multiplex filter for the extraction Broadcast of the DARC signal (DARC from the FM baseband.System) This IC is optimal for worldwide FM multiplex products since it supports all of the FM multiplex frame structures This IC is optimal for worldwide FM multiplex products since it supports all of the FM multiplex frame structures (methods A, A', B, and C) in the ITU-R recommendations. (methods A, A', B, and C) in the ITU-R recommendations. The LC72711W and LC72711LW support both parallel connection and CCB serial interface in place of the CPU The LC72711W and LC72711LW support both parallel connection and CCB serial interface in place of the CPU interface provided by the LC72709E. interface provided by the LC72709E. Functions Functions ■ Adjustment-free SCF based 76 kHz bandpass filter ■ Adjustment-free SCF based 76 kHz bandpass filter ■ Supports all FM multiplex frame structures (methods A, A', B, and C) under CPU control ■ Supports all FM multiplex frame structures (methods A, A', B, and C) under CPU control ■ MSK delay detection circuit using a 1T delay ■ MSK delay detection circuit using a 1T delay ■ Error correction function using a 2T delay (in the MSK detection stage) ■ Error correction function using a 2T delay (in the MSK detection stage) ■ Digital PLL based clock regeneration circuit ■ Digital PLL based clock regeneration circuit ■ Shift register type 1T and 2T delay circuits ■ Shift register type 1T and 2T delay circuits ■ Block and frame synchronization detection circuits ■ Block and frame synchronization detection circuits ■ Function for setting the allowable BIC error count and synchronization protection count ■ Function for setting the allowable BIC error count and synchronization protection count ■ Error correction using (272,190) codes ■ Error correction using (272,190) codes ■ Layer 4 CRC code checking circuit ■ Layer 4 CRC code checking circuit ■ Includes the frame memory and memory control circuit required for vertical correction ■ Includes the frame memory and memory control circuit required for vertical correction ■ 7.2 MHz crystal oscillator circuit ■ 7.2 MHz crystal oscillator circuit ■ Two power saving modes (standby and EC stop modes) ■ Two power saving modes (standby and EC stop modes) ■ Either a CPU parallel interface (DMA) or a CCB serial interface can be used ■ Either a CPU parallel interface (DMA) or a CCB serial interface can be used ■ Supply voltage: 4.5 to 5.5 V ❋ :CCB is SANYO's original bus format. ■ Supply voltage: 2.7 to 3.6 V ❋ :CCB is SANYO's original bus format. ■ All bus addresses are managed by ■ All bus addresses are managed by Package: SQFP64 (10 10 mm) SANYO for this format. Package: SQFP64 (10 10 mm) SANYO for this format.

The DARC (Data Radio Channel) FM multiplex broadcast technology was developed by NHK The DARC (Data Radio Channel) FM multiplex broadcast technology was developed by NHK (Japan Broadcasting Corporation). (Japan Broadcasting Corporation). DARC is a registered trademark of NHK Engineering Services, Inc. (NHK-ES). DARC is a registered trademark of NHK Engineering Services, Inc. (NHK-ES). A separate contract with NHK-ES is required for the manufacturer or sale of electronic A separate contract with NHK-ES is required for the manufacturer or sale of electronic equipment that uses DARC technology. equipment that uses DARC technology. The logo shown here may be used with electronic equipment that uses DARC technology. The logo shown here may be used with electronic equipment that uses DARC technology. Block Diagram Block Diagram CLK16 DATA BLOCK FLOCK BCK FCK CLK16 DATA BLOCK FLOCK BCK FCK

LPF Vddd Vddd LPF Vssd Vssd 1T delay Error 1T delay Error Clock Synchronization correction Clock Synchronization correction regeneration regeneration Timing Layer 2 CRC regeneration regeneration Layer 2 CRC Timing 2T delaySTNBY control STNBY 2T delay control MSK RST MSK 7.2MHz correction PN 7.2MHz correction PN RSTLPF decoding XOUT LPF decoding XOUT Data Data XIN VrefXIN Vref Address Address Antialiasing MPXINAntialiasing 76kHz 76kHz filter MPXIN filter BPF BPF Memory array Memory array (SCF) Output control (CPU interface) and (SCF) Output control (CPU interface) and layer 4 CRC checking circuit Vdda layer 4 CRC checking circuit Vdda Vssa Vref Vssa Vref A3 A3 SP SP CS CS RD RD DO DO TIN TIN INT INT WR WR CIN CIN RDY RDY A2/DI A2/DI VREF VREF CRC4 CRC4 A0/CL A0/CL DACK DACK DREQ DREQ A1/CE A1/CE FLOUT FLOUT IOCNT2 IOCNT2 IOCNT1 IOCNT1 BUSWD BUSWD D0 to D15 D0 to D15

63 Car Audio 64 Car Audio

MobileMobile FMFM MultiplexMultiplex BroadcastBroadcast ReceiverReceiver ICIC Mobile FM Multiplex Broadcast Receiver IC with Built-in VICS Decoder with Built-in VICS Decoder LC72713W LC72714W Overview Overview The LC72713W is a data demodulation IC for the reception of mobile FM multiplex broadcasts in the DARC The LC72714W is a data demodulation IC for the reception of mobile FM multiplex broadcasts in the DARC system. system. The LC72713W includes a bandpass filter for the extraction of the DARC signal from the FM baseband. The LC72714WMobile includes a bandpass FM Multiplexfilter for the extraction Broadcast of the DARC signal fromReceiver the FM baseband. IC This IC also includes a data circuit for processing VICS data and can implement a compact and highly functional This IC also includes a data circuit for processing VICS data and can implement a compact and highly functional VICS reception system. The LC72713W features improvements over the circuits included in the LC72710W for VICS reception system. The LC72714W features improvements over the circuits included in the LC72710W for receiving VICS data and dGPS data in a single tuner. receiving VICS data and dGPS data in a single tuner. Note that a separate contract with Vehicle Information and Communication Center is required for sample Note that a separate contract with Vehicle Information and Communication Center is required for sample evaluation of this IC and to manufacture VICS products. evaluation of this IC and to manufacture VICS products. Functions FunctionsLC72714W ■ Adjustment-free SCF based 76 kHz bandpass filter ■ Adjustment-free SCF based 76 kHz bandpass filter ■ VICS decoder circuit ■ VICS decoder circuit ■ MSK delay detection circuit using a 1T delay ■ MSK delay detection circuit using a 1T delay ■ Error correction function using a 2T delay (in the MSK detection stage) ■ Error correction function using a 2T delay (in the MSK detection stage) ■ Digital PLL based clock regeneration circuit ■ Digital PLL based clock regeneration circuit ■ Shift register type 1T and 2T delay circuits ■ Shift register type 1T and 2T delay circuits ■ Block and frame synchronization detection circuits ■ Block and frame synchronization detection circuits ■ Function for setting the allowable BIC error count and synchronization protection count ■ Function for setting the allowable BIC error count and synchronization protection count ■ Error correction using (272,190) codes ■ Error correction using (272,190) codes ■ Layer 4 CRC code checking circuit ■ Layer 4 CRC code checking circuit ■ Includes the frame memory and memory control circuit required for vertical correction ■ Includes the frame memory and memory control circuit required for vertical correction ■ 7.2 MHz crystal oscillator circuit ■ 7.2 MHz crystal oscillator circuit ■ Two power saving modes (standby and EC stop modes) ■ Two power saving modes (standby and EC stop modes) ■ Dedicated frame synchronization circuit optimal for simultaneous reception of dGPS and VICS data ■ Dedicated frame synchronization circuit optimal for simultaneous reception of dGPS and VICS data ■ Either a CPU parallel interface (DMA) or a CCB serial interface can be used ■ Either a CPU parallel interface (DMA) or a CCB serial interface can be used ■ Supply voltage: 4.5 to 5.5 V ❋ :CCB is SANYO's original bus format. ■ Supply voltage: 2.7 to 3.6 V ❋ :CCB is SANYO's original bus format. ■ All bus addresses are managed by ■ All bus addresses are managed by Package: SQFP64 (10 10 mm) SANYO for this format. Package: SQFP64 (10 10 mm) SANYO for this format. The DARC (Data Radio Channel) FM multiplex broadcast technology was developed by NHK The DARC (Data Radio Channel) FM multiplex broadcast technology was developed by NHK (Japan Broadcasting Corporation). (Japan Broadcasting Corporation). DARC is a registered trademark of NHK Engineering Services, Inc. (NHK-ES). DARC is a registered trademark of NHK Engineering Services, Inc. (NHK-ES). A separate contract with NHK-ES is required for the manufacturer or sale of electronic A separate contract with NHK-ES is required for the manufacturer or sale of electronic equipment that uses DARC technology. equipment that uses DARC technology. The logo shown here may be used with electronic equipment that uses DARC technology. The logo shown here may be used with electronic equipment that uses DARC technology. Block Diagram Block Diagram CLK16 DATA BLOCK FLOCK BCK FCK CLK16 DATA BLOCK FLOCK BCK FCK

LPF LPF Vddd Vddd Vssd Vssd 1T delay Error 1T delay Error Clock Synchronization correction Clock Synchronization correction regeneration regeneration Timing Layer 2 CRC regeneration regeneration Timing Layer 2 CRC STNBY 2T delay control STNBY 2T delay control MSK MSK 7.2MHz correction PN 7.2MHz correction PN RST LPF decoding RST LPF decoding XOUT XOUT Data Data XIN Vref XIN Vref 76kHz Address 76kHz Address Antialiasing VICS processing Antialiasing VICS processing MPXIN BPF MPXIN BPF filter (SCF) filter (SCF) Memory array Memory array Output control (CPU interface) and Output control (CPU interface) and Vref Vref Vdda layer 4 CRC checking circuit Vdda layer 4 CRC checking circuit Vssa Vssa A3 A3 SP SP CS CS RD RD DO DO TIN TIN INT INT WR WR CIN CIN RDY RDY A2/DI A2/DI VREF VREF CRC4 CRC4 A0/CL A0/CL DACK DACK DREQ DREQ A1/CE A1/CE FLOUT FLOUT IOCNT2 IOCNT2 IOCNT1 IOCNT1 BUSWD BUSWD D0 to D15 D0 to D15

65 Car Audio 66 Car Audio RDS System Chipsets For Automotive AV Equipment Supports both the European Broadcasting Union's RDS (Radio Data System) and the US NRSC (National Radio System Committee) RBDS (Radio Broadcast Data System) standards. Performs efficient error correction using a soft decision technique. This product also supports master operation in which data is read out in synchronization with the RDS clock output.

...... New product

...... Under development RDS Decoder Single-Chip RDS Decoder PLL Synthesizer LC72722/M/PM P70 Electronic Power Tuner IC High-Speed Locking PLL Frequency volume amplifier Bandpass filter Synthesizer IC •57 kHz switched capacitor filter RDS decoder IC P69 IF Buffer RDS demodulator LC72151V CO t V V LC72722/M/PM P70 •Reproduction of both clock and data signals Comp LC72720Y/YV P72 Block synchronization Includes an extremely fast FM •Supports both forward and backward frequency lock up circuit 2nd OSC LC72723/M P71 LPF protection •The PLL circuit can lock in 500 µs Error correction due to optimal low-pass filter •Soft/hard decision constants IF counter BPSK Buffer Buffer memory Programmable divider Phase BPF demodulator memory •Holds 24 blocks of data temporarily •FMIN: 10 to 160 MHz comparator Serial data input and output •AMIN: 0.5 to 40 MHz •CCB format IF counter Programmable Package:(LC72722) DIP24S (300mil) •HCTR: 0.4 to 25 MHz divider Block (LC72722M) MIP24S (300mil) •LCTR: 10 to 500 kHz High-speed Error Buffer lock control synchro- (LC72722PM) MFP24 (375mil) Reference frequency nization correction memory •Provides 11 different reference Reference divider circuit Single-Chip RDS frequencies (using a 10.25 or Signal-Processing System IC 10.35 MHz crystal) CCB I/F •Crystal oscillator circuit supports CCB I/F LC72720Y/YV P72 AM upconversion Phase comparator Supply voltage: 3.0 to 3.6 V Packages: (LC72720Y) DIP24S (300mil) •Dead band width control PLL synthesizer IC •Unlocked state detection circuit LC72151V P69 (LC72720YV) SSOP30 (275mil) •Deadlock clear circuit CCB Active low-pass filter amplifier •Built-in operational amplifier for high-speed FM frequency locking RDS Data Demodulator •MOS transistor for AM reception Microcontroller LC72723/M P71 Serial data input and output CCB LCD drivers •CCB format LC875 Series P23 to 24 VFD drivers Bandpass filter Package: SSOP30 (275mil) •57 kHz switched capacitor filter RDS demodulator •Reproduction of both clock and data signals LAN drivers All products described in this catalog contain developed products or Buffer memory products that are diverted from general types. In accordance with standard •Holds 128 bits of data temporarily CARNET P1 to 2 CAN P1 to 2 MOST P1 to 2 of quality management system ISO/TS16949 for automotive industry, there Data output LA2330W P3 LA2360M P5 . 22 LA2340M P6 . 21 is a case where all demanded articles couldn't be supported, so please •Master/slave mode switchable readout LA2333T P4 LA2361AM P5 LV2341M P6 . 21 confirm to the salesman of our company at every order. Package:(LC72723) DIP16 (300mil) P4 . P20 P5 LA2351M LA2361JM CCB is a SANYO’s original bus format and all the (LC72723M) MFP16 (225mil) bus addresses are controlled by SANYO.

Extensive lineup provides full support for a wide range of systems

67 Car Audio 68 Car Audio

CarCar AudioAudio ElectronicElectronic TuningTuning PLLPLL Frequency Synthesizer RDS Signal-Processing System-on-Chip IC LC72151V LC72722/M/PM Overview Overview The LC72151V is a PLL frequency synthesizer IC that includes a high-speed locking circuit for FM reception. The LC72722, LC72722M, and LC72722PM are system-on-chip signal demodulation and processing ICs for This device makes it easy to implement high-performance RDS AM/FM tuners. the European Broadcasting Union (EBU) Radio Data System (RDS) and the US National Radio System Committee (NRSC) Radio Broadcast Data System (RBDS). Functions These ICs integrate, on the same chip, bandpass filter, demodulation, synchronization, and error correction ■ High-speed programmable dividers ■ Active low-pass filter amplifier circuits as well as buffer RAM, and provide effective error correction using soft decision error correction. ◆ FMIN: 10 to 160 MHz pulse swallower ◆ Built-in operational amplifier for FM high-speed ◆ AMIN: 2 to 40 MHz pulse swallower locking circuit Functions 0.5 to 10 MHz direct divider ◆ Built-in MOS transistor for AM ■ ■ ■ Bandpass filter: switched capacitor filter (SCF) IF counters Crystal oscillator output buffer ■ ◆ ■ Demodulation:LC72722/M/PM RDS data clock regeneration and demodulated data reliability information HCTR: 0.4 to 25 MHZ for FM IF counting I/O ports: general-purpose I/O: 2 pins ■ ◆ LCTR: 10 to 500 kHz for AM IF counting ◆ Input: 4 pins (maximum) Synchronization: Block synchronization detection with variable forward and backward 1.0 to 20 103 Hz for frequency ◆ Output: 3 pins (maximum) protection conditions measurement ■ Serial data I/O ■ Error correction: soft decision and hard decision error correction ■ Reference frequency ◆ Control and communication using the CCB format ■ Buffer RAM: 24 blocks (about 500 ms) of data and flag memory ◆ ■ One of 11 frequencies can be selected Operating ranges ■ Data I/O: CCB interface (power on reset) ◆ (crystal element: 10.25 or 10.35 MHz) Supply voltage: 4.5 to 5.5 V (VDD) ■ Packages:(LC72722):DIP24S(300mil) ◆ 1.3 ❋❋❋, 3.125, 5, 6.25, 9 , 10, 12.5, 25, 30 , and 50 kHz 7.5 to 9.5 V (AVDD) ❋ : These frequencies cannot be used when a 10.25 ◆ Operating temperature: -40 to +85°C (LC72722M):MFP24S(300mil) crystal element is used. ■ Package: SSOP30 (275 mil) (LC72722PM):MFP24(375mil) ■ Phase comparator ◆ Supports dead zone control ◆ Unlocked state detection circuit ◆ Deadlock clear circuit ❋ :CCB is SANYO's original bus format. ❋ :CCB is SANYO's original bus format. All bus addresses are managed by All bus addresses are managed by SANYO for this format. SANYO for this format. Block Diagram Block Diagram

XBUF

+5V +5V PHASE DETECTOR PDM1 XIN CHARGE PUMP Vdda PDS PDM2 XOUT VREF FLOUT CIN CLOCK + PLL PDS RECOVERY REFERENCE (57kHz) Vddd REFERENCE UNLOCK Vssa VOLTAGE - (1187.5Hz) DIVIDER DETECTOR TGI1 VREF FMIN TGI2 MPXIN 57kHz Vssd BPF SWALLOW COUNTER CHARGE PUMP ANTIALIASING (SCF) SMOOTHING DATA 1/16,1/17 4bits for FAST LOCK TGO FILTER FILTER DECODER RDS-ID AMIN PDF

12bits PROGRAMMABLE FAST LOCK UP DO DIVIDER CONTROL RAM ERROR CORRECTION SYNC CL AIN2 CCB SYNC/EC CONTROLLER DI (24 BLOCK DATA) (SOFT DECISION) SYR DATA SHIFT REGISTER CET2 HCTR/I-3 LATCH AOUT2 UNIVERSAL COUNTER CLK(4.332MHz) T1 MEMORY CONTROL SYNC SYNC TEST AVDD DETECT-1 DETECT-2 T3 to T7 LCTR/I-4 - AIN1 OSC/DIVIDER + XIN XOUT CCB AREF I/F AVSS POWER ON VDD RESET AOUT1 VSS

CE DI CL DO I/O-1I/O-2O-3

69 Car Audio 70 Car Audio

RDS Demodulator ICs Single-Chip RDS Signal-Processing System IC LC72723/M LC72720Y/YV Overview Overview The LC72723 and LC72723M are Radio Data System (RDS) demodulation and signal-processing ICs. The LC72720Y and LC72720YV are single-chip system ICs that implement the signal processing required by the These ICs integrate a bandpass filter, the demodulation circuit, and data buffer RAM on the same chip and allow European Broadcasting Union RDS (Radio Data System) standard and by the US NRSC (National Radio System the RDS data to be read out in slave mode operation with an externally provided clock input signal. Committee) RDBS (Radio Broadcast Data System) standard. These ICs include band-pass filter, demodulator, (Master mode operation, in which the data is output in synchronization with the internal RDS clock output, is also synchronization, and error correction circuits as well as data buffer RAM on chip and perform effective error supported.) correction using a soft-decision error correction technique. Functions Functions ■ Bandpass filter: switched capacitor filter (SCF) ■ Band-pass filter: Switched capacitor filter (SCF) ■ RDS demodulation: 57 kHz carrier regeneration, clock regeneration, biphase and differential decoding ■ Demodulatior: RDS data clock regeneration and demodulated data reliability information ■ Buffer RAM: 128 bits (about 100 ms) ■ Synchronization: Block synchronization detection (with variable backward and forward protection ■ Data I/O: Data readout in either master or slave mode conditions) ■ RDS ID detection: Supports ID reset ■ Error correction: Soft-decision/hard-decision error correction ■ Standby mode: The crystal oscillator is stopped ■ Buffer RAM: Adequate for 24 blocks of data (about 500 ms) and flag memory ■ Fully adjustment free ■ Data I/O: CCB interface (power on reset) ■ Packages:(LC72723) : DIP16(300mil) Features (LC72723M) : MFP16(225mil) ■ Error correction capability improved by soft-decision error correction ■ The load on the control microprocessor can be reduced by storing decoded data in the on-chip data buffer RAM ■ Two synchronization detection circuits provide continuous and stable detection of the synchronization timing ■ Data can be read out starting with the backward-protection block data after a synchronization reset ■ Fully adjustment free Block Diagram ■ Low voltage (supply voltage: 3.0 V min) type ■ Operating power-supply voltage: 3.0 to 3.6 V ■ Operating temperature: -40 to +85°C ■ Packages: (LC72720Y) : DIP24S(300mil)

(LC72720YV) : SSOP30(275mil) ❋ :CCB is SANYO's original bus format. All bus addresses are managed by SANYO for this format. Block Diagram +5V +5V Vdda CLOCK V + PLL RECOVERY REFREFERENCEFLOUT CIN - (57kHz) (1187.5Hz) +3.3 V +3.3 V Vssa VOLTAGE Vddd VREF Vdda VREF FLOUT CIN CLOCK + PLL MPXIN 57kHz RDDA RECOVERY Vssd REFERENCE (57kHz) Vddd BPF Vssa VOLTAGE - (1187.5Hz) ANTIALIASING SMOOTHING DATA (SCF) V FILTER FILTER DECODER REF RDCL MPXIN 57kHz Vssd BPF RAM ANTIALIASING (SCF) SMOOTHING DATA FILTER FILTER DECODER (128 bit) MODE RDS-ID

TEST RST DO RAM ERROR CORRECTION SYNC CL SYNC/EC CONTROLLER CLK(4.332MHz) RDS-ID/ CCB (24 BLOCK DATA) (SOFT DECISION) SYR RDS-ID DI TEST XIN XOUT READY DETECT CET2 OSC CLK(4.332MHz) T1 MEMORY CONTROL SYNC SYNC TEST DETECT-1 DETECT-2 T3 to T7 OSC/DIVIDER XIN XOUT

71 Car Audio 72 Car Audio

Package Dimensions

QFP(QIP) (Reference Drawing) (unit:mm) MFP(SOP) (Reference Drawing) (unit:mm) QFP80 (14 14) QIP44M (10 10) MFP8 (225mil) MFP16 (225mil)

5.0 17.2 13.2 14.0 10.0

1.0 10.0 0.8 85 60 16 61 41 6.4

4.4 9 6.4 4.4 10.0 13.2 40 14.0 17.2 0.63 0.63 44 1 14 (0.56) 1.27 0.35 0.15 (0.65) 80 0.15 1 1.27 0.35 0.15 8 0.8 0.35 0.2 (1.0) 1 0.65 0.25 21 (0.83) 20 (1.5) 1.7max (1.5) (2.7) 1.7max 3.0max 0.1 0.1 (2.5) 2.8max 0.1

QIP48E (14 14) QIP64E (14 0.1 14) MFP24 (375mil) MFP24S (300mil)

17.2 17.2 12.5 14.0 14.0 0.8 0.8

15.2 24 36 48 413 24 49 37 25 33 13 7.6

32 5.4 7.9

24 10.5 14.0 17.2 14.0 17.2 0.63 0.65 48 64 1 1 1.27 0.35 0.15 116 1.0 0.35 0.15 1 13 17 (0.62) 12 0.8 0.35 0.15 12 (0.75) 1.0 0.35 12 0.15 (1.0) (1.5) 2.35max 1.7max (1.5) (2.7) (2.15) 0.1 3.0max (2.7) 0.1 0.1 3.0max

QIP80E (14 20) QIP100E (140.1 20) MFP30SD (375mil) MFP36SDJ (375mil)

23.2 23.2 64 20.0 20.0 0.8 65 0.8 15.2 15.2 41 051 80 016 30 19 36 40 81 10.5 10.5 7.9 7.9 14.0 17.2 17.2 80 14.0 50

1 0.65 0.65 25 100 1 1 24 1.0 0.4 0.25 0.8 0.3 0.25 130 (0.6) (0.8) 0.15 0.8 0.35 0.65 0.3 31 0.15 15 18 (0.8) (0.58) 2.45max 2.45max (2.7) (2.25) (2.25) 3.0max 0.1 0.1 0.1 (2.7) 3.0max 0.1

73 Car Audio 74 Car Audio

Package Dimensions

(Reference Drawing) (unit:mm) (Reference Drawing) (unit:mm)

DIP16 (300mil) DIP24S (300mil) SIP13H SIP18H

21.0 36.8

(R1.7) (30.0) 19.0 HEAT SPREADER 4.5

413 24 3.0min 3.4

16 C0.7 25.6 ( 2.0) 2.4 6.4 7.62 10.0

9 (13.9) 7.62 (13.8) 6.4

1 15.0 max 15.4max (11.0) 8.0 11.2 (11.8) 0.9 0.95 0.25 1 12

1.09 0.25

1.0 6.0 2.25 1.2 8 (3.25) 1 3.9 max 0.8 min (3.0)

4.5 (1.4) 2.0 0.5 0.4 1.0min

3.3 1 18 3.4 3.65max 0.4

0.51min (0.8) 2.0 0.5 1.15 1.2 (0.61) 2.54 0.48 13 (0.71)0.51min 1.78 0.48

DIP30SDLF (400mil) DIP36S (400mil) SSOP16 (225mil) SSOP20 (225mil)

5.2 6.5 27.0 32.4

016 30 16 20 619 36 9 11 8.6 10.16 8.6 4.4 6.4 10.16 4.4 6.4

115 0.5 118 0.5 0.25 0.95 0.95 0.25 110

18 0.65 0.22 0.15 (3.25) 3.95 max (3.25) 3.95max 0.65 0.15 (0.33) (0.33) 3.0 3.0 0.22

0.48 1.5max (1.3) 0.48 1.78 1.5max 0.51min

0.51 min (1.1) (1.04) 1.78 (1.3) 0.1 0.1 DIP64S (600mil) SIP5H SSOP24 (275mil) SSOP30 (275mil)

9.5 7.8 9.75

3.2 2.7 24 (2.0) 57.2 13 30

(2.0) 16 (11.8) 5.6 7.6 14.25max 13.8 5.6 7.6 15.24

33 10.0 0.5

1 0.5 1

0.2 1.1 1.5 12 0.95 1

0.51min 0.65 0.15 0.65 0.22 0.15

(4.25) 32 (0.33) 5.1max 0.22 (0.33) 15 13.0

1 3.8 1.5max 1.78 0.5 5 (1.3) 0.51min 1.5max (0.75) 2.0 (1.3) (1.01) 0.6 0.5 1.2 0.1 0.1

75 Car Audio 76 Car Audio

Package Dimensions

(Reference Drawing) (unit:mm) (Reference Drawing) (unit:mm)

SQFP48 (7 7) SQFP64 (10 10) TQFP100 (14 14) TSSOP30 (275mil)

9.0 12.0 14.0

7.0 0.5 10.0 9.75 0.5 16.0 0.5

36 75 48 30 37 25 76 49 33 51 16 24

7.0 9.0 50 32 7.6 5.6 12.0 10.0

48 14.0 16.0 64 0.5

100 1 11213 116 (1.0) 17 0.5 0.18 0.15 0.65 0.22 0.15 0.5 0.18 0.15 125 (1.25) 0.5 0.2 0.125 (0.33) (0.75) 26 15 (1.0) 1.2max (1.5) (1.0) (1.5) 1.7max 1.7max 1.2max 0.08 0.1 0.1 0.1

SQFP100 (14 14) SQFP144 (20 20) HSOP28H (375mil) HSOP36R (375mil) 0.5

15.2 16.0 22.0 14.0 20.0 (6.2) 0.5 (6.2) 36 108 17.8 75 28 109 76

51 73 HEAT SPREADER 19 15 72

50 7.9 7.9 10.5 10.5 (4.9) (4.9) 20.0 22.0 16.0 14.0

0.65 1

100 144 1 0.3 (0.5) 0.8 2.0 0.3 0.25 0.65 0.8 0.25 18 136 125 0.145 (0.8) 2.0 14 0.5 0.2 26 0.145 0.5 0.2 37 (1.0) (1.25) (2.25) 2.45max (2.25) (1.4)

(1.4) 2.7 2.45max 1.6max 1.6max 0.1 0.1 2.7 0.1 0.1 TQFP64J (7 7) TQFP80J (12 12) HZIP25

14.0 9.0 12.0 7.0 0.5 (8.5) ( 29.2 2.5) 0.5 4.5 25.6 60 (22.8) 48 Notes on Package Types and Nomenclature 49 33 61 41 (5.0) (R1.7) The package names used in this document give a rough (14.4) 32 (12.3) classification of the package type. The formal names for 7.0 9.0 40 18.6 max 21.7 12.0 14.0 these packages are not shown. (11.0)

64 14.5 Refer to the Delivery Specifications for the specific product 80 for the formal name of the package used. 0.4 1 17 125 0.125 0.4 0.16 4.2 16 120 (1.0) 0.52 4.0 (0.5) 21 (2.6) 0.125 3.5 0.5 0.2

(1.25) 2.0 2.0 (1.0) (1.0) 1.2max 0.1 1.2max 0.1

77 Car Audio 78 Car Audio

MEMO

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products(including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co. , Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.

SANYO Semiconductor Company carries out its designing, manufacturing and sale support in accordance with the global standard of quality management system ISO9001 (version 2000). All products described in this catalog contain developed products or products that are diverted from general types. In accordance with standard of quality management system ISO/TS16949 for automotive industry, there is a case where all demanded articles couldnÅft be supported, so please confirm to the salesman of our company at every order.

Ordering number : EP93F

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This catalog provides information as of August, 2005. Specifications and information herein are subject to change without notice.

Printed in Japan / August 2005 0.5k PC Plan