Organic Memristors Based on Polymer Blends

PI: Michael Chabinyc Graduate Student: Andrew Jacobs University of California Santa Barbara Organic Memristive Devices

Goal: organic ferroelectric diode Develop spin-coatable, organic memristive R F F element with high retention & yield at the F F S S S S n H H n F H m nanoscale R

- - - Materials system:

Organic semiconductor:ferroelectric blends + + + h+ h+

Milestones: • Functional memristive diodes with sub-100nm polymer domain sizes by nanoimprint or nanoimprinted poly(3-hexylthiophene) spontaneous phase separation

• Improved retention time through physical understanding of operational mechanisms

• Development of CMOS compatible process e.g. electrodes 100 nm

Charge Carrier Mobility and Polymers

R DPP-TTs S S μ > 5 cm2/Vs S S n R Ordering ? R PBTTT S S n semicrystalline 2 R μ ~ 0.5 cm /Vs S S P3HT n R R semicrystalline F8T2 μ ~ 0.05 cm2/Vs n N liquid crystalline disordered films μ ~ 0.02 cm2/Vs increasing crystallinity in thin films triarylamine amorphous μ ~ 0.005 cm2/Vs Mobility values from TFTs Active Matrix Arrays and ICs

printed OTFT pixel gate line gate line C

TFT P TFT data line

Mobilities and reproducibility C adequate for displays, diodes, pixel ST electrode circuits pixel electrode data line

PARC

ISSCC 2011 PAPER CONTINUATIONS ISSCC 2011 / February 23, 2011 / 8:30 AM

8 bit microprocessor (4000 TFTs)

Figure 18.1.1: Architecture of the 8b organic microprocessor foil. The connec- tor comprises 30 pins: 18 input pins [opcode(8,0); in(7,0); clk], 9 output pins Figure 18.1.2: Hardware testbench measuring all individual instructions of the [out(7,0), overflow] and power, ground and backgate voltage. microprocessor foil at a clock frequency of 6Hz (VBack = 50V and VDD = 15V).

K. Myny, et. al ISSCC 322s,2011

Figure 18.1.7: (a) die picture of the 8bit microprocessor foil; (b) foil comprising several microprocessor circuits laminated on a 6-inch wafer carrier during processing; (c) instruction generator foil for the running averager.

Figure 18.1.4: Architecture of instruction foil used in the implementation of 18 Figure 18.1.3: Shmoo plots of the microprocessor foil as a function of the the running averager. The connector uses 14 pins: 2 input pins [reset; clk], 9 clock frequency and backgate voltage (left) or power voltage (right). output pins [opcode(8,0)] and power, ground and backgate voltage.

Figure 18.1.5: Measured output of the microprocessor foil connected to the running averager instruction foil. The switches at the input pins are manually Figure 18.1.6: (a) instruction table with corresponding opcodes. RR in the changed from 0 to 7 (00000111). The output reaches 7.0 (00001110), with one opcode represents the selected register RegSel (1,0). X is a don’t care. (b) additional bit of precision, after 3 program cycles. Program code for the running averager.

DIGEST OF TECHNICAL PAPERS • 323

• 2011 IEEE International Solid-State Circuits Conference 978-1-61284-302-5/11/$26.00 ©2011 IEEE Organic Diodes

Contacts tend to show vacuum level alignment - carrier type controlled by injection barrier

J-V characteristics are space-charge limited - most materials are nearly intrinsic

- Egap ranges ~1.5-4 eV for organics - Injection barrier changes with interface dipoles Voltage for Metal Filament-Based Polymer Memory J. Phys. Chem. B, Vol. 111, No. 27, 2007 7757

observed at -2 V as a result of the metal filament formation between two metal electrodes. The higher conductive state (set state) showed the typical metal characteristics confirmed by low- temperature experiment where the resistance linearly increased with the temperature from 160 to 300 K.13 The set state could be retained for several months and the application of 4 V switches back to the initial low conductive state (reset state) due to the cleavage of filament by joule heating. In this memory behavior, it was notable that high positive voltage application over 7 V was necessary for reproducible formation of the metal filament. The high positive voltage is believed to play important roles of ionizing the copper electrode and to inject the ions into polymer layer. Assisted by coordina- tion to the heteroatom (S) of the P3HT, copper ions are distributed uniformly throughout the polymer layer. Then, copper ions are metallized to form the filament by the injected electrons under negative voltage bias. This concept of memory behavior is schematically represented in Figure 2. Figure 1. Typical current-voltage curve of regiorandom P3HT device According to the concept mentioned above, the density and which shows the nonvolatile memory behavior. the distribution of copper ions throughout P3HT layer are important factors controlled by the positive electric field. For cell size is 0.25 mm2. The current voltage curve was measured this reason, the memory behavior was investigated at various in air with the sourcemeter (model: 2400, Keithley Inc.). positive voltage strengths. In voltage sweep mode with fre- Measurement in nitrogen atmosphere did not give any significant quency of 0.6 Hz, the maximum positive voltage was varied difference in memory phenomenon. from 5 to 12 V with negative voltage set to -3V.Theswitching To obtain the switching probability of the device with various probability was defined as the probability of occurrence of environmental conditions, continuous voltage sweep was applied switching to the set state during a negative voltage sweep. For to the device with the programmable power supply of Yokogawa accuracy, the probability was determined from 60 cycles instrument (model 7631), and the current was measured with obtained after waiting for 180 s under the continuous voltage digital oscilloscope (model TDS3502B). The copper top elec- sweep. For 50 nm thick devices, the switching probability was trode was connected to signal line, and the bottom electrode near zero when the positive voltage below 7 V was applied. Classeswas used as ground. Cu density withinof P3HT Organic layer was However, sudden increase Memory up to unity was observed over 8 V Devices investigated using time-of-flight secondary ions mass spectro- as shown in Figure 3a. As the thickness of polymer layer in the scopy (TOF-SIMS, model ION-TOF IV). Cu depth profiles were devices increased, the threshold voltage also increased from 8 acquired in the dual beam interlaced mode using 500 eV Cs to 11 V. Interestingly, when represented in terms of electric primary ion and 25 keV Bi analysis gun. field, Figure 3b indicates that all devices with different thickness had identical threshold electric field of about 170 MV/m. It was 3. Results and Discussion 346 Chem. Mater.,surprising thatVol. the 23, switching No. probability 3, 2011 increased sharply Heremans et al. The regiorandom P3HT was chosen as an active material around the threshold electric field. TFT-based because the deviceElectrochemical showed highly reproducible metal filament To study the density of copper ions within polymer layer formation based memory behavior in ourcrossbar previous work.13 network.before and To after reduce the positive sneak voltage application currents, over the it is known Typical switching behavior of the P3HT device is represented threshold value, we used the TOF-SIMS analysis to measure in Figure(Filamentary 1. A sudden decrease in the deviceConduction)that resistance a selecting was the depth device, profile ofsuch copper as ions. a To diode, avoid thehas broadening tobe of placed in series with the conductive switching device. Therefore, it can be highly beneficial that the conductive switching device would inherently possess rectifying characteristics, as for example possible with diodes containing a blend of an organic semiconductor and a ferro-electric polymer,45 which will be discussed in section 4. It should also be mentioned that addressing unipolar switching devices is simpler than addressing bipolar memory devices, because for the latter, the switching of the memory devices re- quires polarity reversal of the addressing circuitry. Figure 2. Schematic concept for the formation of metal filament within polymer layer: (a) device structure, (b) ionization and drift processes of copper caused by positive voltage,W.-J. (c) metal Jo, filament et. al formation2.7.. J. Phys. by Summary theChem. reduction 111, of copper and7756 ions, Outlook. and(2007) (d) the breakdown Several of copper filament mechanisms by joule may heating. Practically, the regiorandom P3HT is not aligned and has a random coil conformation in the organic layer. cause the electrical conductivity of molecules to switch. However, in real devices comprising a thin film of such molecules, the switching is mostly due to the formation of Figure 7. SchematicP. Heremans configuration, et. al. Chem. and Mater. operational 23 341 mechanism(2011) of an conductive filaments in an interfacial oxide. organic memory p-type transistor device. Therefore, only in a few cases could a role in the switching be ascribed to the organic semiconductor. This Several types of gate dielectrics enable reversible trapping of Injection Barrieris the Modulation case in solid-state redox cells as well as in semi- charges upon application of a gate field, for instance polymer conductor ferroelectric diodes. Nanotechnology electrets,20 (2009) 025201 dielectrics with embedded metallic or semiconduct- T-W Kim et al Nanotechnology 20 (2009) 025201 T-W Kim et al ing nanoparticles(a) (NPs) or organic conjugated(b) molecules, and (a) 3. Charge-Storage(b) in Transistor Gate Dielectric ferroelectric gate insulators with permanent and/or switch- able electrical dipoles.8 In this section, we introduce the basic Organic nonvolatile memory devices based on organic properties, operational mechanisms, and recent progress in field-effect transistors (OFETs) are especially attractive, memory devices based on OFETs with gate insulators that because these devices can be read without destruction have charge-storage capacity.

of their memory state (“non-destructive read-out”) and Current (A) Charge trapping in the gate dielectric causes the thresh- have a manufacturing advantage because of their archi- 48 old voltage (V ) of the transistor to shift. TheCumulative Probability (%) magni- tectural compatibility with integrated circuits composed Th tude of the shift in V is proportional to the stored charge (c)of OFETs. Moreover, (d) integration of transistor devices Th T.W. Kim, et. al. Nanotech. 20 025201 (2009)density per unit area Δn: solves the sneak current problem, which most frequentlyFigure 2. (a) Semilogscale I–V characteristics of a polymer memory device with a 500 500 nm2 via-hole. (b) A cumulative probability 46 occurs in a passive crossbar array of memory elements.data set for polymer memory devices with a 500 500 nm2 via-hole (28 devices), showing× a good device-to-device switching uniformity. The × eΔn 2 Transistors have three electrodes, the source, theinset drain, figure shows the histogram of the OFF-to-ONΔVTh transition for polymer memory devices1 with a 500 500 nm via-hole. ¼ C ð Þ × and the gate. Organic transistors utilize π-conjugated or- i

ganic molecules as semiconductor channel between source where e is the elementary charge and Ci is the capacitance of and drain. The semiconductor channel is separated fromthen the was spinthe coated gate on dielectric the substrate. per unit The area. typical This spin- shift is(without visualized a via-hole by structure; figure 4(S)(b), see supplementary gate by a thin gate dielectric layer. Charge carriers cancoating be conditionplotting was the 2000 transfer rpm for curve 30 of s. the Post transistor baking -informationthis is the drain (available at stacks.iop.org/Nano/20/025201)) Figure 1. (a) Chemical structure of WPF-oxy-F polyfluorene derivative. (b) Schematic of a polymer memorywas device performed in a via-hole at structure. 150 ◦Cfor20minonahotplateina showed excellent electrical bistability with a high ON/OFF (c) AFM image of a via-hole of area 200accumulated200 nm2.(d)SEMimageofatiltviewofavia-holepolymermemorydevice. at or repelled from the interface between semi- current (Id)asafunctionofgatevoltage(Vg)atconstant 4 nitrogen-filled glove box. The typical thickness of the WPF- ratio (e.g., ION/IOFF 10 at 0.3 V) [15, 16]. × ∼ conductor and gate dielectric by the gate bias (Vg).oxy-F When film indrain the via-hole voltage was (Vd) found- for to the be fresh70 device nm. and To forThe the basic transistor operation of our memory device was well accumulated, the charge carriers form a conductive channelmake the topwith electrodes charged on gate the polymer dielectric. layer The∼ in gate the via-voltageexplained shift between by the space–charge-limited current (SCLC) with resistive RAM (MRAM), phase-change memory (PRAM) and lithography technique. We present the high-performance between source and drain, and current (Id)canflowuponhole structure,these a shadow curves mask is the was memory aligned window. and a 100 As nm shownfilamentary in Figure conduction 7, from the I–V characteristics and resistive change RAM (RRAM). Generally, these memories resistive switching characteristics of polymer non-volatile current images [16]. Although the device structure used application of a drain bias. The gate thus controls the OFETthick Ag layerthere was are deposited two different using a current thermal states evaporator for each Vg within the are based on inorganic materials which have robustness memory devices in the sub-micron scale via-hole structure and6 in this work is different from that in previous work [16], as a switch, and the threshold voltage (V )isdefinedastheunder a pressurememory of 10 window,− Torr. namely The current–voltage a high I and (aI low– I ,representing against organic solvent. Therefore, downscaling of such demonstrate scalabilityTh towards potential applications in high- d similard resistive switching behaviour was observed within voltage to be applied at the gate to start forming aV con-)measurementswerecarriedoutusingasemiconductorthe “1” and “0” of the memory, respectively. Here, one should memory devices was successfully achieved by using the density polymer memory devices.parameter analyzer (Agilent Technology 4155C). The write– the voltage range 3–5 V. When a positive bias from 0 to − conventional CMOS process. Onductive the other channel. hand, polymer Beyond the threshold voltage, the surfaceread–erase–readdistinguish cycles were the measured memory with behavi a two-channelor from bias-stress5Visappliedtothetopelectrode,thetrapsitesinthe effects in materials are easily dissolved by organicdensity solvents; of carriers thus is the proportional to the difference betweenpulse generatorOFETs (Agilent by defect Technology states 81104A) or impurit andies ain two- semiconductorpolymer layer and/or begin being filled by electrons and more traps conventional lithography method has not been appropriate to 2. Experimental details 49 Vg and VTh.Transistorscanbeintegratedintologicgateschannel oscilloscopegate dielectrics, (Tektronix which TDS 3054B). also leads to VTh shifts. becomeAlthough occupied this as the current flow increases. The trap- pattern polymer materials. Recently, Kwan et al reported a and circuits.47 The type ofPolymerπ-conjugated memory organicdevices in molecules a via-hole structureexternal were fabri-effects would enhance to be openedfilling memory process win- creates high-current paths which in turn lead photo cross-linkable copolymer that can be directly patterned to electromigration and filamentary conduction paths [16]. cated on a heavily doped p-type (100) silicon (pdow,+ Si) it substrate cannot be controllable to use as a practical memory as using the conventional photolithographyutilized process in the [22 channel]. They of the OFETs and the sign of the3. gate Results and discussion On the other hand, a negative bias on the top electrode (0.001–0.015 ! cm). After the typical ultrasonic cleaning successfully demonstrated the fabricationpotential of determine 4 4 µm whether2 the primary type of charge well as not permanent. The memory is nonvolatileretracts if filamentary the VTh conduction and leaves the trap sites empty, × process with acetone, methanol,Aschematicofthepolymermemorydeviceisshownin and deionized (DI) water, the memory cells to show the potentialcarriers of high-density are electrons memory (giving rise to so-called “n-type tran- shift is (quasi) permanent as long as the stateshowing of the an device abrupt decrease of current [16]. In addition, silicon substrate was treated via a diluted HF-last process to devices [22]. However, this fabrication process is appropriate figure 1(b), illustratingis not intentionally the Ag/WPF-oxy-F overwritte/p+ Sin. layer The in memory the the transistor distributions is of current values for the ON state (low- sistors”) or holes (“p-typeremove transistors”). the native oxide layer. To make via-hole structures, only for a specific polymer material that is robust against via-hole. The active area of the memory device can be easily resistance state) and OFF state (high-resistance state) in sub- 3.1. Operation of Charge-Storage100 nm thick OFET silicon Memory oxide film Devices. was depositedrewritable on the silicon if the programmed state can be reversibly recov- specific organic solvents. In addition, it would be difficult defined by the area of bottom electrode (p+ Si) that is exposed micron scale via-hole devices were found to be very narrow. Accumulated charges in the∼substrate transistor using channel plasma-enhanced are fundamen- chemical vapourered deposition to its original state by application of an appropriate to minimize the feature size to sub-micron scale using through the via-hole. Because alltheareaexceptthevia-hole As shown in figure 2(b), the current values of all the 28 tally “volatile”, i.e., only present(PECVD). as long Then, as an an e-beam attracting lithography gate technique(re)programming was used bias. Programming is preferably done by conventional photolithography techniques. Although various is protected by a SiO2 layer, the via-hole is the only way for measured devices (500 500 nm2) were distributed within to define the active area of the polymer memory devices efforts have been made to fabricatevoltage polymer in memory excess devices of VTh is applied. Such a transistor cancurrent have to flowshifting (figureV S4(a),Th such see that supplementary two distinct information memory statesan order are createdof magnitude,× which indicates excellent device-to- in the via-hole structures which have five different areas: on the sub-micron size [20–22], thememory downscaling properties of polymer if either reversible charge trapping(available or at atstacks.iop.org/Nano/20/025201 zero Vg,ideallythetwostatescorrespondtoapositiveand)). Figure 1(c) 2 2 2 2 device switching uniformity. This excellent uniformity may memory devices is still insufficientdetrapping for high-density can polymerbe made to40 occur40 µ inm the,8 gate.5 dielectric8.5 µm ,4shows layer..5 4 the.5 µ AFMmanegative,1 image1 µ ofmV a, via-hole.Indeed,thatallowstoreadoutthememory device with an active be due to the decrease of defects at the sub-micron scale active × 2 × ×2 × 2 Th memory applications. 500 500 nm ,and200 200area nm of.Toexposethebottom 200 200 nm .Figure1(d) is the scanning electron × × × area. The transition from OFF to ON in most of sub-micron To our knowledge, there have been few reports on the electrode through a via-hole, themicroscopy silicon oxide (SEM) film was image etched of a tilt view of a polymer memory scale polymer memory devices occurred in the range between characterization of polymer materials in a sub-micron scale out using 6:1 buffered oxide etchantdevice. (BOE). Due to theFinally, inclined to fill wall shape made by the wet etching 3.2 and 1.8 V (inset of figure 2(b)). Note that some reports device structure or on whether the memory performance can the via-hole with the polymer memoryprocess, materials the via-hole using can a spin- be completely filled with WPF-oxy-F have explained that the bistability of the organic non-volatile be sustained when the device size is reduced to sub-micron coating method, we used the isotropicwithout property any pinholes of a wet or etching bubbles (figure S3, see supplementary memory device is originated from an interface oxide layer process. As a result of wet etching, the wall of the via- scale. In particular, the characterization of memory properties information (available at stacks.iop.org/Nano/20/025201)). It such as Al2O3 [24–26]. In this work, in order to minimize of sub-micron scale devices will enhance understanding of hole is inclined, so that the polymerwas also material observed can that easily the Ag be (top electrode) did not penetrate or eliminate the effect of native oxide on the p+ Si and Ag the mechanisms of memory operation. In this point of view, spin coated and filled in the via-holeinto the without WPF-oxy-F any pores layer. or The SEM image in figure 1(d) electrode, we carefully removed native oxide and spin coated scaling is one of the important issues for high-density polymer defects (figures S3, see supplementaryclearly informationshows that the (available three layers of Ag/WPF-oxy-F/p+ Si in the WPF-oxy-F in a glove box system filled with N2.In non-volatile memory device applications; thus it is essential at stacks.iop.org/Nano/20/025201the)). via-hole As a polymer are well memory separated (figure S3, see supplementary addition, the Ag top electrode was deposited on the WPF-oxy- to understand the scaling effects of polymer memory devices layer, poly[(9,9-bis((6#-(N,N,Ninformation-trimethylammonium)hexyl)- (available at stacks.iop.org/Nano/20/025201)). Ffilmwithassmalladelayaspossible. from micron scale to sub-micron scale. 2,7-fluorene)-alt-(9,9-bis (2-(2-methoxyethoxy)ethyl)-Figure 2(a) shows a representative I–V characteristic of The Ag/WPF-oxy-F/p+ Si devices in the via-hole In this study, we suggest a via-hole structure as a fluorene)] dibromide (denoted asasingle-layerAg/WPF-oxy-F WPF-oxy-F), schematically /p+ Si memory device in the structure also showed an excellent scalability that makes them scalable test-bed for switching characterization of polymer shown in figure 1(a), was synthesizedvia-hole by a ofpalladium-catalyzed area 500 500 nm2.Previousreportsonthe suitable for high-density polymer memory device applications. materials. Polymer memory devices varying from micron Suzuki coupling reaction methodresistive [23]. WPF-oxy-F switching of was a× WPF-oxy-F first based planar-type device As shown in figure 3(a), the current value of the ON state 1 scale to sub-micron scale were produced using an e-beam dissolved in methanol at a concentration of 5 mg ml− and 3 2 Organic Ferroelectric Memristors

Need: Passive, two-terminal circuit element with ability to switch resistive states reversibly Our approach: use a dipole to control barriers to charge injection in a diode

Ferroelectric polymer P(VDF-TrFE) blended with semiconducting polymer LUMO LUMO P3HT P3HT

+ h injection + unfavorable h injection HOMO favorable HOMO Al Al Ag + - + - change Ag - + + - poling of - + P(VDF- ferroelectric TrFE) P(VDF- TrFE) Asadi, K.; et. al. Nat Mater 2008, 7, 547-550 Polymer Blend Memory Devices

100s Micron-scale devices demonstrated in literature

Device poled at ±20 V Organic ferroelectric opto-electronic memories REVIEW Thickness ~250 nm

Current limited by space charge (a) (b) (c)

2 image charge 9εε0V J = 3 8L 140nm to 250nm

Asadi,Fig. K.; 5 Operationet. al. Nat principle Mater of bistable 2008, ferroelectric 7, 547-550 diode. (a) Schematic mechanism of injection barrier lowering and current injection. The ferroelectric, semiconductor and electrodes are indicated by blue, red, and gray planes, respectively. The top electrode at y = 120 nm is the injecting contact characterized by an injection barrier of 0.7 eV. The collecting bottom electrode at y = 0 nm is grounded. Blue and yellow arrows indicate electric fields and current flow, respectively. +/– indicate polarization charge. (b) Current density and (c) hole density (10log-scale) of a ferroelectric diode in the on-state. Figure reproduced from25.

much more complicated than those required to perform the simple on deliberately using a contact that poorly injects charges into the resistive read out of a state with either high or low resistance. semiconductor. Fig. 5 elucidates the lowering of the injection barrier by the Ferroelectric diodes ferroelectric polarization and the resulting current injection in the Diodes alleviate the destructive read-out problem of ferroelectric on-state. The top contact is the injecting contact, characterized by a capacitors. By switching the direction of the polarization the resistance certain hole injection barrier. The current collecting bottom contact is of the diode is switched between a high and low resistive state. The first grounded. The electrical transport is calculated by numerically solving diodes were produced by blending the organic semiconductor regio- the coupled drift-diffusion, Poisson, and current continuity equations irregular poly-3-hexylthiophene (rir-P3HT) with P(VDF-TrFE) 22. The on a rectangular grid. The 3D phase separated morphology is therefore chemical structure of rir-P3HT is presented in Fig. 1b. The atomic force mapped onto a simplified 2D structure of alternating ferroelectric and microscopy (AFM) and scanning transmission x-ray microscopy (STXM) semiconducting slabs, implemented by periodic boundary conditions, as images of Fig. 4 show that the blend phase separates into amorphous shown in Fig. 5. The electric current only runs through the semiconducting rir-P3HT domains embedded in a crystalline P(VDF-TrFE) matrix 23,24. phase since the ferroelectric P(VDF-TrFE) is an insulator. The schematic The microstructure is independent of the type of substrate and does in Fig. 5a shows the polarization charges in the ferroelectric phase. The not change upon annealing. The rir-P3HT domains are continuous electric field lines (blue arrows) run from positive to negative polarization. throughout the film and protrude from the surface of the film with a Importantly, near the top contact, field lines also run from the positive hemispherical shape. The lateral size of the domains is mono-disperse image charges in the electrode to the negative polarization charges in and increases linearly with rir-P3HT content. Concomitantly, the the ferroelectric. Similar field lines run near the bottom contact. At the number of domains decreases, indicating that the morphology coarsens injecting top contact, it is this stray field of the positive image charges with increasing rir-P3HT content. These observations exclude standard and the negative polarization charges, shown by the curved arrows, that nucleation and growth solidification mechanisms, and point to phase causes a strong lowering of the hole injection barrier by the image force separation by spinodal decomposition22. effec t25. As a result, the contact becomes Ohmic and charges can be Formation of this phase separated microstructure is crucial for the injected into the semiconductor phase. Since the lateral x-component operation of the diodes. The ferroelectric phase provides polarization and of the stray field is directed towards the ferroelectric phase, the injected bistability. The current transport takes place through the semiconductor holes (Fig. 5c) accumulate at the phase boundary and consequently the phase that is modulated by the polarization field of the P(VDF-TrFE) phase. current, shown by the white arrows, will be confined into a narrow region To fabricate bistable diodes, the phase separated blend is sandwiched at the phase boundary (Fig. 5b). This spatial confinement causes space between two electrodes. The current can only flow through the charge effects to limit the diode current in the on-state. In the lower half semiconductor phase. To inject the charges efficiently, an Ohmic contact of the semiconductor phase the lateral x-component of the stray field is required; the Fermi-level of the contact aligns with the valence or becomes smaller and the current spreads over the whole semiconductor conduction band of the semiconductor. When the Fermi-level is not phase before it reaches the collecting contact at y = 025. aligned, the injection of charge carriers is limited, and, therefore, the The result is that at the injecting contact of the diode, the injection current in the device is low. The operation principle of the diode is based can be switched between an on-state and an off-state, depending on

DECEMBER 2011 | VOLUME 14 | NUMBER 12 595

MT1412p592-599.indd 595 08/12/2011 13:09:37 Ferroelectricity in PVDF-TrFE

1-x x

VDF TrFE

Electronegative nature of fluorine creates strong dipole when side-groups are properly aligned

Applying strong electric field can cause physical reorientation of backbone to flip dipole Coercive field ~ 50MV/m

Lovinger et. al., Science, 220, 1115 Process Flow for Device Fabrication 2µm

1) Dissolve P3HT and 70/30 PVDF-TrFE in common solvent 10nm THF in 1:10 ratio

5nm 2) Spin coat onto ITO-coated glass substrate at 1200RPM 0nm

3) Anneal 4hr at 135°C to allow -5nm for PVDF recrystallization into ferroelectric phase -10nm

4) Use thermal evaporation to deposit top contact

AFM studies show formation of roughly circular, raised domains in P3HT domains matrix, similar to Asadi et. al. Replication of Literature Results

Pole device by applying voltage to bottom contact: “positively poled” for positive voltage and “negatively poled” for negative voltage

Poling voltage ±20V for 10 sec, reversible switching achieved

Al J P3HT:PVDF-TrFE J Blend 250nm (1:10 ratio) +- -+ - +- ITO +- -+ - +-

V Issues

R F F F F S S S S H H n F H m n R Scaling to nanoscale cross-bar arrays - 100s micron devices currently - - -

+ + + CMOS compatibility h+ h+ - electrodes typically Ag, Au

Retention Times Blended films of semiconductor:ferroelectric - limits unknown 193308-2 AsadiSEMet al. of PFO:P(VDF-TrFE) Softcommunications X-ray Transmission MicroscopyAppl. Phys. Lett. 97,193308͑2010͒

P(VDF-towardTrFE) the cathode.P3HT Effectively, both injection barriers then increase and no current is flowing irrespective of the bias.12 In the on-state the ferroelectric polarization points toward the roughness of the P(VDF-TrFE) phase is the anode and both injection barriers effectively can be 12 seen with annealing, consistent with the disregarded. In the forward direction holes are injected from gold and electrons from LiF/Al. In the reverse direction crystallization of this phase, confirmed by there is no current flowing, holes and cannot be injected form [13] LiF/Al and electrons cannot be injected form gold. The final X-ray diffraction measurements. Scanning result is a bistable rectifying diode. electron microscopy images taken of the top The500 smallest nm array comprises two word lines and two bit lines, yielding 4 bits with 16 different logic states. First, all of annealed films also show smooth, circular pixels are put in the off-state. To program each individual bit, a programming voltage pulse exceeding the coercive field of regions surrounded by a rough, needle-like P͑VDF-TrFE͒ is required, i.e., +/−20 V. In order to prevent phase[13] consistent with the identification of K. Asadi, et. al. Adv. Mater (2011) any effect of the programming pulse on the logic state of the neighboring bits, we applied half the programming the circular features observed in AFM as the voltage ͑+/−10 V͒ on the word line and half of the voltage ͑−/+10 V͒ on the bit-line. All other lines were grounded. In top of the bulk, columnar P3HT-rich phases. this way the neighboring bits experience a field below the coercive field and their logic state remains unaffected. After Furthermore, the areal density of the programming the logic state of each individual bit was read circular features observed with AFM is out nondestructively using a similar reading scheme. Half the read voltage ͑+2.5 V͒ was applied on the word line and half similar to the density of P3HT-rich phases the voltage was applied on the bit line ͑Ϫ2.5 V͒. The read- observed with STXM, demonstrating that out voltage therefore amounts to +5 volts. All other lines were grounded. The current was measured in time. As the the bulk, columnar phases observed by measurement time elapsed, different word and bit lines were STXM in general continue through to the FIG. 2. ͑Color online͒͑a͒ SEM micrograph of the phase separated morphol- selected to probe the resistance of all 4 bits. The measured ogy and ͑b͒ J-V characteristics of a bistable rectifying diode based on a logic table is presented in Fig. 3. We distinguish three differ- top surface of the film. phase separated 10/90 wt % blend of a ferroelectric polymer, P͑VDF-TrFE͒ ent current levels. When none of the bits are addressed the and a semiconducting polymer, PFO. SEM was taken at a tilt angel of 52°. current level is dominated by noise and amounts to 10−10 A. The diode is fabricated with a gold bottom electrode and a LiF/Al top While the length scale of phase separa- 2 The current level of a bit in the Off-state, state “0,” is in the electrode. Device area amounted to 1 mm . The diode is poled with pulses −9 of +/−20 V, exceeding the coercive field. The voltage axis is corrected for order of 10 A and corresponds to the off current of the tion does not change significantly with the built-in voltage of about 1.5 V. The inset in part ͑b͒ shows the device diode in reverse bias and to the parasitic leakage current of layout. the array. The On-state current, state “1,” is in the order of annealing, there are some subtle differences 10−5 A, which corresponds to the space-charge limited cur- in the shape of the rir-P3HT domains before 300–400 nm were spin coated and annealed for 2 h at rent as measured for the discrete diode. The variation in the 140 °C in vacuum to enhance the crystallinity of the P͑VDF- on-state current between the different bits is presumably due and after annealing. In particular, in the TrFE͒ phase.8 LiF ͑1 nm͒ capped with 70 nm Al was used as to thickness variation in the film. The logic table of Fig. 3 287.2 eV annealed 10 wt% P3HT image, a top electrode. The dimension of the active area of one bit shows that the 16 different logic states of the 2ϫ2, or 4-bit, was either 1ϫ1 mm2 or 3ϫ3 mm2. All the device prepa- array can easily be distinguished. The striking feature of the number of larger domains show additional ration steps were conducted in nitrogen filled glove boxes. logic table is the identification of the 1110, 1101, 1011, and SEM was used to probe the morphology of the blend. The 0111 states. These states are most prone to cross talk but the structure in the form of brighter, secondary normal mode ͑detection of secondary electrons͒ with accel- high resistance “0” bit can still unambiguously be assigned. eration voltage of 2.0 kV was used. Ferroelectric character- To further demonstrate the feasibility of the ferroelectric phases with smaller diameter (example izations of the capacitor and discrete diode were done by diodes we also fabricated 9-bit memory arrays in a 4F2 cell highlighted). A similar feature is observed Sawyer–Tower technique or pulse technique.9 The ferroelec- configuration, where F is the width of the electrode lines and tric polarization and coercive field of neat P͑VDF-TrFE͒ ca- spacing between them, here about 3 mm. A picture of the in the AFM image of this film (also high- pacitors amounted to 0.06 C/m2 and 50 MV/m, respec- array is presented in Fig. 4͑a͒. The logic table comprises 512 tively, in good agreement with literature data.8,9 The remnant Figuredifferent 2. states.X-ray The absorption equivalent circuit images of the (firstmost challeng- 3 columns) and AFM images (last column) of as-spun lighted), consisting of a rough, raised polarization of the blends, measured with a pulse technique, anding annealed state, the state P3HT:P(VDF-TrFE) that is the most sensitive films to cross with talk, weight is ratios of 10 and 1 wt% P3HT. All images are circular feature with two smaller smooth amounted to about 90% of that of neat P VDF-TrFE capaci- presented in Fig. 4͑b͒. A single high resistive bit “0” is in the ͑ ͒ 2 tors, i.e., ϳ0.05 C/m2. All the current-voltage measure- 5 center5 mm of theand array share and surrounded a common by eight scale low resistive bar. “1” features at the edge. Furthermore, compar- ments were conducted in vacuum, 1ϫ10−6 mbar with a Kei- Âbits. Figure 4͑c͒ shows the current passing through each in- thley 4200 semiconductor characterization system. Bias was dividual bit as the measurement time elapsed. The most chal- ison of the 287.2 and 295.5 eV images of the appropriately applied on both bottom and the top electrodes. lenging state, 111101111, can be clearly read out. annealed 10 wt% film shows a less-clear The current density as a function of bias of a discrete Key device parameters for memory application are blend diode is presented in Fig. 2͑b͒. The diode is poled at intensityswitching time, transmitted cycle endurance, through and data retention the film of the and I0 is the incident correspondence than observed for the unannealed 10 wt% either +/−20 V exceeding the coercive field. Both LiF and individual pixels. The switching time of the array is domi- Au form an injection limited contact on PFO.10,11 The barrier X-raynated by intensity. the polarization While reversal the of the AFM ferroelectric. images The provide hints of an 287.2 and 295.5 eV images (also observed in other images taken for electron and hole injection is 0.8 eV and 1.3 eV, respec- switching exponentially decreases with electric field. Al- tively. In the off-state the ferroelectric polarization points underlyingthough in our phase-separatedarray the switching time is structure, in the order of the X-ray microscopy of 10 wt% films and also in films of 5 and 2 wt% rir-P3HT; see images clearly show a columnar, phase-separated morphology Supporting Information, Figure S1). These observations of P3HT-rich columns of lateral dimension 100 to 500 nm suggest the lateral overgrowth of some of the P3HT phases surrounded by an interconnected P(VDF-TrFE)-rich phase. by the needle-like P(VDF-TrFE) phase at the surface with For the unannealed 10 wt% P3HT film there is a clear annealing. Connectivity to the underlying P3HT phase, correspondence between the 287.2 eV image and the however, is maintained through the smaller sub-phases that 295.5 eV image, with the latter representing a negative image penetrate the surface. Of course, one has to be careful of of the former. The 320 eV image at which there is little chemical reading too much vertical information from the STXM images. contrast corresponds to an effective carbon density image, and In explaining the subtle changes in bulk morphology with shows less pronounced features than the 287.2 eV image, annealing one would also need to consider the presence of a demonstrating the utility of X-ray spectromicroscopy to reveal wetting layer at the substrate/film interface that has been internal, bulk chemical contrast. The 1 wt% P3HT film also observed in other laterally phase-separated polymer blend shows a clear, phase-separated structure with columnar nature systems.[14] However, these results do suggest an additional with feature size of 100 nm (see also cross-sectional traces in vertical structure in these films that should be investigated  the Supporting Information, Figure S2). A cursory comparison further with surface-sensitive techniques. of the as-spun and annealed films shows that the length-scale of The local blend composition has also been investigated lateral phase separation does not change significantly with quantitatively by acquiring full NEXAFS spectra at selected annealing, however, there do appear to be some subtle changes regions of an unannealed 10 wt% rir-P3HT film. Due to the in morphology that will be discussed below. problem of radiation damage as discussed above, spectra were Examining the AFM images, raised or depressed circular acquired of four separate regions with a slightly defocused features are seen (particularly in the 10 wt% rir-P3HT films) beam and low dwell times in order to minimize radiation that correspond roughly to the size of the rir-P3HT-rich phase damage that were then averaged to acquire spectra with observed with X-ray microscopy (see also phase images in the acceptable statistics. Figure 3 displays the NEXAFS spectra Supporting Information, Figure S3). A pronounced increase in taken of rir-P3HT-rich and P(VDF-TrFE)-rich regions taken in

510 www.small-journal.com ß 2010 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim small 2010, 6, No. 4, 508–512 Why is Length Scale of Phase Separation So Large?

Flory-Huggins theory for polymer P3HT and P(VDF-TrFE) miscibility

ΔG = RT n lnφ + n lnφ + nφ χ 1-x mix [ 1 1 2 2 1 2 12 ] x entropic term enthalpic term

mixing not favorable χ12 > 0 immiscible χ12 > 0 χ12 < 0 favorable mixing

PMMA and PVDF P3HT and PVDF-TrFe are incompatible leading to spinodal decomposition in the thin film

χ12 < 0 miscible Polymer Surfactants to Control Domain Size

Addition of a A-B block co-polymer Schematic of domain ordering reduces surface tension and decreases domain size no surfactant

ferroelectric insulating semiconducting polymer polymer

surfactant with surfactant

Design Criteria: 1) surfactant has a similar interaction energy e.g. PMMA & PVDF are compatible 2) block lengths depend on system at hand Shrinking Domain Size in Polymer Blends

Similar side-group to PMMA on PEPT should increase miscibility compared to P3HT

More favorable χ 12 should result in finer dispersion of domains

Poly[3-(ethyl-5-pentanoate)thiophene-2,5-diyl] (PEPT)

Molecular packing of semiconducting polymers

PMMA Shrinking Domain Size in Polymer Blends

P3HT:PVDF-TrFE (1:10) PEPT:PVDF-TrFE (1:10) 2µm 2µm 8nm 10nm 4nm 5nm

0nm 0nm

-5nm -4nm -10nm -8nm

AFM Height Images Nanoscale Phase Separated Blends

PEPT:PVDF-TrFE (1:10) Phase-Resolved AFM allows 250nm thick film material discrimination: 500nm Softer materials result in different energetic losses as AFM tip hits surface, 250nm changing phase angle of cantilever oscillation

• P3HT: lighter domains • PVDF: darker, more prevalent domains

• 50-150nm domains

PVDF:PEPT Blend Diodes

• ±20V applied to bottom contact to pole device, bottom contact injects current

• Rectifying diode with different permitted current direction based upon poling

• Comparable current density to large P3HT domain devices at same volume fraction

Ag J PEPT:PVDF Blend 250nm (1:10 ratio) +- -+ - +- ITO +- -+ - +-

V Fabricating Thinner Diodes

Increasing spin speed during coating allows for thinner devices, lower write voltages, and increased current

By spin coating at 1800RPM instead of 1200RPM: • Write voltage decreased to ±16V from ±20V • “On” current density increased from 1.5 A m-2 to 1.8 A m-2 at 3V

Ag J PEPT:PVDF Blend 180nm (1:10 ratio) +- -+ - +- ITO +- -+ - +-

V Read-Write Cycling

Ag PEPT:PVDF Blend 250nm (1:10 ratio) ITO

V

• Repeatable read-out and switching

• Consistent values for On/Off states

Write current

“On” current

“Off” current Next Steps With Ferroelectric Blends

• Continue to reduce device thickness to increase current and lower Vwrite

• Details of transient behavior on short and long time scales

• Optimize contacts for larger on/off ratio current ratio, increased current densities, and increased yield of devices

• Understand limits of phase separation length scale

500nm

PEPT:PVDF-TrFE (1:10) 250nm thick film Nanoimprint Fabrication

Nanoimprint ferroelectric or semiconducting polymer

P(VDF-TrFe)

Backfill with other component by spin coating & infiltration

P3HT, etc

Advantages: - Imprinting P(VDF-TrFe) may reduce coercive field due to alignment - domain size can be controlled to understand mechanisms of switching - materials may be crosslinked after imprinting to improve thermal stability Soft Nanoimprint Lithography

Thiol-ene based elastomeric stamps for controlled mechanical properties

Hawker group (UCSB)

nanoimprinted poly(3-hexylthiophene) Campos, L. M., et. al. Adv. Mater. 20 3728 (2008)

100 nm

Can be done by hand or conventional imprint tool Soft Lithography – Stamp Making

Blend TAC:BPADMA and PMMS Crosslink-under UV on Si template

hv Can tune modulus 5-100 Mpa by Glass changing composition Cover

Stamp Material

Spacer

Template

Campos, L. M., et. al. (2008) Adv. Mater., 20: 3728–3733. doi: 10.1002/ adma.200800330 Soft Lithography – Crosslinkbale Semiconductor

Oxatane functionality allows for cross-linking

Spin coat, expose to acid vapor, and anneal

Crosslinked layer is x y insoluble and may be imprinted with pressure and solvent swelling

Enforce geometry where PVDF may infiltrate between lines of semiconductor Soft Lithography – Crosslinkbale Semiconductor

1µm

Imprinted features 200nm in size, can 500nm imprint smaller with different templates

Features order of 10nm in depth Next Steps

• Develop crosslinking method - also helpful for ferroelectric blend

• Examine conditions for smaller feature sizes

Acknowledgments Thanks to Luke Theogajaran &Justin Rofeh for helpful discussions! Acknowledgements

Graduate Students Collaborators Justin Cochran Prof. Craig Hawker Neil Treat Dr. Sung-yu Ku JJ Cowart Nancy Eisenmenger Prof. Ed Kramer Chris Liman Mike Brady Jes Sherman Anne Glaudell Dr. Martin Heeney Greg Su Prof. Iain McCulloch Srinivasan Venkatesh Andrew Jacobs Dr. Michael Toney Post-Docs Funding: Dr. Ruth Schlitz Dr. Bertrand Tremolet de Villers Dr. Simon Bubel Transistors with Semiconducting Polymers

Many materials with good electrical characteristics - transport gaps ~1 to 3 eV I-V characteristics of PBTTT

- ambipolar conduction μ=0.15 cm2/Vs -50

V =-30 V R R -40 G A) S S N µ S S -30 S S n S S n R -20 VG=-20 V p-type: 0.2-0.5 cm2/Vs p-type: 0.1-0.3 cm2/Vs Drain Current ( -10

VG=-10 V R 0 0 -10 -20 -30 -40 O N O C12H25 Source-Drain Voltage (V) S S S S S n n S -5 C H 12 25 -6 O N O -7 R p-type: 0.06-0.1 cm2/Vs -8 n-type: 0.1- 0.8 cm2/Vs -9

n -10 -11 N log [Drain Current (A)] -12

R R -13 -40 -30 -20 -10 0 10 20 2 p-type: 0.02-0.04 cm /Vs Gate Voltage (V) Electronic Structure of Organic Semiconductors

Morphology – Domain Structure Electronic Structure

LUMO "conduction band"

states in the gap (charge traps) energy

HOMO "valence band"

Transport in crystalline regions highly anisotropic: efficient - along chain, through pi stacked chains slow - lamellar stack due to alkyl chains Stable Doping of Organic Semiconductors

Molecular species such as F4TCNQ are strong acceptors Molecular Packing

(a)! (b)! Conductivity with after heating to 150°C 1! 1!

0.1! 0.1! ! 0.01! 0.01!

0.001!

0.001! 0.0001! !"#$%&'()*+,-./&01, Conductivity (S/cm) Conductivity

0.0001! 0.00001!

0.000001! 0.00001! 0! 2! 4! 6! 8! 10! P3HT as-cast! P3HT PBTTT as- PBTTT annealed! cast! annealed! F4TCNQ wt %!

High temperature stability (~180°C) achieved through molecular design Morphology of PEPT:PVDF-TrFE

Currently working to improve processing: • Solvent choice • Blend ratios of PEPT:PVDF-TrFE • Spin coating speed • Annealing time

Polymer Blend

Silver Bottom Some defects due to cleaving of film/wafer Contact

Silicon Wafer 200nm