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Cherry Trail Soc Cherry Trail SoC External Design Specification (EDS) (Volume 1 of 2) For Volume 2 of 2 refer Document ID: 543698 June 2014 Revision 1.2 Intel Confidential Document Number: 539071 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. A “Mission Critical Application” is any application in which failure of the Intel Product could result, directly or indirectly, in personal injury or death. SHOULD YOU PURCHASE OR USE INTEL'S PRODUCTS FOR ANY SUCH MISSION CRITICAL APPLICATION, YOU SHALL INDEMNIFY AND HOLD INTEL AND ITS SUBSIDIARIES, SUBCONTRACTORS AND AFFILIATES, AND THE DIRECTORS, OFFICERS, AND EMPLOYEES OF EACH, HARMLESS AGAINST ALL CLAIMS COSTS, DAMAGES, AND EXPENSES AND REASONABLE ATTORNEYS' FEES ARISING OUT OF, DIRECTLY OR INDIRECTLY, ANY CLAIM OF PRODUCT LIABILITY, PERSONAL INJURY, OR DEATH ARISING IN ANY WAY OUT OF SUCH MISSION CRITICAL APPLICATION, WHETHER OR NOT INTEL OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN, MANUFACTURE, OR WARNING OF THE INTEL PRODUCT OR ANY OF ITS PARTS. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined”. Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information. The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. *Other names and brands may be claimed as the property of others. Copyright © 2013-2014, Intel Corporation. All rights reserved. 2 Intel Confidential 539071 Contents 1Introduction............................................................................................................ 21 1.1 Cherry Trail SoC Packages .................................................................................. 22 1.2 Terminology ..................................................................................................... 25 1.3 Feature Overview .............................................................................................. 26 1.3.1 Processor Core....................................................................................... 26 1.3.2 System Memory Controller....................................................................... 26 1.3.3 Display Controller ................................................................................... 27 1.3.4 Graphics and Media Engine ...................................................................... 27 1.3.5 Image Signal Processor ........................................................................... 27 1.3.6 Power Management ................................................................................ 27 1.3.7 PCI Express* ......................................................................................... 28 1.3.8 USB Controller ....................................................................................... 28 1.3.9 Low Power Engine (LPE) Audio Controller................................................... 28 1.3.10 Storage................................................................................................. 29 1.3.11 Intel® Trusted Execution Engine (Intel® TXE) ........................................... 29 1.3.12 Serial I/O (SIO) ..................................................................................... 29 1.3.13 Platform Control Unit (PCU) ..................................................................... 29 1.3.14 Gaussian Mixture Modeling (GMM)* .......................................................... 29 1.3.15 Intel®Sensor Hub................................................................................... 30 1.3.16 Package ................................................................................................ 30 2Physical Interfaces.................................................................................................. 31 2.1 Pin States through Reset .................................................................................... 31 2.2 System Memory Controller Interface Signals ......................................................... 33 2.2.1 DDR3L-RS ............................................................................................. 33 2.2.2 LPDDR3 ................................................................................................ 35 2.3 USB Controller Interface Signals.......................................................................... 36 2.3.1 USB2.0 Interface Signals......................................................................... 36 2.3.2 USB HSIC Interface Signals ..................................................................... 37 2.3.3 USB3.0 Interface Signals......................................................................... 37 2.4 Integrated Clock Interface Signals ....................................................................... 39 2.5 Display - Digital Display Interface (DDI) Signals .................................................... 39 2.6 MIPI DSI Interface Signals.................................................................................. 40 2.7 MIPI Camera Serial Interface (CSI) and ISP Interface Signals.................................. 41 2.8 PCI Express Signals ........................................................................................... 42 2.9 Low Power Engine (LPE) for Audio (I2S) Interface Signals ....................................... 42 2.10 Storage Interface Signals ................................................................................... 43 2.10.1 Storage Controller (eMMC, SDIO, SD) ....................................................... 43 2.11 High Speed UART Interface Signals...................................................................... 44 2.12 I2C Interface Signals.......................................................................................... 45 2.13 NFC I2C Interface Signals ................................................................................... 46 2.14 PCU- Fast Serial Peripheral Interface (SPI) Signals................................................. 46 2.15 PCU - Real Time Clock (RTC) Interface Signals ...................................................... 47 2.16 PCU - Low Pin Count (LPC) Bridge Interface Signals ............................................... 47 2.17 PCU - Power Management Controller (PMC) Interface Signals .................................. 48 2.18 Serial Peripheral Interface (SPI) Signals ............................................................... 49 2.19 JTAG Interface Signals ....................................................................................... 49 2.20 Integrated Sensor Hub Interface Signals............................................................... 49 2.21 PWM Interface Signals ....................................................................................... 50 2.22 Miscellaneous Signals......................................................................................... 51 539071 Intel Confidential 3 2.23 Hardware Straps................................................................................................51 2.24 SoC RCOMP List.................................................................................................53 2.25 GPIO Muxing.....................................................................................................54 3 Processor Core.........................................................................................................91 3.1 Features...........................................................................................................91 3.1.1 Intel® Virtualization Technology (Intel® VT) ...............................................91 3.1.2 Security and Cryptography Technologies....................................................93 3.1.3 Power Aware Interrupt Routing.................................................................94 3.2 Platform Identification and CPUID ........................................................................94 3.3 References........................................................................................................94 4 SoC Transaction Router............................................................................................96 4.1 Register Map.....................................................................................................96 5Integrated Clock......................................................................................................97 6 Power Up and Reset Sequence .................................................................................99
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