Simulation and Modeling Techniques for Signal Integrity and Electromagnetic Interference on High Frequency Electronic Systems

Simulation and Modeling Techniques for Signal Integrity and Electromagnetic Interference on High Frequency Electronic Systems. by Luca Daniel Laurea (University of Padua, Italy) 1996 A dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of Philosophy in Engineering - Electrical Engineering and Computer Sciences in the GRADUATE DIVISION of the UNIVERSITY of CALIFORNIA at BERKELEY Committee in charge: Professor Alberto L Sangiovanni-Vincentelli, Chair Professor Jacob K White Professor Robert K Brayton Professor Ole H Hald Spring 2003 2 The dissertation of Luca Daniel is approved: Chair Date Date Date Date University of California at Berkeley Spring 2003 4 Simulation and Modeling Techniques for Signal Integrity and Electromagnetic Interference on High Frequency Electronic Systems. Copyright 2003 by Luca Daniel 6 1 Abstract Simulation and Modeling Techniques for Signal Integrity and Electromagnetic Interference on High Frequency Electronic Systems. by Luca Daniel Doctor of Philosophy in Engineering - Electrical Engineering and Computer Sciences University of California at Berkeley Professor Alberto L Sangiovanni-Vincentelli, Chair Many future electronic systems will consist of several significantly heterogeneous modules such as Opto- Electronic and analog RF links, mixed-signal analog to digital converters (ADC), digital signal processors (DSP), Central Processor Units (CPU), Memory modules, Microfabricated Electro-Mechanical (MEM) res- onators, sensors and actuators with power electronics converters. When assembling such an heterogeneous set of modules on a single package (Systems on Package: SoP) or integrated circuit substrate (Systems on Chip: SoC), compatibility issues are soon to arise from many possible point of views. In this thesis, we will address the physical electromagnetic point of view. We aim to encompass phenomena that range from the well known electric field capacitive cross-talk, to the more challenging magnetic field inductive coupling, and even full-wave propagating electromagnetic field couplings. We find the standard approach to Electro- Magnetic Compatibility (EMC) used on Systems on Board (SoB) quite inappropriate for Systems on Chip (SoC) where prototyping, metal shielding and ground planes are often expensive, and sometimes completely impractical. In the first part of the thesis we propose instead an accurate and efficient three dimensional electromagnetic field solver as a valuable tool for verifying the design against all sorts of electromagnetic interference before fabrication. In the second part, we propose modeling techniques as a valuable tool for characterizing each module with respect to its electromagnetic properties, so that higher level circuit simula- tors can be used effectively to check the compatibility of different blocks. In the third part of the thesis we argue that compatibility should be achieved through an automatic interconnect synthesis process, enabled by our newly developed parameterized modeling technique. The new generation of fast electromagnetic analysis programs, based on accelerated integral equation methods, has reduced the time required to analyze thousands of simultaneously interacting conductors from days to minutes. However such solvers are either inappropriate for, or are very inefficient at, analyzing interconnect exhibiting high frequency effects. With processor clock speeds exceeding two gigahertz and harmonics exceeding twenty gigahertz, high frequency effects cannot be ignored. The effects that are most troublesome for fast solvers are skin and proximity effects. Such phenomena can significantly affect interconnect performance and should not be neglected, in particular when either wire width or thickness is greater than two “skin-depths.” Interconnect performance on Printed Circuit Boards (PCB) and on IC Packages has suffered from such effects for many years. Even some Integrated Circuits are now starting to be affected at the global interconnect level (power, ground and clock distribution networks). For instance skin-depth in aluminum interconnect at the tenth harmonic of a two gigahertz clock is around a half micron. Skin and proximity effects are troublesome for current fast solvers because they generate an exponentially varying current distribution inside each conductor. Trying to represent that current variation using the standard piecewise constant basis functions commonly available in fast solvers requires a large number of unknowns. Since the ´ µµ computation time for fast solvers is supposed to increase only linearly (more precisely Ońlog n ) with the total number n of basis functions used in the problem, it may seem that the increase in unknowns to represent current variation is not that problematic. However, when many basis functions are used to represent 2 the current variation in a cross-section of a conductor, those basis functions interact densely in a way that can not be reduced by the algorithms used on most fast solvers. Thus, the computation time for modeling high frequency effects increases with the square of the number of unknowns required to model the current variation within conductors even for fast solvers. Two contributions of this specific Ph.D. work concentrate on addressing this issue by generating specialized basis functions, which more efficiently capture the expo- nential variation in the conductor current. Specifically we use the Helmholtz equation for the interior of the conductors to generate analytic solutions in one case (the conduction modes basis functions) and numerical solutions in the other case (the proximity templates basis functions). Both basis functions can be employed to discretize the Mixed Potential Integral Equation (MPIE) with a Galerkin technique. Both new sets of basis functions result in simulation times and memory requirements 400 times smaller than with piecewise constant basis functions. The analytical basis functions are more flexible when combined with model order reduction algorithm. The numerical basis functions are more flexible when handling general wire cross-sections. Electromagnetic analysis of a collection of interconnect is an essential tool for the verification of modern electronic circuits. However, of possibly greater importance, is the ability to capture such detailed, accurate and typically time consuming electromagnetic analysis into a small model. Quick evaluation of the model is essential for an acceptable time domain simulation speed in a circuit simulator. At the same time, parasitic extractor accuracy is essential for providing to the circuit designer the confidence that the actual fabricated electronic circuit will perform as predicted by the circuit simulation. Finally, producing models that preserve important system properties such as stability, passivity, and causality is crucial for a numerically stable be- havior of the models when used in any time domain simulator. The problem of preserving passivity has been partially address only recently by an algorithm (PRIMA). PRIMA can be applied only when the system to be modeled can be formulated in a very specific form. A way to formulate systems in such form has been given in literature for a general collection of conductors. No approach to preserve passivity is available instead when dielectrics or an IC substrate are present, or when full-wave analysis is needed to model systems whose dimensions are not small compared to wavelength (such as on todays’ PCB and packages, and in future IC power network grids). Two contributions in this thesis address exactly such points providing passivity preserving reduced order modeling algorithms for such applications. Model order reduction is typically a two-step procedure. In a first step one would typically apply the algorithms mentioned above since they can handle extremely large collection of interconnect and they can reduce them to an intermediate model. In a second step, better reductions are typically obtained employing the more optimal but also more computationally demanding Truncated Balance Realization (TBR) algorithm. Unfortunately this algorithm, in the form available in literature, does not necessarily preserve the passivity of the models it reduces. In another contribution, we developed a technique that has the same compression capabilities as TBR, but in addition it is also guaranteed to preserve passivity. Furthermore, our algorithm does not require the system to be in any special form. All interconnect models mentioned so far are intended for a higher level circuit simulator for verification of a given design. In a third part of this thesis we begin to address the “synthesis” problem. We develop a parameterized model order reduction technique that produces models that feature field solver accuracy when some pre-identified geometrical parameters (such as wire widths or wire spacing) are allowed to vary in a design exploration space. Our models are small enough to be used within an optimization loop by for example an interconnect router. Furthermore, the presented model generation approach is automatic. It is based on a very fast multi-parameter moment matching model-reduction algorithm. Thus parameterized reduced models can be constructed “on the fly”, and can account for any possible interconnect or circuit block already committed to layout, e.g. when designing and optimizing an interconnect bus or power and clock distribution networks. Professor Alberto L Sangiovanni-Vincentelli Dissertation Committee Chair i To my family ii iii Contents 1 Introduction

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