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SOPC-Based Cordless Phone SOPC-Based Cordless Phone First Prize SOPC-Based Cordless Phone Institution: National Institute of Technology, Tiruchy Participants: Dhirendrakumar Tripathi, P. D. S. Prasad Reddy, Rashmi HM Instructor: Dr. B. Venkataramani Design Introduction A cordless telephone has a base unit and a handset, and electromagnetic radiation allows the two to communicate. Cordless phones have become increasingly popular both at home and in the workplace, and modern cordless phones offer a wide range of features. The primary benefit of the cordless phone is that the handset does not need to be in a fixed location or close to the base unit. Cordless phones allow the user to free him or herself from a wired connection to the local telephone line and move about freely. Most cordless phones come with a built-in speaker phone. Color screens, like those in mobile phones, have become common in cordless phones as well. These phones support a variety of ring tones and even wallpapers and screen savers. Cordless phones can also be used to send and receive short message service (SMS) messages. Our design provides a digital implementation of a cordless phone operating in the range of 43 to 50 MHz in a Nios® II processor. We used the Nios II processor to build a system-on-a-programmable- chip (SOPC)-based cordless phone that supports real-time applications. The design enables easy reconfiguration and low development costs. Altera® SOPC designs let us implement real-time, critical functions in hardware. Custom instructions make it easy to implement the whole system on an SOPC platform, with better software partitioning and hardware implementation of the cordless phone. Design Purpose In this project, we digitally implemented a cordless phone operating in the 43 to 50 MHz range. So far, cordless phones operating in this range have only been implemented using analog techniques. We implemented a significant portion of the cordless phone design using an FPGA. A spread spectrum technique provides security and isolation between cordless phones. The complete digital transmitter 59 Nios II Embedded Processor Design Contest—Outstanding Designs 2007 and receiver are implemented on an FPGA and interfaced with the external world using analog-to- digital (A/D) and digital-to-analog (D/A) converters. Application Scope The application is a cordless phone that provides enhanced security and advanced features such as an address book, ring tones, answering machine, etc. at an affordable price. With small modifications, the same design could be used for secure military communication applications. Low-cost, high-density, low-power Altera FPGAs could be used to mass produce these phones at an affordable price. Nios II Processor and SOPC Builder Role A cordless phone system commonly includes a programmable embedded processor that controls the phone’s operation. In addition to the real-time requirement, the system also requires interfaces for the keyboard and display. The Nios II processor is useful for incorporating these features because all non- real-time tasks can be implemented efficiently in software. Furthermore, we can configure the number of I/O ports and the size of each port using SOPC Builder. Given these parameters, we implemented the digital transmitter and receiver blocks as custom instructions in the Nios II processor. The Nios II processor offers embedded design versatility and reconfigurability to implement all requirements of the cordless phone. It has built-in memory, peripherals, and interfaces, as well as a variety of intellectual property (IP) functions. Productivity tools--such as SOPC Builder, the Nios II Integrated Development Environment (IDE), and Quartus II Compiler combined with an FPGA target device, allowed us to reduce our turnaround time and costs. The Nios II processor is a perfect fit because we could select the peripheral, performance, processor variant, and cost that best suits to our needs. The Nios II processor supports multi-processor systems, and using SOPC Builder we could implement multiple processor cores if our design required it. We can efficiently implement a complete system when we integrate high-density FPGAs with high-capacity RAMs and the Nios II processor. High-bandwidth memories, embedded digital signal processing (DSP) blocks, phase-locked loops (PLLs), and high-speed interfaces can be programmed into the FPGA, which facilitated the cordless phone implementation. Function Description The SOPC-based cordless phone consists of two primary digital parts, the FM modulator/demodulator and frequency hopping spread spectrum (FHSS) modulator/demodulator. FM Modulator/Demodulator The SOPC-based cordless phone uses a radio frequency link to transmit/receive voice signals between the base unit and the remote hand set. In this design, voice signal frequency modulation is performed in the digital domain using the coordinate rotation digital computer (CORDIC) algorithm. The system demodulates the FM signal in the digital domain using the CORDIC algorithm and a special sampling technique. The following sections provide a brief explanation of the CORDIC algorithm and the special sampling scheme. For more details on these topics refer to “References” on page 80. CORDIC Algorithm The CORDIC algorithm uses shifts and adds to compute a wide range of functions, including trigonometric, hyperbolic, linear, and logarithmic functions. The CORDIC algorithm is used in diverse applications such as mathematical co-processor units, calculators, waveform generators, and digital modems. The CORDIC algorithm uses shifts and adds to perform vector rotations iteratively. In rotation mode, the CORDIC converts one vector in rectangular form to another vector in rectangular form. In vector mode, it converts a vector in rectangular form to polar form. 60 SOPC-Based Cordless Phone CORDIC Rotation Mode The CORDIC algorithm for rotation mode is derived from the general rotation transform: Θ Θ xfin = xincos - yinsin (1) Θ Θ yfin = yincos + xinsin (2) Θ The transform rotates a vector (xin, yin) in a Cartesian plane by an angle to another vector with the coordinates (xfin, yfin). Rotation is achieved by performing a series of successively smaller elementary Θ Θ Θ Θ rotations 0, 1, 2... N such that: N ΘΘ = ∑ i 0 Figure 1 shows the case where rotation of a vector of magnitude 1 by an angle Θ is achieved using three Θ Θ Θ elementary rotations 0, 1, and 2. Θ Figure 1. Vector Rotation by an Angle i Using Steps y (x2 , y2 ) (cos(Θ), sin(Θ)) Θ 2 Θ (x1 , y1 ) 1 Θ Θ 0 (1, 0) x Θ Rotation of the vector by an angle i can be rewritten as: Θ Θ xi+1 = xicos i - yisin i (3) Θ Θ yi+1 = yicos i - xisin i (4) Θ Θ xi+1/ cos i = xi - yitan i (5) Θ Θ yi+1/ cos i = yi - xitan i (6) The computational complexity of equations (5) and (6) can be reduced by rewriting them as: Θ xi+1 = xi - yi tan i (7) Θ yi+1 = yi - xi tan i (8) x y (,)x y = (,)-------------------N -------------------N (9) fin fin N N Θ Θ ∏cos i∏cos i 1 1 61 Nios II Embedded Processor Design Contest—Outstanding Designs 2007 Θ and performing the division by cos i together for all N iterations by dividing the value of (xN,yN) by N Θ ∏cos i . 1 Θ Θ -i Further, the value of i for i = 1, 2 … N is chosen such that tan i is 2 . Table 1 shows the values of the angles for i = 0 to 9. Θ -1 -i Table 1. Values of i tan (2 ) Θ Θ i i tan i 0451 1 26.5 0.5 2140.25 3 7.1 0.125 4 3.57 0.0625 5 1.78 0.03125 Θ This process reduces the multiplication by the tan i to a simple shift operation. As the iteration Θ Θ Θ increases, i becomes smaller and smaller. When the difference between and the sum of i from 1 to N becomes very small for some value of N, the iteration terminates. The remaining angle by which the vector must be rotated after the completion of i iterations is indicated by the parameter zi+1 as given in equation (10). Θ zi+1 = zi - i (10) Θ z0 = 0 (11) Θ i is considered to be positive when the rotation required is counter-clockwise and negative otherwise. Θ -1 -i Θ To approximate an arbitrary angle using i of the form tan (2 ), i may be negative for some values of i. The sign (sgn) of zi indicates whether, in the next iteration, the rotation should be counter-clockwise or Θ -i Θ -i clockwise. Because, tan i is +2 when i is positive and -2 otherwise, the iterative equations may be rewritten as: δ i = sgn (zi) (12) δ -i xi+1 = xi - i yi 2 (13) δ -i yi+1 = yi + i xi 2 (14) δ -1 -i zi+1 = z1 - i tan (2 ) (15) N Θ The computation of ∏cos i can be simplified. 1 Θ Θ Because cos i = 1 for very small values of i, the equation can be computed for N = 6 (therefore K = 0.6073), and can be used for any other value of N > 6. 62 SOPC-Based Cordless Phone CORDIC Vector Mode In this mode, an initial vector with the x, y coordinates of (xin, yin) is rotated such that its y coordinate becomes zero. The procedure used for rotation may be adopted for vector mode with the following modifications: rotation is carried out clockwise (so that the y coordinate can be made 0), and the total angle by which the vector has been rotated from the initial position after i rotations is indicated by the parameter zi+1 and z0 is defined as 0. See equations 16 through 19.
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