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A Charge-Recycling Scheme and Ultra Low Voltage Self-Startup Charge Pump for Highly Energy Efficient Mixed Signal Systems- On-A-Chip

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A Charge-Recycling Scheme and Ultra Low Voltage Self-Startup Charge Pump for Highly Energy Efficient Mixed Signal Systems- On-A-Chip University of Tennessee, Knoxville TRACE: Tennessee Research and Creative Exchange Doctoral Dissertations Graduate School 12-2012 A Charge-Recycling Scheme and Ultra Low Voltage Self-Startup Charge Pump for Highly Energy Efficient Mixed Signal Systems- On-A-Chip Chandradevi Ulaganathan [email protected] Follow this and additional works at: https://trace.tennessee.edu/utk_graddiss Part of the Electrical and Electronics Commons, and the VLSI and Circuits, Embedded and Hardware Systems Commons Recommended Citation Ulaganathan, Chandradevi, "A Charge-Recycling Scheme and Ultra Low Voltage Self-Startup Charge Pump for Highly Energy Efficient Mixed Signal Systems-On-A-Chip. " PhD diss., University of Tennessee, 2012. https://trace.tennessee.edu/utk_graddiss/1593 This Dissertation is brought to you for free and open access by the Graduate School at TRACE: Tennessee Research and Creative Exchange. It has been accepted for inclusion in Doctoral Dissertations by an authorized administrator of TRACE: Tennessee Research and Creative Exchange. For more information, please contact [email protected]. To the Graduate Council: I am submitting herewith a dissertation written by Chandradevi Ulaganathan entitled "A Charge- Recycling Scheme and Ultra Low Voltage Self-Startup Charge Pump for Highly Energy Efficient Mixed Signal Systems-On-A-Chip." I have examined the final electronic copy of this dissertation for form and content and recommend that it be accepted in partial fulfillment of the requirements for the degree of Doctor of Philosophy, with a major in Electrical Engineering. Benjamin J. Blalock, Major Professor We have read this dissertation and recommend its acceptance: Charles L. Britton, Jeremy Holleman, Xiaobing Feng Accepted for the Council: Carolyn R. Hodges Vice Provost and Dean of the Graduate School (Original signatures are on file with official studentecor r ds.) A Charge-Recycling Scheme and Ultra Low Voltage Self-Startup Charge Pump for Highly Energy Efficient Mixed Signal Systems-On-A-Chip A Dissertation Presented for the Doctor of Philosophy Degree The University of Tennessee, Knoxville Chandradevi Ulaganathan December 2012 Copyright © 2012 by Chandradevi Ulaganathan All rights reserved ii To my parents & AT iii Acknowledgements I would like to express my sincere gratitude to my advisor Dr. Benjamin J. Blalock whose constant support, guidance and patience helped me in completing this dissertation. I‟m thankful to him for providing me with employment at the Integrated Circuits and Systems Laboratory (ICASL) for the past 6 years. Dr. Blalock‟s tireless efforts to secure funding for cutting-edge research are very much appreciated. I also thank him for fostering a collaborative atmosphere in the lab and for giving me the freedom to pursue my interests. I‟m grateful to Dr. Charles L. Britton for his valuable advice, help and for being a source of inspiration during this research. I wish to thank Dr. Jeremy Holleman and Dr. Xiaobing Feng for serving on my committee and providing me with helpful suggestions and encouragement throughout this work. I thank Dr. Bimal K. Bose for his support and mentoring during my graduate studies. I‟m grateful to Ryan Lind, Clif Jones and the Home Audio Amplifiers group at TI for their support. I would like to thank all my current and former colleagues in ICASL for their support. It has been a great pleasure working with you. I‟m grateful to Drs. Neena Nambiar, Suheng Chen and Robert Greenwell for their encouragement, friendship and support. In addition, I would like to thank Pollob, Junjie and Kai for their help with the chip submissions. I wish to thank the administrative and the IT staff at the Department of Electrical Engineering and Computer Science for all their help. I wish to express my deepest gratitude to my friends Aparna Thyagarajan, Ezhilarasi Manickavasagam, Sukanya Iyer, Sangeetha Swaminathan, Srivatsan Sundararajan, Ankit Master and Anton D‟Silva. I‟m grateful to Lalitha Aunty for her unconditional love and support. Most importantly, I wish to thank my parents Mrs. Saroja and Mr. Ulaganathan, and my sisters Arthi and Vaishnavi, for their unconditional love, support and faith in me. I‟m eternally grateful to you for all the difficult decisions that you have made to help me realize my dreams. iv Abstract The advent of battery operated sensor-based electronic systems has provided a pressing need to design energy-efficient, ultra-low power integrated circuits as a means to improve the battery lifetime. This dissertation describes a scheme to lower the power requirement of a digital circuit through the use of charge-recycling and dynamic supply-voltage scaling techniques. The novel charge-recycling scheme proposed in this research demonstrates the feasibility of operating digital circuits using the charge scavenged from the leakage and dynamic load currents inherent to digital design. The proposed scheme efficiently gathers the “ground-bound” charge into storage capacitor banks. This reclaimed charge is then subsequently recycled to power the source digital circuit. The charge-recycling methodology has been implemented on a 12-bit Gray-code counter operating at frequencies of less than 50 MHz. The circuit has been designed in a 90-nm process and measurement results reveal more than 41% reduction in the average energy consumption of the counter. The total energy savings including the power consumed for the generation of control signals aggregates to an average of 23%. The proposed methodology can be applied to an existing digital path without any design change to the circuit but with only small loss to the performance. Potential applications of this scheme are described, specifically in wide- temperature dynamic power reduction and as a source for energy harvesters. The second part of this dissertation deals with the design and development of a self- starting, ultra-low voltage, switched-capacitor (SC) DC-DC converter that is essential to an energy harvesting system. The proposed charge-pump based SC-converter operates from 125- mV input and thus enables battery-less operation in ultra-low voltage energy harvesters. The charge pump does not require any external components or expensive post-fabrication processing to enable low-voltage operation. This design has been implemented in a 130-nm CMOS process. While the proposed charge pump provides significant efficiency enhancement in energy harvesters, it can also be incorporated within charge recycling systems to facilitate adaptable charge-recycling levels. In total, this dissertation provides key components needed for highly energy-efficient mixed signal systems-on-a-chip. v Contents CHAPTER 1 INTRODUCTION..............................................................................................1 1.1 Motivation .................................................................................................1 1.2 Research Goals ..........................................................................................3 1.3 Dissertation Overview ...............................................................................4 CHAPTER 2 LITERATURE REVIEW .................................................................................6 2.1 Introduction ...............................................................................................6 2.2 Power Consumption ..................................................................................6 2.3 Scaling Trends for CMOS Technologies ..................................................8 2.4 Low Energy Design Techniques .............................................................10 2.4.1 Power Supply Voltage Scaling ......................................................10 2.4.2 Leakage power reduction ...............................................................12 2.4.3 Charge-recycling systems ..............................................................13 2.5 Conclusion ...............................................................................................19 CHAPTER 3 DESIGN AND ANALYSIS OF THE PROPOSED CHARGE RECYCLING SCHEME .............................................................................................................21 3.1 Introduction .............................................................................................21 3.1.1 Switching or Dynamic Power dissipation ......................................22 3.1.2 Optimum power supply voltage .....................................................27 3.1.3 Feasibility of Charge Recycling .....................................................28 3.2 Proposed Charge-Recycling Methodology ..............................................29 3.3 Design of the proposed charge-recycling system ....................................31 3.3.1 Charge-Recycling Process – Design and Control ..........................31 3.3.2 Estimation of the Charge-Recycling Capacitor Size .....................33 3.3.3 Low-Power Comparator.................................................................34 3.4 Analysis of Energy Consumption in the Charge-Recycling Scheme ......38 3.4.1 Estimation of Virtual Power Supply Voltage levels and CR cycle39 vi 3.4.2 Estimation of Energy Saved using CR Scheme .............................45 3.5 Implementation of the charge-recycling methodology ............................51 3.5.1 Design Methodology ......................................................................52 3.5.2 Physical Implementation ................................................................55 3.6 Simulation Results and Performance
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