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Ultra Low Power Charge Pump with Multi-Step Charging and Charge Sharing

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Ultra Low Power Charge Pump with Multi-Step Charging and Charge Sharing Ultra Low Power Charge Pump with Multi-Step Charging and Charge Sharing Steve Ngueya W.1,2, Julien Mellier1, Stephane Ricard1 Jean-Michel Portal2, Hassen Aziza2 1Safran-Starchip, NVM Group 2Aix-Marseille University, IM2NP-UMR CNRS Meyreuil, France Marseille, France Abstract—a new approach for improving the power efficiency VIN v MS v1 MS v2 vN-1 MS N VOUT of the conventional four-phase charge pump is presented. Based on the multi-step capacitor charging and the charge sharing MB MB MB concept, the charge pump design is able to reduce the overall power consumption by 35% compared to the conventional four- C phase charge pump and by 15% compared to a charge sharing C CB C CB C B charge pump, for an output current of 200µA with 12V output voltage. CLK3 CLK2 CLK1 CLK4 CLK1 CLK4 Keywords—Ultra low power; charge pump; charge sharing; CLK1 adiabatic charging; power efficiency. CLK2 CLK3 I. INTRODUCTION The basic functionality of a charge pump circuit is to CLK4 generate HV from lower voltage by charging and discharging capacitors [1]. Classical charge pump circuits are based on Fig. 1. Conventional boosted charge pump with four-phase clock scheme Cockcroft and Walton [2] voltage multiplier. However an on chip monolithic integration of the circuit is hard to reach. To In this paper, the concept of charge sharing is combined with overcome the limitations of the Cockcroft-Walton multiplier, the the concept of multi-step capacitor charging using adiabatic Dickson voltage multiplier circuit based on a diode chain is techniques for capacitor charging [11] [12] [13]. The main idea proposed in [3]. This circuit has poor conversion efficiency due behind the proposed solution is to use a three voltage steps charging technique. We initially charge the capacitor from GND to the body bias effect [4] on the threshold voltage (VTH). In fact, as the voltage of each stage increases by the charge pumping, to a voltage step V0 (closed to VDD/2) by charge sharing. After the threshold voltage of the diode-connected transistor also that, we charge this capacitor from V0 to second voltage step V1 increases, which results in decreased voltage gain. Therefore, and then from V1 to V2. The process ends by charging capacitor less charge transfer takes place. from V2 to VDD. The resulting system reduces by 15% the power consumption of the state of the art charge pump with Many architectures have been developed to reduce the charge sharing. influence of the VTH on the performance of the charge pump, mainly by canceling the impact of the body effect. In [5], [6] and [7], a static or dynamic feedback response is used to improve the efficiency of charge transfer. In [8], the charge pump using a four-phase clock and boost capacitors on the switch transistors eliminates the influence of VTH. The circuit of a conventional four-phase boosted charge pump is described in Fig 1. CLK3 and CLK4 are two overlapped clock phases used to charge the pump capacitors C. CLK2 and CLK4 are two non-overlapped clocks used to boost the gate voltage of the charge transfer devices MS during charge transfer. Fig. 2. Charge sharing clock generator with two non-overlapped clocks clk2 However, all of these architectures do not completely and clk4. Chg_shb is the complementary of Chg_sh. optimize power consumption. Several studies have been led to reduce the power consumption. In [9], an optimized method to The paper is organized as follow. Section II presents the main maximize power efficiency is presented. This method is based sources of power loss in charge pump systems and charge on the determination of the optimal stage number that minimize sharing concept. Section III presents the multi-step concept and the power consumption for a given input and output voltage. In its association with the charge sharing concept. Simulation [10], the charge sharing technique applied to a conventional results are presented to fully validate the concept. Finally part four-phase charge pump is used to double the power efficiency. IV concludes the paper. VIN v MS v1 MS v2 vN-1 MS N VOUT charging and discharging in two steps the pumping capacitor of each charge pump stage as show in Fig.3. MB MB MB In Fig. 2, the capacitors C1 and C2 are initially discharged C CB C CB C CB and their potential is set to GND. When CLK2 is high and CLK4 is low, the pass gate is OFF and C1 is charged to VDD whereas C2 remains grounded. After that, CLK2 goes to GND and CLK4 Sh_CLK4 CLK2 Sh_CLK2 CLK4 Sh_CLK2 CLK4 is still at GND. Chg_Sh goes high and turns on the pass gate. Sh CLK2 There is a charge sharing between C1 and C2 with equalization CLK2 level of Sh_CLK2 and Sh_CLK4 at the VDD/2 voltage. Finally Sh CLK4 when CLK4 goes high while CLK2 still low, the pass gate is OFF and C1 is discharged to GND and C2 is charged to VDD. CLK4 The conventional four-phase charge pump and the charge sharing charge pump have the same architecture but the Fig. 3. Conventional four-phase charge pump with charge sharing technique difference between them is the charging sequence of the pump and clocking scheme. Sh_CLK2 and Sh_CLK4 for charging the pump capacitor in one step for the former and two steps for the later. capacitors and two non-overlapped clock phases CLK2 and CLK4 for boosting the gate. During charge sharing operation (Chg_Sh low) there is no energy loss by the source. Only the step from VDD/2 to VDD is II. PROBLEM FORMULATION realized by the voltage source and the energy supplied is A. Charge pump power consumption ½.C.VDD². The power efficiency of this system is then given by: A conventional four-phase charge pump is shown in Fig.1. = = Each stage consists of a switch transistor MS, a boost transistor (3) +1+ MB, a boost capacitor CB and a pump capacitor C. Based on 2 +1− studies of Palumbo in [9], the current consumption can be The efficiency of the charge pump augmented with charge calculated from: sharing is better than the one of the conventional four-phase charge pump. However, the charging from VDD/2 to VDD is done = +1 + (1) using one step. Therefore, if this charging phase is made by +1 − mean of M intermediate voltage steps, the total supplied energy can be reduced. In this context, the multi-step charging Where N is the stage number, Vout is the output voltage, technique coupled with the charge sharing technique should be VDD the supply voltage and Iout the output current. more efficient. The theoretical efficiency of the charge pump is: III. CHARGE SHARING WITH MULTIPLE STEPS = = (2) If the voltage difference before and after charging a capacitor +1+. C from V0 to VDD is V then the energy delivered by the voltage +1− source is C.V². However, the energy stored by the capacitor C is Where K = Vout/VDD and is the parasitic ratio between C and ½.C.VDD². So there is half of the energy loss in the switch the bottom plate parasitic capacitor of C. resistance R (Fig.4). To reduce the power consumption of the charge pump Using adiabatic charging methods and in particular multi- circuit, the main contributors of the system should be optimized. step charging is one of the best way to save energy. Svensson in In general, the root causes of power consumption are the clock [11] and [12] firstly mentioned the multi-step charging generation and clock buffers circuits, the charge transfer technique for driving a capacitive load without dissipating switches of each stage and the regulator circuit. However, as f.C.V². As shown in Fig.4, using M voltage steps for charging C stated in [10], more than 80% of the power consumption is due to VDD, the total energy delivered by the voltage source is given M+1 1 to the clock buffers used for charging and for discharging the by .C.V² and the total dissipated energy is equal to .C.V², pump and boost capacitors. Consequently, power losses during 2.M M M-1 capacitor charging is targeted and investigated. so that the total energy saving, in percentage, is equal to . 2.M B. Charge sharing charge pump Therefore, the higher the number of steps the higher the energy saving. Practically, it is difficult to design a circuit with a large In each stage of the conventional four-phase charge pump number of voltage steps because of all voltage sources needed circuit, a capacitor is charged to VDD during one-half clock and the corresponding control switches leading to more power cycle. Then, a charge transfer is made with the capacitor of the losses. For this reason, three steps is chosen (M = 3, see Fig.4). next stage. At the end of the process, remaining charges are lost In this case, the total energy saving is 34% compared to one step since discharging to the ground is applied. If the remaining charging. In this context, if the three steps charging technique is charges are reused to charge another capacitor in the circuit then, applied to the charge sharing concept shown in Fig.2 and Fig 3, energy needed to charge this capacitor will be reduced. This the resulting charge pump system will be more energy efficient technique is known as charge sharing or charge reuse. As shown compared to the classical charge sharing charge pump. in Fig.2, CLK2 and CLK4 are two non-overlapped clocks used to create the two new clock signals Sh_CLK2 and Sh_CLK4 for VC B.
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