CALIFORNIA STATE UNIVERSITY, NORTHRIDGE

DESIGN OF AN OPTIMAL KUBAND OSCILLATOR

FOR SATELLITE UPLINK MODULES

A graduate project submitted in partial fulfillment of the requirements

For the degree of Master of Science

in Electrical Engineering

By

John Lasantha Perera Jayasinghe

December 2013

The graduate project of John Lasantha Perera Jayasinghe is approved:

______

Professor Somnath Chattopadhyay Date

______

Professor Ali Amini Date

______

Professor Mathew M. Radmanesh, Chair Date

California State University, Northridge

ii Dedication

Dedicated to All Individuals Contributing to the Betterment of Society

With Their Brilliant Knowledge in Science & Engineering

iii Table of Contents

Signature Page ii

Dedication iii

List of Figures vi

Abstract viii

Chapter 1: Introduction 1

1.1 Problem Definition 1

Chapter 2: Design Theory and Analysis 3

2.1 Review of the Literature 3

2.2 Theory of Negative Resistance Oscillating Conditions 5

2.3 Common Source to Common Gate Sparameter Conversion 8

Chapter 3: Design Procedure 11

3.1 Stability Check 11

3.2 Output Stability Circle Characterization 12

3.3 Input Stability Circle Characterization 13

3.4 Negative Resistance Oscillator Design 14

3.5 Terminating Network Matching Circuit Design 16

3.6 Generator Tuning Network Matching Circuit Design 18

Chapter 4: Simulation Results 20

4.1 MATLAB Results 20

4.1.1 SParameter Conversion: Common Source to Common Gate 20

iv 4.1.2 Linear Analysis Calculations 21

4.2 ADS results 22

4.2.1 ADS Transistor Model 22

4.2.2 Bias Conditions and Common Source Configuration S 23

parameter Behavior

4.2.3 Common Gate Configuration Sparameter Behavior 27

4.2.4 ADS Terminating Network Circuit 30

4.2.5 ADS Generator Network Circuit 31

4.2.6 Overall ADS Oscillator Circuit and Results 32

Summary of Analysis 37

Conclusions 38

References 39

Appendix A: MATLAB Common Source to Common Gate Sparameter Conversion 40

Appendix B: MATLAB Oscillator Parameters Calculation 45

Appendix C: ADS Oscillator Negative Resistance/Reactance Measurement 51

Appendix D: MESFET Transistor NE72218 Data Sheet 52

Appendix E: MESFET Transconductance Measurement Circuit 57

v List of Figures

Figure 1.1 Transmitter module at ground base. 1

Figure 2.1 The cross section of an NType GaAs MESFET with a recessed gate and 4 three epitaxial layers

Figure 2.2 Twoport transistor oscillator block diagram. 5

Figure 3.1 Output stability circle (for terminating network). 12

Figure 3.2 Input stability circle (for generator tuning network). 13

Figure 3.3 |Γ in | (zaxis) vs. |Γ T| (xaxis) vs. ∠ ΓT (yaxis). 14

Figure 3.4 Smith chart for terminating network with load. 16

Figure 3.5 Circuit for terminating network with load. 17

Figure 3.6 Smith chart for generator network. 18

Figure 3.7 Circuit for generator network. 19

Figure 4.1 MATLAB I/O screen. 21

Figure 4.2 NE72218 MESFET nonlinear transistor model for ADS. 22

Figure 4.3 Common source configuration Sparameter test bench. 23

Figure 4.4 Actual (dashed) vs. ADS model (solid) common source Sparameters. 24

Figure 4.5 ADS model I D vs. V DS plot. 25

Figure 4.6 ADS model I D vs. V GS plot for fixed V DS =3V. 26

Figure 4.7 ADS model Transconductance plot based on Figure 4.6. 27

Figure 4.8 Common gate circuit with series feedback. 28

Figure 4.9 Actual (dashed) vs. ADS model (solid) common gate Sparameters. 29

Figure 4.10 Impedance measurement setup for the terminating network with load. 30

vi Figure 4.11 Smith chart for terminating network with load. 30

Figure 4.12 Impedance measurement setup for the generator tuning network. 31

Figure 4.13 Smith chart for generator tuning network. 31

Figure 4.14 Overall ADS oscillator circuit. 32

Figure 4.15 Oscillator frequency spectrum. 33

Figure 4.16 Oscillator time domain signal (steady state). 33

Figure 4.17 Oscillator absolute noise voltage spectrum (around the fundamental). 34

Figure 4.18 Oscillator single sideband phase noise (around the fundamental) 35 behavior.

Figure 4.19 Oscillator open loop response measurement setup. 35

Figure 4.20 Oscillator open loop response. 36

vii ABSTRACT

DESIGN OF AN OPTIMAL KUBAND OSCILLATOR

FOR SATELLITE UPLINK MODULES

By

John Lasantha Perera Jayasinghe

Master of Science in Electrical Engineering

The following thesis project is based on designing a KuBand Oscillator operating at 14

GHz for satellite communication applications. A suitable MESFET transistor in the common gate configuration was employed to achieve a negative resistance (energy gathering) circuit for the core oscillator. The project was segregated into 2 parts: Linear

Analysis and Harmonic Balance Simulation. In the former phase, the respective generatortuning and terminating (for negative resistance) matching networks were designed based on input and output stability circles generated from suitable small signal

Sparameters. Initially the required calculations were done manually and MATLAB software was used to further confirm and refine the solutions obtained. Next in the

Harmonic Balance Simulation phase, the Agilent simulation software Advance Design

System (ADS) was utilized to implement the overall oscillator circuit and evaluate its main performance parameters such as gain, harmonics and phase noise.

viii

Chapter 1: Introduction

An electronic oscillator is a device that produces a desired alternating current/voltage wave form using a DC power source [3] . Depending on the wave form created, such oscillators typically fall into 2 groups: Harmonic (Linear) such as sinusoidal wave form oscillators and Relaxation (Nonlinear) such as saw tooth wave form oscillators.

Oscillators are generally used in almost all modern day electronic devices such electronic watches, television sets, radios, modems, cell phones and most notably in computers.

Specifically, they are used for frequency conversion in RF transmitter/receiver modules, in digital clocks and other synchronizing devices such as PLL circuits and as basic sound sources in electronic warning systems etc.

1.1 Problem Definition

Recently, there is an overwhelming need for robust, low phasenoise local oscillators

(LO) primarily used in Fixed Service Satellite (FSS) networks where the uplink frequency is usually allocated to be in the range of 13.6 to 14.5 GHz.

Figure 1.1 Transmitter module at ground base.

1

Hence this report is based on designing an optimal KuBand local oscillator (microwave generator) for the above mentioned FSS uplink (ground base) transmitter modules as further illustrated in Figure 1.1. In addition, the core objectives of this project are summarized beneath.

Goals:

Oscillating Frequency: 14.0 ± 0.4 GHz

Output Power: > 25 dBm

Phase Noise (Single Side-Band): < -90 dBc/Hz at 100 kHz Offset

Absolute Noise (at Fundamental): < 0.1 V

2

Chapter 2: Design Theory and Analysis

2.1 Review of the Literature

Oscillators can be designed in either of two different methods: One using Positive

Feedback and the other using Negative Resistance. Since a 14 GHz transistor oscillator is preferred, in this report the latter method is used due to the simplicity and robustness of its design for higher frequencies. In a 2port design using a transistor, the objective is to add a network to one of the ports to make it a single port unstable device with negative resistance. However in the event that the transistor circuit is not sufficiently unstable enough, it is first considered as a 3 port device and an appropriate external feedback element (series/parallel inductor or capacitor) is added to one of the ports to attain desired instability.

Besides three possible transistor configurations can be utilized to design 2port oscillators: common gate (base), common source (emitter) and common drain (collector).

Since common drain high frequency oscillators are difficult to implement, common gate and source arrangements are usually favored [2] . In this thesis, the common gate arrangement is exclusively chosen since it provides the best tuning capability along with the fact that it is the most effective of the three [2] .

Furthermore in the following project, an NType GaAs MESFET will be utilized in realizing the K UBand oscillator. Specifically, the NE72218 MESFET transistor has a recessed gate and 3 epitaxial layers: ntype layer, n+ epitaxial layer and a ptype buffer layer. These layers are then followed by a semiinsulating GaAs layer doped with

Chromium. Figure 2.1 further elaborates the different regions in the MESFET.

3

Figure 2.1 The cross section of an NType GaAs MESFET with a recessed gate and three epitaxial layers.

GaAs transistors are usually preferred over Sibased transistors especially in high frequency applications since the GaAs carrier mobility is much higher. Moreover, the electron saturation velocity for GaAs is much larger than that of Si, resulting in a wider operating frequency range.

4

2.2 Theory of Negative Resistance Oscillating Conditions

In general, a 2port negative re sistance, transistor oscillator can be summarized into an equivalent block diagram shown below. Typically, t he Terminating Network consists of the oscillator load; and together with the transistor , provides the nece ssary negative resistance (for power coll ection) to the overall circuit. On the other hand, the Generator

Tuning Network determines the frequency of oscillation via a resonator or similar impedance matched circuit.

[S]

L

Figure 2. 2 Twoport transistor oscillator block diagram.

Where:

ZG & Γ G → Generator tuning network impedance and reflection coefficient

Zin & Γ in → Input port impedance and reflection coefficient

Zout & Γ out → Output port impedance and reflection coefficient

ZT & Γ T → Terminating network impedance and reflection coeffic ient

[S] → Transistor Sparameter matrix

L → Inductance of inductor

5

In order for the above 2port device to oscillate, all of the fundamental conditions (shown below) must be met without any exceptions:

1. Unstable transistor behavior:

1 − − + ∆ = <1, ∆= − 2 OR

1 − = ∗ < 1 − Δ + 2. Oscillating input port:

Γ − Z Γ .Γ = + . ≥ 1(= 1steadystate) 1 − Γ + Z

3. Oscillating output port:

Γ − Z Γ .Γ = + . ≥ 1(= 1steadystate) 1 − Γ + Z

Conditions 2 & 3 are mutually inclusive and hence if one is attained the other is achieved automatically which implies that both ports concurrently undergo oscillations.

Furthermore, since the matching circuits on either side of the transistor are also passive circuits, the below conditions become evident [4] .

4. | Γ G| < 1 & | Γ T| < 1 (passive circuits)

5. Therefore |Γ in | > 1 & |Γ out | > 1 (leads to negative resistance)

6

Alternatively, considering the above device as a oneport device, conditions interrelated to the above requirements must also be satisfied for oscillation startup & steady state:

Z +Z < 0(= 0steadystate)

⟹ R +R < 0(= 0steadystate)andX +X = 0

Thus an extensively used method when designing oscillators is choosing the generator

rd tuning resistance (R G) to be 1/3 of the absolute value of the input port resistance

(|R in |/3); and then choosing the respective phase components to cancel each other out

(X G = Xin ).

= + = − 3

7

2.3 Common Source to Common Gate S-parameter Conversion

In most cases, device data sheets only provide common source Sparameters for a given range of frequencies. Hence if design requirements point to other configurations, a need arises for them to be converted to their respective common gate or common source counterparts. Typically software programs (MATLAB etc.) are used for such conversions especially when a large range of frequencies is involved.

At the outset of such a conversion, the common source Sparameters should be transformed to the corresponding admittance values as below:

∆= (1 + )(1 + ) −

(1 − )(1 + )+ = ∆

−2 −2 = , = ∆ ∆

(1 + )(1 − )+ = ∆

These admittance values are then converted to the relevant common gate admittances:

= + + +

= −( + )

= −( + )

=

8

The common gate admittances are then converted back to the equivalent Sparameters:

∆= 1 + 1 + −

1 − 1 + + = ∆

−2 −2 = , = ∆ ∆

1 + 1 − + = ∆

Furthermore, if for example an inductor was added in series to make the said transistor unstable, next the above parameters need to be converted to impedance values. The impedance of the inductor is then added to each of the above mentioned values to get the resultant impedances.

Common gate impedance values without inductor:

∆= 1 − 1 − −

1 + 1 − + = ∆

2 2 = , = ∆ ∆

1 + 1 − + = ∆

9

Common gate impedance values with inductor:

= 2

= + , = +

= + , = +

Normalized common gate impedance values with inductor:

, = / = /

, = / = /

Therefore the final common gate Sparameters would be:

∆ = + 1 + 1 −

− 1 + 1− = ∆

2 2 = , = ∆ ∆

+ 1 − 1− = ∆

10

Chapter 3: Design Procedure

3.1 Stability Check

The generated common gate Sparameters (with a series inductor) at 14 GHz were:

= 0.314805∡24.3494°, = 0.603478∡ − 18.4199°

= 0.717835∡9.01633°, = 0.560684∡47.5123°

Using the above S parameters, stability checks were performed manually using theoretical equations as below.

KParameter Test for instability:

1 − − + ∆ = = 0.903 < 1( ) 2

ℎ∆= − = 0.442

parameter test for instability:

1 − = ∗ = 0.923 < 1() − Δ +

Since the transistor was confirmed to be unstable, subsequently the output and input stability chart parameters were generated to ultimately determine the respective matching circuits for the overall oscillator.

11

3.2 Output Stability Circle Characterization

The Output Stability Circle (Terminating Network) parameters are summarized beneath:

= − ∆ = 0.119, = = 3.647

∗ ∗ ( − ∆ ) = = 4.570∡ − 33.13°

Since |S 11 | = 0.315 < 1, the unstable region is inside the intersection between the output stability circle and the smith chart as depicted below.

Output Stability Circle, |Γ | = 1 Smith Chart (unit radius) in

Unstable Region

C T=4.57 ∠-33.1 °

RT = 3.65

Figure 3.1 Output stability circle (for terminating network).

12

3.3 Input Stability Circle Characterization

Input Stability Circle (Generator Tuning Network):

= − ∆ = −0.096, = = 4.490

∗ ∗ ( − ∆ ) = = 3.613∡ − 160.82°

Since |S 22 | = 0.561 < 1, the unstable region is inside the intersection of the input stability circle with the smith chart as depicted below (includes center of smith chart).

Smith Chart Unstable Region

CG =3.61 ∠-160.8 ° RG = 4.49

Input Stability Circle, |Γ out | = 1

Figure 3.2 Input stability circle (for generator tuning network).

13

3.4 Negative Resistance Oscillator Design

In light of the above theory, first and foremost a Γ T was chosen from the unstable region portrayed in the output stability circle plot; such that it maximized the |Γ in | value (see figure below). This made it possible to get a sufficiently large negative resistance at the input port.

Γ = 0.999∡ − 36.00°, Γ < 1

Γ Γ = + = 1.138∡ − 18.26°, Γ > 1() 1 − Γ

Figure 3.3 |Γ in | (zaxis) vs. |Γ T| (xaxis) vs. ∠ ΓT (yaxis).

14

Input port Impedance:

1 + Γ Z = Z = + = −110.47 − 266.78Ω 1 −Γ Hence:

= + = − = 36.823 + 266.78Ω 3 Finally:

1 + Γ = = 0.26193 − 153.88Ω 1 −Γ

From the above obtained values, the corresponding ΓG and Γ out values were obtained as below.

− Z Γ = = 0.952∡20.85°, Γ < 1 + Z

Γ Γ = + = 1.048∡37.58°, Γ > 1 1 − Γ

Given that Γ G falls inside the unstable region in the input stability circle plot and since

|Γ G| < 1 and |Γ out |>1, the conditions for oscillation in the input and out ports were met automatically on the generator end as well.

15

3.5 Terminating Network Matching Circuit Design

From the previous section Γ T was found to be 0.999 ∠ 36.00° and hence ZT to be 0.262

153.88j . As a result the equivalent normalized impedance is:

1 + Γ = = + = 0.00524 − 3.078 1 −Γ

Figure 3.4 Smith chart for terminating network with load.

16

Referring to the above smith chart, an open shunt stub can be used to move from the resistive load of 50 (point L) to point A. The electrical distance from the said load to point A, in terms of wavelengths and degrees are:

= (0.25 + 0.004 ) = 0.254

= 0.254 × 360° = 91.4°

On the other hand, to move from point A to point B in the smith chart, a normal transmission line can be utilized. The electrical length of this transmission line, in wavelengths and degrees are:

= (0.300 − 0.004 ) = 0.296

= 0.296 × 360° = 106.6°

θAB = 106.6 °

B A L Z0 =50Ω

θ = 91.4 ° Z0 =50Ω R =50Ω LA L

ΓT = 0.999 ∠ 36.00°

Figure 3.5 Circuit for terminating network with load.

17

3.6 Generator Tuning Network Matching Circuit Design

Similar to the earlier design, for the generator tuning network Γ G was found to be 0.952

∠ 20.85 ° and hence Z G to be 36.82 + 266.78j . As a result the analogous normalized impedance is:

1 + Γ = = + = 0.736 + 5.336 1 −Γ

Figure 3.6 Smith chart for generator network.

18

A resistor with resistance 36.8 can be used at point G to achieve the resistive component of the generator network impedance. To move this resistive point to point A, an open shunt stub can be utilized of which the electrical length would be:

= (0.479 − 0.250) = 0.229

= 0.229 × 360° = 82.4°

On the other hand, to move from point A to point B in the smith chart, a normal transmission line can be utilized. The electrical length of this transmission line, in wavelengths and degrees are:

= (0.500 − 0.479 + 0.220 ) = 0.241

= 0.241 × 360° = 86.8°

θAB = 86.8 °

G A B Z0 =50Ω

θGA = 82.4 ° Z0 =50Ω RG =36.8Ω

ΓG = 0.952 ∠ 20.85 °

Figure 3.7 Circuit for generator network.

19

Chapter 4: Simulation Results

4.1 MATLAB Results

4.1.1 S-Parameter Conversion: Common Source to Common Gate

The data sheet of the chosen MESFET only provided the common source Sparameters for a range of frequencies between 2 to 18 GHz. Hence they had to be converted to the respective common gate parameters as reference for the equivalent ADS circuit measurement. Moreover, since the ADS simulation required Sparameters for a range of frequencies, MATLAB software was used to perform the functions provided in Section

2.4. The software was coded such that it read an s2p file of the original common source parameters and created a new s2p file with the final common gate Sparameters. Please refer to the appendix for the flow chart, code and output data of this program, the latter which was used in the figure under Chapter 4.2.3, as reference data.

20

4.1.2 Linear Analysis Calculations

The Linear analysis calculations were covered earlier in Chapter 3 however MATLAB was used to confirm these results. The program created was especially useful to swiftly check for transistor instability which was a crucial part in the design of the oscillator. The input and output data screen of the program is revealed beneath. Please refer to the appendix for the flow chart, surface plots (one plot used in fig. 3.3) and source code.

Figure 4.1 MATLAB I/O screen.

21

4.2 ADS results

4.2.1 ADS Transistor Model

Since an operating frequency of 14 GHz is required, choosing a MESFET with instability at this frequency was essential. Hence the NEC device NE72218 was chosen with common source S parameters leading to K<1. The first step was to model this transistor in ADS however the nonlinear model given in its data sheet was for the Libra IV simulation software (please refer to Appendix D). Therefore first and foremost, minor adjustments were made to the given model to match the same common source S parameter performance (See Fig. 4.2 below).

Figure 4.2 NE72218 MESFET nonlinear transistor model for ADS.

22

4.2.2 Bias Conditions and Common Source Configuration S-parameter Behavior

The above model was then added to the core of the below test bench (Fig. 4.3) to measure the common source S parameters. The gate to source DC voltage (V GS ) was set to 0 V (or grounded) and drain to source voltage (V DS ) to 3 V in order to draw a drain current (I D) of

30mA. The series capacitors connected to the gate, source and drain port, each act as DC voltage blocks preventing DC signals from entering the terminating and generator tuning networks respectively. Likewise, the series inductors at the drain and gate block AC current from entering the DC power supply and ground.

Figure 4.3 Common source configuration Sparameter test bench.

23

Fig. 4.4 below reveals the actual measured common source S parameters (at V DS 3 V &

ID = 30 mA, dashed line) with the above ADS test bench Sparameters (solid line) and demonstrates adequate agreement between the two.

Actual data ADS data

Figure 4.4 Actual (dashed) vs. ADS model (solid) common source Sparameters.

24

Furthermore, Figure 4.5 given beneath shows the simulation of the drain current (I D) versus draintosource voltage (V DS ) curves of the ADS model transistor, for different gatetosource voltages V GS = 0 V, 0.5 V, 1 V, 1.5 V and 2.0 V. The device evidently shows a linearly increasing current between VDS = 0 V to 1.0 V and is in saturation (non linear) beyond VDS = 1.5V.

Pinch -off Gate Length: 0.8um Gate Width: 400um Linear Saturation region region Vp = 1.25 V

Figure 4.5 ADS model I D vs. V DS plot.

Figure 4.6 and 4.7 exhibit the transfer characteristics of the MESFET transistor. The former plot indicates that the drain current increases exponentially with V GS in the range of 0.5 V to 1.41 V. The same property is exhibited in the transconductance plot in

Figure 4.7. In addition, the exponential regime of the drain current demonstrates evidence of a subthreshold voltage (leakage current). Conversely, the intersection point in the V GS

25

axis gives the threshold voltage to be approximately 1.41 V. Altogether, these plots present clear indication of a depletion device (normallyON device).

Additionally, the cutoff frequency (F T) can be obtained from the transconductance extracted from Figure 4.7 along with the gate to source capacitance (C GS ) acquired from the ADS simulation.

0.064 = = = 14 2 2 × 0.75 × 10

Hence the above cutoff frequency value agrees well with the simulation result.

Figure 4.6 ADS model I D vs. V GS plot for fixed V DS =3V.

26

Figure 4.7 ADS model Transconductance plot based on Figure 4.6.

4.2.3 Common Gate Configuration S-parameter Behavior

Since the above nonlinear model was established to have nearly equivalent behavioral characteristics of the actual transistor, it was then connected in the preferred common gate configuration as in Fig. 4.8. Although the DC biasing circuit was untouched, the S parameter measuring termination at the gate port was removed and connected to the source port instead.

27

Figure 4.8 Common gate circuit with series feedback.

However, unlike the common source S parameters earlier, the common gate Sparameters did not lead to an unstable system at 14 GHz. Hence a positive feedback inductor of 1.26 nH was added in series with the gate port (Fig. 4.8) to shift the transistor to an unstable state. Figure 4.7 shows the matrix converted actual common gate Sparameters (dashed line) derived from the respective measured common source parameters, against the S parameters obtained (solid line) from the above circuit. The slight difference is due to the small parity observed in fig 4.4 between the measured common source Sparameters and the ADS common source circuit Sparameters. However the Sparameters near the desired frequency are matched sufficiently well.

28

Actual data ADS data

Figure 4.9 Actual (dashed) vs. ADS model (solid) common gate Sparameters.

29

4.2.4 ADS Terminating Network Circuit

Assuming the terminating circuit is to be matched to a 50 load, a circuit with an ideal open shunt transmission line followed by a normal transmission line was designed as in fig 4.10. The transmission line characteristic impedances were assumed to be 50 and the electrical lengths used were in degrees.

B A L

Figure 4.10 Impedance measurement setup for the terminating network with load.

L A

B

Figure 4.11 Smith chart for terminating network with load.

30

4.2.5 ADS Generator Network Circuit

As per fig. 4.12, an open shunt transmission line was added alongside a resistor with resistance of 39 followed by a normal transmission line to achieve the above desired reactance. Fig 4.13 shows the corresponding impedance trail of the alleged circuit on a smith chart.

G A B

Figure 4.12 Impedance measurement setup for the generator tuning network.

B

G

A

Figure 4.13 Smith chart for generator tuning network.

31

4.2.6 Overall ADS Oscillator Circuit and Results

The Oscillator circuit below is simulated with the ADS Harmonic Balance Simulator together with a probe component called OscPort (Grounded Oscillator Port). The harmonic balance simulator is generally used to analyze nonlinear circuits in the frequency domain based on Fourier analysis. Alongside OscPort, it is used to accurately predict the relevant frequency spectrum and time domain wave form of oscillator circuits

[1] .

Figure 4.14 Overall ADS oscillator circuit.

Figure 4.15 below shows the power relationships of the first 8 harmonics for the above setup. As the spectrum undoubtedly shows, the fundamental spectral line at 14.02 GHz is the only harmonic with a positive output power of 28.8 dBm and the rest have negative values. This confirms that the device is producing oscillating power at only one frequency and that there is no power distortion from other harmonics. Furthermore the 2 nd harmonic power level is roughly 45 dBm below the fundamental (or the oscillating

32

waveform power) that implies good isolation. As a result, the envelope of the time domain signal at steady state in Fig. 4.16 is sinusoidal as expected.

Figure 4.15 Oscillator frequency spectrum.

Figure 4.16 Oscillator time domain signal (steady state).

33

The subsequent absolute noise spectrum (Fig. 4.17) obtained from Fourier analysis of the steady state signal (carrier mixing) shows that the wave form is affected with very little phase noise distortion with noise voltage at the center frequency being roughly 0.098 V.

Figure 4.17 Oscillator absolute noise voltage spectrum (around the fundamental).

Likewise, fig. 4.18 depicts the single sideband phase noise below the carrier frequency in dBc (decibels below carrier per 1 Hz of bandwidth). Hence for example at 10 kHz offset from the oscillation frequency of 14 GHz, the noise output is below 79.5 dBc and at 100 kHz offset it is below 97.5 dBc which is more than acceptable for high speed satellite data transfer applications. The NE72218 MESFET is a device with low flicker noise hence the oscillator also has good noise performance. The noise produced by an oscillator operating as a signal source should never be overlooked since it can severely downgrade the receiver selectivity and thus limit the overall channel allocation budget [3] .

34

Figure 4.18 Oscillator single sideband phase noise (around the fundamental) behavior.

In addition, the circuit shown beneath depicts the corresponding open loop response measurement setup using the ADS OscTest (Grounded Oscillator Test) probe. As the

ADS software manual states, it enables the measurement of the open loop gain or S(1,1) and phase of a closed loop system [1] .

Figure 4.19 Oscillator open loop response measurement setup.

35

Figure 4.20 Oscillator open loop response.

From the above graph it is evident that at the desired frequency of 14 GHz, the phase shift (dashed line) is zero and the respective open loop gain (S(1,1)) magnitude (solid line) is greater than one which is crucial for oscillation startup. Likewise since the gain magnitude is greater than one only for a small range of frequencies; this ensures that out of band oscillations (beyond 13.6 to 14.3 GHz) will not occur. The slope of the phase shift graph is negative and significantly steep that translates to good frequency stability with respect to phase shift. Additionally, since the open loop gain peaks at the phase zero crossing, optimal output power is achieved for the preferred frequency. Please refer to

Appendix C for the oscillator negative resistance simulation result.

36

Summary of Analysis

Below table summarizes all the key parameters used in this project obtained from 3 different methods namely; by hand calculation, MATLAB programming and ADS simulation. The error margins between the handcalculated values to the other 2 simulation values are overall extremely small and thus show perfect agreement between theory and simulation.

Parameter Hand Calculations MATLAB results ADS Simulation

ΓT 0.999 ∠ 36.00° 0.9990∠ 36.00° 0.99900∠ 35.99872 °

Γin 1.138 ∠ 18.26 ° 1.1381 ∠ 18.2558 ° 1.1041 ∠ 15.7669 °

ΓG 0.952 ∠ 20.85 ° 0.95207 ∠ 20.8548° 0.96409 ∠ 17.53768 °

Γout 1.048 ∠ 37.58 ° 1.0478 ∠ 37.5824 ° 1.0365 ∠ 37.0714 °

RT 0.262 0.26193 0.26193

XT 153.88j 153.8838j 153.8838j

θLA (Terminating ntwk TL) 91.4 ° NA 91.28 °

θAB (Terminating ntwk TL) 106.6 ° NA 106.72 °

Rin 110.47 110.4689 115.727

Xin 266.78j 266.7843j 321.816j

RG 36.82 36.82296 38.8775

XG 266.78j 266.7843j 319.4125j

θGA(Generator ntwk TL) 82.4 ° NA 83.06 °

θAB(Generator ntwk TL) 86.8 ° NA 88.01 °

Table 4.21 Summary Table.

37

Conclusions

A negative resistance oscillator in the common gate configuration was successfully implemented to oscillate at 14 GHz with an output power of 28.8 dBm. The 2 nd highest power spectral line or the 2 nd harmonic is 45 dBm below the fundamental and hence there is no observable harmonic distortion in the time domain output waveform. In addition, the open loop response S(1,1), depicts the oscillator to have a narrow bandwidth between

13.6 to 14.3 GHz which is stricter than the current satellite uplink requirements.

Moreover, the phase noise performance is such that at 100 kHz offset from the oscillation frequency, it is below 97.6 dBc which is more than adequate for high speed extraterrestrial data transfer applications.

Parameter Design Simulation Goal

Oscillator Frequency 14.00 GHz 14.02 GHz 14.00±0.4 GHz

Output Power NA 28.8 dBm > 25 dBm

Phase Noise (Single SideBand) NA 97.6 dBc/Hz at < 90 dBc/Hz at

100 kHz offset 100 kHz offset

Absolute Noise (at Fundamental) NA 0.098 V < 0.1 V

Table 4.22 Conclusion Table.

38

References

[1] Agilent Technologies (2011). Advanced Design System 2011 (ver. 10) Manual . Santa

Clara, CA: Agilent Technologies.

[2] Gonzalez, G. (1984). Microwave Transistor Amplifiers Analysis and Design .

Englewood Cliffs, NJ: PrenticeHall Inc.

[3] Pozar, M. D. (2011). Microwave Engineering (4 th ed.). Hoboken, NJ: John Wiley &

Sons, Inc.

[4] Radmanesh, M. M. (2009). Advanced RF & Microwave Circuit Design: The Ultimate Guide to Superior Design. Bloomington, IN: AuthorHouse.

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Appendix A: MATLAB Common source to common gate S-parameter conversion

Flow Chart Start

Prompt for Input Parameters: Input file name, inductance L of series inductor

No Input file found?

Yes Open input file, read frequencies & common source (cs) S-parameters

Convert to cs admittances (Y)

Convert to common gate (cg) admittances (Y)

Convert to cg S -parameters

Convert to cg impedances (Z) & add inductance L

Convert back to cg S -parameters

Output: Create new s2p file and write the new cg S-parameters for each frequency

End

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MATLAB Input Screen

MATLAB Input File (s2p)

Frequency Re S(1,1), Im S(1,1), Re S(2,1), Im S(2,1), Re S(1,2), Im S(1,2), Re S(2,2), Im S(2,2)

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MATLAB Output File (Touchstone File Format .s2p)

Equivalent ADS Common Gate S-parameters

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MATLAB Source Code

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Appendix B: MATLAB Oscillator Parameters Calculation

Flow Chart

Start

Prompt for input parameters: Enter the 4 common gate S -parameters

(Magnitude

Perform K and μ stability checks

Output: Display K, μ & Calculate input & output stability stability circle parameters circle parameters D, C, R D, C, R

Output: Surface plot G in vs G , display maximum Calculate max possible G in & T corresponding G T possible G in & corresponding G T

Calculate input & generator impedances Z in , Z g

Output: Display G g & G out , Calculate corresponding G g & G out surface plot G out vs G g

No Output: Display error K or μ < 1 message

Yes

Output: Display Z in , Z g & Z T

End

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Surface Plot of |G in | Vs |G T| Vs ∠∠∠GT (to obtain maximum G in )

Surface Plot of |G out | Vs |G g| & |G out | Vs |G g| Vs ∠∠∠Gg

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MATLAB Source Code

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Appendix C: ADS Oscillator Negative Resistance/Reactance Measurement

ADS Layout

ADS Resistance/ Reactance Plot

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Appendix D: MESFET Transistor NE72218 Data Sheet

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Appendix E: MESFET Transconductance Measurement Circuit.

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