Imperial College of Science and Technology
(University of London)
MICROCOMPUTER CONTROL SYSTEM
FOR
DIESEL ENGINES
by
S. Wijeyakumar BSc (Eng), DIC, MSc (Lond)
January, 1981
This thesis forms part of the requirements for the
Doctor of Philosophy degree of the University of London
Mechanical Engineering Dept
Exhibition Road
South Kensington
London SW7 2BX - i i -
TO
My Dad, Sister and Brothers and the memory of my Mother - i i i -
ABSTRACT
This thesis presents the details of a microcomputer
based controller intended for diesel engine test-beds.
It is based on a 16-bit TMS 9900 microprocessor and provides the necessary capability to conduct steady-
state and transient test operation. In addition, a
"Fail Safe" software alarm system is included to pro- tect the engine. A LSI-11 based microcomputer system, currently being developed, will provide the test-points to the above controller, control data-logging and pro- cessing and provide the user interface.
Detailed hardware design analysis of the controller (i.e. selection of microprocessor, ADC, DAC etc), and software construction based on a "Modular Programming" concept are described. Mathematical modelling techniques for engine- load dynamics, using continuous control theory and sam- pled data concept are outlined. Formulation of speed and torque control algorithms are presented.
For speed control, a proportional control algorithm is used and the integration is performed by the actuator, the stepping motor. This algorithm provides feedforward compensation for the anticipated load change demand.
A 3-mode controller is employed for torque control, with a sampling frequency of 20 Hz. Optimization of the controller is described. - i v -
To demonstrate the capability of the system, a part of the proposed 1979 US heavy duty diesel Federal Smoke and Emission Schedule, (to be implemented in 1983) was conducted. The results show high accuracy and repeatability. - v -
ACKNOWLEDGEMENTS
I wish to acknowledge Dr. N. WATSON for his constant encouragement and supervision of this work. My thanks are also due to MR. R.D. BLOXHAM for designing and constructing the Hardware of the Control System and
MR. C. HALL for setting up the engine test-bed. I am greatly in debt to MR. K. PATHMANATHAN for his invaluable help in preparing the diagrams of this manuscript. My appreciation is also due to MRS. SAKU
KARUNARATNE for her valuable contribution of a neatly typed text.
Finally, I wish to express my sincere gratitude to my brother DR. S. BALACHANDRAN for giving me this oppor- tunity to complete my studies. - VI -
CONTENTS
Page
NOTATION 1
CHAPTER 1. INTRODUCTION
1.,1 . Introduction and Background 5 1. 2. Microprocessor, Memory and Assessment 12
1.2. 1. History of Microprocessors 12
1.2. 2. Bus Architecture 14
1.2. 3. Memory 17
1.2.3. 1. Volatile Memory 18
1.2.3. 2. Non-Volatile Memory 19
1.2. 4. Assessment 20
1. 3. Microprocessor-Based Engine-Test Facility 21
1.3. 1. Control Module 22
1.3. 2. Data-Acquisition Module 24
1. 4. Objectives 27
1. 5. Outline of the Present Work 29
CHAPTER 2. SUMMARY OF PREVIOUS WORK
2. 1. Computerised Engine Test-Beds 35
2. 2. Microcomputers in Automotive Technology 37 2. 3. DDC (Direct Digital Control) System 42
2.3. 1. DDC Algorithms 43 2.3. 2. DDC System design 48
2.3. 3. Analysis of Sampling Rates 50
2.3. 4. Tuning PID Controllers 52
2. 4. Engine Modelling 53 - VII -
Page
CHAPTER 3. SYSTEM DESIGN ANALYSIS
3.1. Introduction 56
3.2. Microprocessor Selection 56
3.3. TMS 9900 Microprocessor 63
3.4. Microcomputer Control System
at Imperial College 64 3.5. Test Bed 71 3.5.1. Engine 71
3.5.2. Eddy-Current Dynamometer 73
3.6. Description of Subsystems 7 5 3.6.1. Speed Control System 75 3.6.1.1. Speed Control Interface 76
3.6.2. Torque Control System 8 3 3.6.2.1. ADC Selection 86
3.6.2.2. Torque Control Interface 91 3.6.3. Interrupt Control System 9 4
CHAPTER 4. THEORETICAL ANALYSIS
4.1. Introduction 96
4.2. Engine Load Dynamics 99 4.3. Sampled Data Model for Compression Ignition Engines 105
4.4. Review of Engine-Test System 108
4.5. Torque Control 110 4.5.1. PID Control 115
4.5.2. Modifications to Improve PID 119 4.5.3. Improved Derivative Action 121 4.5.4. Tuning of PID Control 123 - VIII -
Page
4.5.5. Effects of Sampling 126
4.6. Speed Control 130
4.7. Software Design Considerations 135
CHAPTER 5. CONTROL SOFTWARE DESIGN
5.1. Introduction 138
5.2. Modular Programming and Control
Software Structure 141
5.3. Key Features Unique to Programming
TMS 9900 151
5.4. Description of Control Software 154
5.4.1. Main Program 155
5.4.2. Shared Subprograms 171
5.5. Fail Safe and Alarm System 175
5.6. Program Development Tools 177
CHAPTER 6. EXPERIMENTATION AND EVALUATION 6.1. Introduction 17 9 6.2. Speed Control Implementation 181
6.3. Torque Control Implementation 187 6.3.1. Static Calibration 188
6.3.2. Dynamic Calibration 190 6.3.3. PID Control 195 6.3.3.1. Tuning of PID 195
6.3.4. Review of Torque Control System 198 6.4. Optimization of Torque Control 205
6.4.1. Basic PID 205
6.4.2. Modified PID-1 206 - IX -
Page
6.4.3. Modified PID-2 207
6.5. Proposed 197 9 USA Federal
Smoke and Emission Test 213
CHAPTER .7. CONCLUSION AND RECOMMENDATIONS
7.1. CONCLUSION 2 24
7.2. RECOMMENDATIONS 225
7.2.1. Speed Measurement 2 25
227 7.2.2. Speed Control
7.2.3. Torque Control 2 30
7.2.4. Digital Filtering 231
7.2.5. Software Development 2 31
REFERENCES 2 35
APPENDICES
APPENDIX 1. TMS 9900 Assembly Language and
Cross-Compiler 2 59
APPENDIX 2. Proposed 197 9 USA Federal Smoke
and Emission Schedule 274
APPENDIX 3. Curve Fit Routine 280
APPENDIX 4. Source listing of Control
Software 283
APPENDIX 5. Specification of Control and
Data logging system 339 - 1 -
NOTATION
SYMBOL
C : Coefficient of viscous damping th C' n : Controlled process output at the N sampling instant
C(s) : Output signal
f C(t) : Controlled process output at time 't 4- Vi
e : Error at the N sampling instant N
e : Steady state error
u O
e(t) : Error at time ' t'
E : BEC unit input (mV)
E(s) : Error signal
G (s) : Transfer function of Controller c I : Dynamometer stator coil current
J : Polar moment of inertia
K : Torsional Stiffness K : Controller gain c ^ K : Speed gain/torque at constant governor lever R posn.
Kgp : Speed controller gain
K : Speed gain/governor lever posn. at constant t torque
K^ : Derivative gain for 3-mode controller
K^. : Integral gain for 3-mode controller
Kp : Proportional gain for 3-mode controller
K : Torque gain/torque at constant governor lever R posn. - 2 -
K : Torque gain/governor lever posn at constant speed
L : Dead time th : Controller output at the N sampling instant
M(S) : Actuating Signal
N : Number of samples
R : Governor lever position
or max. open-loop reaction rate for unit-step
input
RCs) : Reference input
T : Torque (mKp)
: Derivative time constant
: Filter time constant
T. : Integral time constant l
T : Sampling period s
V : Initial off-set m
ft : angular speed
SUFFIX e : Engine d : Dynamometer f : Final i : initial
ABBREVIATION
ADC : Analoque to Digital convertor
ALU : Arithmetic logical Unit - 3 -
BEC : Brake Excitation Control Unit
CPU : Central Processing Unit
CRU : Communication Register Unit
CU : Control Unit
CUTS : Computer User's Tape System
DAC : Digital to Analoque Convertor
DDC : Direct Digital Control
DMAC : Direct Memory Access Controller
FIFO : First-in-First-out
FVC : Frequency to Voltage Convertor
GSCL : Governor Speed Control Lever
IAE : Integral Absolute Error
I.C : Imperial College
LED : Light Emitting Diode
LP : Line Printer
LSB : Least Significant Bit
LSI : Large Scale Integration
MSB : Most Significant Bit
MT : Magnetic Tape Unit
PC : Program Counter
PID : Proportional-Integral-Derivative
RAM : Random Access Memory
ROM : Read Only Memory
S/H : Sample-and-Hold
SMS : Stepping Motor Steps
ST : Status Register
TDC : Top Dead Centre
TTY : Teletype
UART : Universal Asynchronous Receive and Transmission - 4 -
VDU : Visual Display Unit
WP : Workspace Pointer - 5 -
CHAPTER 1
INTRODUCTION
1.1 Introduction and Background
Present trends towards stricter vehicle Exhaust
Emission Standards and sharply rising fuel costs
have intensified research and development programmes
in Automobile Manufacturing Industries. The prime
task is to make vehicles with low exhaust emission
and high fuel economy while maintaining acceptable
drive characteristics. The long-term task will be
a major redesign of present-day automobiles, with
emphasis on reduced size, weight, and alternative
powertrain systems (19).
This has led to a major increase in the demand for
diesel engines. Although diesel engines are attract-
ive due to their good fuel consumption, they are
not wholely without faults. In the past, diesel
engines have been developed mainly by trial and
error, combined with some inspired intution from a
few individuals.•However, the high cost of this
approach today, combined with the rapid changes
in Exhaust Emission Standards, has led to renewed
interest in understanding and developing of theo-
retical models of the most significant processes
involved in the engine system, especially under
driving conditions.
The complexity of some of these processes (e.g. - 6 -
Combustion) means that certain simplifying assump-
tions have to be made. To check the validity of
these assumptions, the overall accuracy of predic-
tions , and the effects of conventional trial and
« error development, large amount of data must be
obtained from test engines under a controlled envi-
ronment (speed and load). Diesel engines are usually
controlled by a speed governor and an applied load.
A simple reliable system, having the necessary res- ponse, stability, resolution and accuracy for speed
and load control is required. This system must be
programmable to conduct any required series of tests
or to simulate driving conditions.
The problem of data - acquisition in diesel engine
research is a complex one. This is impart, due to
the high rate of change of certain engine parameters
(e.g. cylinder pressure). As well as the high number
of engine variables needed to be monitored. Engine data may be classified in two catagories:
(i) Low-Frequency variables (e.g. brake load, Rack
position, boost pressure, Exhaust pressure, Air-
flow, Smoke density, Governor Setting etc.)
(ii) High-Frequency variables (e.g. cylinder pressure,
fuel line pressure, Needle lift, etc.)
Thus two separate data-acquisition systems are re-
quired, each capable of running at different speeds. - 7 -
This results in a high degree of flexibility and optimal utilization of system capabilities. For example, on a truck at full speed, fuel injection and combustion are completed in about 1.5ms. and
4ms. respectively. To measure such parameters, a specialised High-Frequency Data-Acquisition sys- tems is required.
Digital mini-computers (Minis) have faster process- ing cycle than that of an engine cycle, in addition to large data-storage capacities. From 1965 onwards
Minis became economically viable. They are small and cheap but are still capable of general purpose use. They are more rugged than their large counter- parts, requiring no special environmental conditions.
They are used in a wide range of applications, many .of which involve "Real-time" or "On-line" operations
(54). Many Minis, due to their "Real-time" applica- tions, have good "Interrupt" capability, a feature which allows rapid servicing of peripherals. These features of Minis appears to offer a solution to the problem of High-Frequency Data-Acquisition and Con- trol for engines on the test-bed during steady and transient operation.
The increasing interest in diesel engines has led to a rapid expansion of research work at Imperial College
(I.C). At I.C, to improve the accuracy, scope and speed of engine testing, a versatile mini-computer - 8 -
(•DEC PDP-I5) based engine-test facility has been deve-
loped. This in turn aids both existing development and
research methods, and the construction of advanced theo-
retical models. The system has been running for a period
of ten years, with gradual improvements and additions
being made in that time. Both steady-state tests and
transient "in-vehicle" simulations are routinely con-
ducted on engines (14,81,82)
Engine Speed is measured from an angular position
encoder connected to the crankshaft of the engine by a
flexible but torsionally stiff coupling. A digital
buffer is used to store the count from a crystal clock
•measuring the interval between successive once per
revolution pulse from the crankshaft encoder. The digi-
tal buffer is updated once per revolution. Thus speed
measurement is continuously available to the computer.
.A flag system is used to prevent the computer reading
speed more than once per engine revolution and disrup-
ting the control system.
Speed is controlled via the governor speed control lever
of the engine. The lever is connected to a stepping motor
via a reduction gearbox. According to the computer demand,
the Stepping Motor Control Unit selects any one of the
two pre-set speed rates (1087 or 3850 steps/sec.) and the
direction of motion (Clockwise or anti-clockwise) of the
motor (Fig. 1.1). - 9 -
An Eddy current dynamometer is employed to load the
engine. The excitation level can be adjusted manually
or by the computer via a Digital-to-Analoque Conver-
tor (DAC), a three-term analoque control unit and a
Thyristor Control Unit. Load torque is measured by a
strain guage load cell resisting rotation of the
dynamometer stator. The output of the load cell is
available to the computer via an Analoque-to-Digital
Converter (ADC) (Fig. 1.2).
The £DP-15.is interfaced with a Visual Display Unit
(VDU), Teletype (TTY), Line printer (LP), ON-Line
and OFF - line Data Acquisition Units, and a Magne-
tic-Tape Unit (MT). ON-Line and OFF-line Data Acqui-
sition units have been used to monitor low-frequency
and High-Frequency engine variables respectively
(Fig. 1.5). They can operate at a sampling rate of
up to 50kHz and 250kHz respectively.
It has been seen that unlike most computer test-beds
(where the computer merely supervises analoque con-
trollers for engine speed and dynamometer torque),
the Imperial College PDP - 15 functions as an adap-
tive controller for engine speed and supervises a
three-term analoque control unit for the dynamometer.
Ref. (13, 14, 63-65, 83) gives full details of the
system.
The emergence of present-day microprocessors, has made - 10 -
Shaft V Encoder e
Stepping Motor Contrj Unit
Stepping Y Stennirg ' Motor Drivef • Unit Motor
Fig. 1.1 Schematic of Speed Control System
Manual Control
3 Term Thyristorj Eddy-Curre- X nt Dynamom- Control Control eter Unit Unit Load Cell
TQ vJT Me ter
Fig. 1.2 Schematic of Torque Control System - 11 -
a major impact on the computer market. A micropro- cessor may be defined as a single Chip "Large-Scale-
Integration" (LSI) Component, incorporating the functions of an Arithmetic-Logical Unit (ALU) plus its associated Control Unit (CU). Its main impact is not felt in its rivalry with traditional compu- ters and tasks but in its ubiquitous applications.
Their miniature sizes (it occupies no more space than one or two conventional components) and low cost, made it possible to infiltrate all manner of host devices, instruments, and machines, giving them entirely new diamensions of sophisticated capability.
These features led to the development of a Micro- processor-Based Engine-Test facility currently in progress. It comprises a Control and a Data-Acquisi- tion Module.
The Control Module, the subject of this thesis, per- forms the control functions (speed and load) for the test engine. It is based around a Texas TMS 9900,
16-bit microprocessor (ref. Section 1.3.1).
The Data - Acquisition Module, currently being deve- loped is based on an LSI - 11 microprocessor. It has the capability of data-logging high-frequency and low- frequency signals from the test engine, during steady- speed and transient operation (ref. Section 1.3.2) .
An overview of the complete system is presented in section 1.3. - 12 -
A comprehensive survey bf microprocessors and their
limitations, with respect to this application, is out-
lined below.
1.2. Microprocessor, Memory and Assessment
1.2.1 History of Microprocessors
Since the arrival of LSI technology at the end of
1960's, transistor packing densities of up to
.15,000 on a single chip has become possible (a
typical microprocessor contains over 3,000 tran-
sistors) . ZAKS (138) points out that the evolution
of microprocessors was not due to advanced planning,
it was accidental. Due to this unplanned and dis-
orderly introduction of microprocessors, their
initial design defects and inadequencies have been'
carried until today, for the sake of compatibility.
Many of the defects of present-day microprocessors
are the results of this background.
In late 1971, Intel introduced the first "General
Purpose" microprocessor (the Intel 4004). It was
primarily designed for use in Desk Calculators. Hence,
it was not very powerful and was inadequate for
general purpose computing. In 1972, Intel launched
a second generation microprocessor, the (8-bit)
8008. It was slow. As a result, when the 8008 was
introduced, its market did not look promising. But
to the surprise of the manufacturer, Sales of the - 13 -
'8008 started increasing rap-idly. A year later, this
led to the successor of the 8008, the 8080. Most of
the leading microprocessors (the Motorola 6800, Rock-
well PPS-8, Signetics 2650 etc.) now on the market,
were inspired by the early design of the 8080.
The third generation of microprocessors have now been
designed, the Zilog Z-80, the Intel 8085 and the new
1 - Chip microcomputers (the Fairchild F-8, Rockwell
PPS - 4, the TMS 1000 and 9940 from the Texas Instru-
ment) . For further reading see Reference (138).
A wide range of LSI technology is used in manufacturing
a Microprocessor. Table 1 shows the relative merits of
some LSI techniques widely used today.
TABLE 1 Relative Merits of LSI Technology
LSI Speed Density Power Application Technology (Comp/Chip)
PMOS 1 3 1 Widely used
NMOS 2 + 3 + 2 Widely used
*CM0S 2 2 1 - Avionic Aero- space
BIPOLAR 3 1 3 Bit Slice Devices
* EXCELLENT NOISE IMMUNITY.
-1 - Low/Slow 2 - Medium ; 3 - High/Fast - 1-4 -
-1.2.2 Bus Architecture
There are two types of buses; namely "INTERNAL"
and "EXTERNAL". In this section, the Internal bus
will be considered. The three essential buses of
any microprocessor system are ?
(i) Data - Bus (8 - bit)
(ii) Address-Bus (16 - bit)
(iii) Control-Bus (includes typical signals; Read,
Write, Interrupt, Reset, etc.)
The most significant bus in a system (that which
defines its architecture) is the Data-Bus. Inter-
nally, a system is said to have a "SINGLE", "DUAL"
OR "TRIPLE" bus architecture, according to the num- ber of internal Data-Buses that it uses. An easy
way to distinguish between internal processor
architectures is by counting the number of buses
used to communicate between the registers and the
ALU. The large majority of microprocessor chips on
the market today implement the same architecture
namely "SINGLE - BUS" OR "STANDARD-BUS". A single-
Bus architecture is described as illustrated in
Fig. 1.3. - 15 -
DATA - BUS
Fig. 1.3 SINGLE - BUS ARCHITECTURE
As seen in Fig. 1.3, data is brought from registers to
the ALU and the results of an operation performed by the
ALU are deposited on the same Data-Bus. The Data-Bus is multiplexe• d with respect to time. As a result, Single- Bus architecture is slow in operation, but the essential
advantage is that it requires the least bus area. On a
chip it saves space. This is an important factor today for
the implementation of microprocessors. As a result, most microprocessor chips today use a Single-Bus or Standard-
Bus architecture.
In order to improve the execution speed of a processor, certain manufacturers use Multiple-Buses.
There are basically three constraints imposed on the - 16 -
implementation of microprocessor architecture. They
are :
(i) 40-PIN LIMITATION
This limitation results from economic reasons,
due to the fact that industrial testers will not
accept packages having more than 40 to 42 pins.
The impact of this limitation is :
(a) Data-Bus requires 8 pins
(b) Address - Bus requires 16 pins
(c) Power Supply requires 2 pins
(d) External Clock 2-4 pins
Total : 28-30 pins
So the balance of only 10 to 12 pins are available to the Control-Bus. The lack of available pins, seriously limits the capability of the Control-Bus.
This means that 16-bit microprocessor cannot be efficiently implemented in a 40-pin package (i.e. it cannot communicate with outside via a 16-bit
Data-Bus). As a result, the Data-Bus has to be multiplexed. First, the low part of the data will be input/output, and then the high part. Such a 16 bit microprocessor will not be significantly faster than a 8-bit one and notably more complex to use
(ii) CHIP AREA
In view of the limits on the density of integration that can be achieved by present-day technology, the number of functions which must be implemented in the - 17 -
limited chip area available should be as high as possible. It has been shown that this constraint has led to the implementation of Single-Bus archi- tecture .
(iii) SPEED OF EXECUTION
This constraint is due to the limited speed of LSI technologies (PMOS, NMOS, CMOS etc.) currently used to obtain the required density. The maximum speed is currently one microsecond for the execution of a typical instruction. The Major progress will have to be made in the technology in order to obtain faster execution times.
As a result of the above limitations, four significant, architectures for microprocessors have evolved (13 8)-.
. STANDARD-BUS or SINGLE-BUS architecture
ONE-CHIP microcomputer
TWO-CHIP microcomputer
. BIT-SLICE
The most MOS microprocessors (PMOS, NMOS, CMOS etc.)
tend to use a fixed word length within the integrated
circuits. The common variants are 4 - bit, 8-bit and
16-bit devices. A full description of microprocessors
can be found in reference (138).
1.2.3 MEMORY
Two types of memory are used in microprocessors - 18 -
systems ?
(i) VOLATILE - the contents of the memory are
lost whenever power disappears.
They can be easily altered by
the processor.
(ii) NON-VOLATILE - the contents of the memory are
not lost whenever power dis- appears. Once the contents of
the memory has been defined by
a manufacturing process, it
cannot be easily altered by the
processor.
MEMORY
VOLATILE NON-VOLATILE
STATIC-RAM DYNAMIC-RAM ROM, PROM EPROM EAROM
Fig. 1.4 TYPES OF MEMORIES
1.2.3.1 Volatile Memory »
(i) STATIC - RAM
It stores a bit of information within a flip-
flop and does not require a clock. Its contents
remain stable as long as power is available. - 19 -
(ii) DYNAMIC-RAM
It stores a bit of information as a charge.
Due to leakage of this charge (as in a capa-
citor) , it is necessary to refresh it every
1 or 2 milliseconds. The chip density is high
due to its small elementary cell.
1.2.3.2 Non-Volatile Memory
( i) ROM
A Rom is a mask-programmed read-only memory. It
can only be produced by the manufacturer. The
bit patterns corresponding to the desired
"programming" of this memory must be supplied
by the user in a standard format.
(ii) PROM
This can be programmed directly by the user,
using a special PROM—Programmer. This cannot be
re-programmed.
(iii) EPROM
These memories can be re-programmed a number
of times. They can be;erased either by ultra-
violet rays or electrically.
(iv) EAROM
This may be qualified as a "read-mostly"
memory. The EAROM can be programmed, but this
operation requires a millisecond, while the
read operation can be performed in a micro-
second. It uses complex technologies resulting - 20 -
in low density.
1.2.4 ASSESSMENT
It can be concluded that with microprocessors, the
designer has the choice of deciding on his own
system architecture and layout. In the case of a
ready made system, it is bound to a large degree
« by the manufacturers own concept of system design
(i.e. it may include hardware facilities that are
not useful for the application in hand). The de-
signing of one's own system from scratch has
several advantages;
(i) Reduced volume and miniaturization of the
system
(ii) Reduced power consumption (power supply
can represent a fairly large percentage of
total system cost).
(iii) Reduced power dissipation,
(iv) Fewer interconnections results in increased
reliability
However, the present range of products available in
the microprocessor field cover a broad range of
different levels of systems. At the other extreme
from the basic microprocessor one can obtain a
complete ready built package equivalent to the mini-
computer system. The middle of the range was selected
for the development of THE CONTROL MODULE (controls
speed and load) for the Microprocessor-Based engine - 21 -
test facility (ref. Section 1.3).
Evidently there are some constraints on the variety
of system architecture that can be achieved. However,
the system can be expanded on a building block basis.
In this development procedure, time and cost can
be kept to a minimum whilst still allowing consider-
able scope for optimization of the design.
1.3 Microprocessor - Based Engine - Test" Facility.
For economic reasons, it was decided to replace the
mini-computer based engine test facility at Imperial
College by a microprocessor-based system of similar
capabilities. This changeover is planned in two
stages. The first stage, now completed and the sub-
ject of this thesis, is for a microprocessor to take
over the engine control functions, with the current
mini-computer retaining the data-acquisition and
processing functions. At the second stage, currently
in progress, a second microprocessor will take over
the latter functions, managements of steady and
transient test programs through the first micropro-
cessor. In addition, it will perform the loading of
control software via a serial communication line to
the Control Module. To permit fast communication
between processors during engine testing (especially
for transient scheduling), a parallel 16-bit communi-
cation line will be employed. The design policy is
to minimize system delays (e.g. Communication etc.) - 22 -
economically, wherever feasible. Fig. 1.6 is a
block diagram on the complete system.
±•3.1 Control Module
The control module is based around a Texas TMS
9900, chosen for reasons of word length (16-bit,
required for accuracy of control) , throughput,
program compactness, internal architecture, peri-
pheral capability and cost.
For engine speed measurement, a moire fringe incre-
mental digitizer, on the engine crankshaft is used.
Three output tracks are available, one giving a
single output pulse once per revolution, and the
others giving 720 pulses per revolution at 90°
to each other.
A digital buffer is used to store the count from a i crystal clock measuring the interval between succ-
essive revolution pulses, this being updated once
per revolution. Thus speed measurement is conti-
nuously available to the computer, and the value does
not suffer any serious errors that could have been
introduced by conventional techniques (e.g. tacho-
generator ripple, non-linearity'in analoque ampli- i fier etc.).
The engine is controlled by a Governor Speed Control **
Lever (GSCL). For fast and fine control of the GSCL,
a stepping motor is used via a reduction gearbox. The - 23 -
computer estimates the number of pulses needed to
be issued by the processor, to achieve the desired
•angular movement of the stepping motor. The soft-
ware controls the pulse rate and this renders a
high degree of flexibility in controlling the
stepping motor.
The engine is loaded by an eddy-current dynamometer.
The excitation level can be adjusted manually or
by the computer via a Digital - to-Analoque Conver-
ter (DAC) and a thyristor control unit. Load torque
is measured by a strain gauge load cell resisting
rotation of the dynamometer stator. The output of
the torque measuring bridge-amplifier is available
for recording and closed-loop Direct Digital Control
(DDC), using a specially adopted discrete version ,
of a Proportional-Integral - Differential (PID)
algorithm (ref. Chapter 4). It has been found that
the response and accuracy of the DDC system is quite
adequate for normal transient driving cycle engine
tests.
A software alarm system is also incorporated, using
discrete interrupts to register low oil pressure,
high oil temperature and high water temperature.
The limits for these parameters are pre-set. Any
single limit excursion initiates an emergency shut-
down procedure. The emergency procedure activates
the Shutdown and displays the cause on a Visual
Display Unit (VDU). In addition, two interrupts - 24 -
prevent the stepping motor from indexing the GSCL
beyond its idle and maximum speed limits.
A teletype and cassette recorder were used for
system development in isolation from the master
computer.
1.3.2 Data - Acquisition Module
A comprehensive computer system was selected for
data acquisition and test management. A DEC LSI-11
was chosen as being the most suitable 16-bit micro-
processor with good software back-up at the time of
project initiation. This module will be interfaced
to the improved version of the existing ON-Line and
OFF-Line Data-Acquisition units, a VDU, dual hard
Disc, DEC - Writer, Direct Memory Access Controller
(DMAC) and a magnetic Tape Unit (MT) for data trans-
fer to a Central College Computer for graph plotting
etc. In addition, a set of digital registers are
used to record parameters such as turbocharger speeds,
engine revolution count and real-time for transient
tests.
(a) On-Line Data-Acquisition Unit
This is a medium speed 10-bit ADC serving thirty-
two channels with a sample-and-Hold. Input channel
multiplexing selection is controlled by the
computer. The ADC contents are shifted to a - 25 -
digital buffer raising'a flag to indicate readiness for computer reading. The ADC conversion is tri- ggered by an external pulse generator, and the data is read by the computer when needed. This unit can operate at a sampling rate of up to 110 kHz.
(b) Off-Line Data-Acquisition Unit
The system was configured around a fast ADC (1.2 yes), Sample-and-Hold, input channel multiplexer and an 8K "Rotating" memory preceded by a First-In-First- Out (FIFO), 256 word buffer. An addressable sequence generator controls miltiplexing of any number of consecutive channels from 1 to 8 inclusive, sam- pling, conversion, and subsequent storage in the 8K store. The recording mode is initiated by selecting the multiplexing sequence and setting of the downcounter for the required word count. The Data-Acquisition Unit is then free to record data without interruption from the Computer during a controlled transient test. The computer interro- gates a flag for completion of recording and for data transfer to the computer memory via DMAC. This unit can operate at sampling rate of up to 600 kHz.
(c) Data-Acquisition Control Unit
This unit was designed to synchronize cata-acquisi- tion relative to the angular position of the crank- shaft of the engine, and to vary the resolution and intermittency of recorded data. Thus the unit - 26 - permits recording of discrete parts of individual engine cycle (e.g. injector needle lift only around the period of injection). And also allows data- logging over cycles in a defined manner (e.g. cycles can be skipped) during transient testing.
A comparision of the new microprocessor based engine test facility at Imperial College with the older mini-computer based system is as follows :
(a) Advantages
(i) Low capital cost, maintenance and running cost (ii) Flexible control loops (speed and load) (iii) Flexible software control for stepping rotor (iv) Software alarm system
(b) Disadvantages
(i) Slow processing speed of data. - 27 -
1.4 OBJECTIVES
The evolution of microprocessors has made the dedi- cated type computer economically feasible for engine control (mainly speed and load) on test-beds. The advantages of the computer over analoque controllers are :
(i) increased flexibility in the design, modifi- cation, and expansion of the control system (ii) the capability of interactive communication with other controllers or monitors (iii) automatic logging and display of engine sta- tus and data (iv) the detection of abnormal conditions and exe- cution of discrete emergency shut-down and warning procedures
The main object of .this project is to develop a workable microprocessor control system for engine test-beds. This work consists of the following elements :
(i) System design analysis :
(a) Microprocessor selection
(b) Interface requirements based on the
control methodology (c) Defining Interrupt structure for software alarm monitoring, governor lever position limits etc. (see Chapter 3) (ii) Theoretical formulation of control loops - 28 -
based on the transformation of certain engine processes with respect to dynamometer torque and engine speed. (see Chapter 4)
(iii) Development of experimental control algorithms and optimization (see Chapter 5 and 6)
(iv) Implementing the 1979 proposed USA Federal Smoke and Emission test, to be enforced in 1983 (see Appendix 2). - 29 -
1.5 Outline of the Present Work
From a control point of view, engine test-beds can be considered as multivariable control systems because they have, in general, more than one input and output (116). Initially, the control system for the Imperial College engine test-bed was decoupled into two independent control loops (speed and torque) and then treated separately. This is being done on the basis that the cross-coupling or inter- action between feedback loops is weak, relative to the desired control performance. In other words, decoupling means that each input must affect one and only one output (See Section 4.3).
For speed control (assuming that the dynamometer torque (T) and the governor lever position (R) are completely independent variables and uniquely define the running speed of the engine and dynamo- meter shaft (ft). ) the equation of state becomes
(65) }
ft = f (R,T) (1.1)
For small perturbations to ft and T, the Eq. (1.1) may be written ;
dft = 5ft J . dR + . dT 6R I /T R - 30 -
6ft dT (1.2) i.e. dR = dft - <5T R
Thus the problem of engine speed control is governed by the Equation (1.2). Simple relationships were estab- lished for the torque sensitivity ( /6ft ) and the 6T governor lever position sensitivity (_5R) • 6R
Torque control is achieved by utilising the* interrupt facility of the computer system used here. There are eight prioritized interrupt levels available and Level 13 is used by the torque control system. The other five higher levels are utilised by the software alarm system (high oil temp., high water temp, and low oil press.) and the governor lever limits (idle and max. speed) . A hardware R-C oscillator interrupts level 13 every 0.05 sec to activate the torque control software. The consequence is that the torque control routine can only be scheduled by enabling or disabling the interrupt level 13. Thus the torque control software is an interrupt driven routine (See Chapter 5).
Three models were investigated to establish an optimum control criteria, for eddy-current dynamometer systems. The control algorithm is mainly based on a widely adopted - 31 -
digital version of PID. The "rule of thumb" of ZIEGLER and NICHOLS1 (139) is the basis for tuning the PID.
The rules were developed from ZIEGLER'S experiments on
1 various processes and NICHOLS analysis. The criterion
for optimum performance is the minimization of the Integral
Absolute Error (IAE),
00 1 IAE = / {e(t)| dt where e(t) is the error at time 't . o
evaluated for a free unit-step response which starts
from an equilibrium state (116).
A successful control criteria has been achieved for
controlling test-bed engines. This method can be extended
to any diesel engine and eddy-current dynamometer system.
This is the major contribution by the author in this project.
The design policy has bean to develope simple and flexible control algorithms, so that they can be easily maintained.
A modular program development strategy is adopted. Each module performs a basic function such as read speed, or read torque, or set excitation voltage for the brake, or a more sophisticated job. Each module is written in the
TMS 9900 Assembly Language for minimum storage requirements and real-time usage of the computer (See Chapter 5). - 32 -
The softv/are development has been carried out using a PDP-15 mini-computer. The author has developed a cross-compiler using standard Fortran iv language for this purpose. The input to the cross-compiler is a TMS 9900
Assembly language source program and the output will be the binary code of the compiled source program. This is punched on paper tape (see Appendix 1 for full details of the compiler).
The TMS 9900 microprocessor system is interfaced to a
Teletype and a domestic type cassette recorder as shown in
Fig. 1.6. The object code on the paper tape is transferred to the processor memory via the paper tape reader of the teletype. Programs can be stored on the cassette recorder for later use. - 33 -
or. g 1 c • StrpplEf L.F. B.F. Er.ti. vrbo- Coctrol Logging Spr. 1 liotor *urbo- ADC Sp.t.m ch.rftr Logic -or t rol Mr i.'jrt Cor t rol cK»Jg.r £p» e d Icit rent Logic (or?-UrEoOK-LIICE) L. j. » • d Logic Logic Logic
Elgn»l CoDdltlonlEg
Gor.nor
lntarnfe] Cocbuatlon ijigicc
Fig. 1.5a PDP-15 Based Engine Test Facility Schematic.
Fig. 1.5b Photograph of PDP-15 Based Engine Test Facility. Fig. 1.6 Microprocessor Control and Data Acquisition System Schematic. - 35 -
CHAPTER 2
' SUMMARY OF PREVIOUS WORK
2.1 Computerised Engine Test-beds
The desirability of using computers to control and monitor engine test-beds has long been estab- lished, based on economic grounds and testing procedure (i.e. testing time, accuracy, repeata- bility etc.). Most of the computerised test-beds (using minicomputers or main frames) currently being used, fall into one of three major categories. They are as follows ;
(i) The computer is used in a supervisory mode to manage local analogue controllers for engine speed, load etc.
For example, the engine test-bed developed at Queen Mary College (55, 111), uses analoque controllers to service engine speed and load. This system is based on a General Automation S.P.C. 16 computer. It can service more than one test-bed on a priority interrupt basis. That is a high priority bed will be serviced before a low priority bed and low priority beds may be sub- jected to delays. As the computer is called upon to service more and more engines, there will come a point where delays will become appreciable and undesirable. On this basis, it was found that the - 36 -
computer should be able to service at least twelve engines simultaneously before delays become a problem.
It is worth noticing that this figure will depend upon the complexity of the test routines that are called for.
(ii) In this category, the computer is used as part of the control loop for speed, load and other engine para- meters. That is, the computer directly performs the control action.
This type of system is not economical for a single test-bed. As illustrated by DUNDAS et. al. (23), the computer at ESSO Research centre can service more than one engine on a time sharing basis. This system is based around a FERRANTI ARGUS 500 Computer, which is designed to scan all parameters on every engine for 20 ms/sec, giving a system capacity of 50 engines. To give suffi- cient time for multiplexer switching and settling, the system is divided into two sets of data lines A and B.
That is, while one data line is switching and settling, the other is processing information. A coded signal is simultaneously sent from the computer on six lines to system A engines every 40 ms. Similarly system B engines receive a coded signal every 40 ms. The two signals are displaced in time by the use of two computer interrupts
3 ms apart repeating every 10 ms. This system uses three types of controllers ?
(a) Closed-loop 3-mode control
(b) Closed-loop ON/OFF control - 37 -
and (c) Open-lQop ON/OFF control
(iii) In this,the computer directly controls certain
engine parameters and manages local analoque controllers
for other parameters.
In the PDP-15 based engine test-facility at Imperial
College, the computer controls the speed directly and
provides a set-point to an analoque controller for torque
(13, 14, 65).
As seen from the foregoing discussion, flexibility of
all three categories are limited either by
1) hardwired analoque controller
or 2) sharing the computer time
The advent of low cost microprocessor provides the
necessary capability to make the above systems more
flexible, which is the subject of next section.
2.2 Microcomputers in Automotive Technology
The need to reduce fuel consumption and exhaust
emissions of vehicle engines, have presented automobile
manufacturers with a formidable task. The immediate
task is to improve the performance of existing vehicles
while a long-term task will be a major redesign of
present-day automobiles, with emphasis on reduced size,
weight etc.
The first task identifies the need to have accurate - 38 -
'and flexible governing of engine to increase fuel
economy and reduce exhaust emissions. For example, in
diesel engines the amount of fuel and injection time
can be controlled according to speed and load demand.
This type of governing is beyond the capability of non-
electronic control systems (eg. pneumatic, hydraulic
and mechanical). However, the advent of low cost
microprocessors has made this type of governing viable.
The second task emphasise the nees to have a sophisticated
versatile and accurate engine test facility, to monitor
and understand the significant processes involved within
the engine system especially under driving conditions.
The majority of engine test facilities currently being
used are combinations of digital computers and analoque
controllers. Present-day microprocessors provides the
necessary flexibility for replacing analoque controllers,
which were not possible before.
Some examples are provided for both tasks.
A microprocessor controlled distributor type fuel injec-
tion pump, currently being developed by LUCAS-CAV, is des-
cribed in ref. (145') . The optimum fuel delivery curve
for the engine, as a function of speed, and the injection
timing map as a function of both speed and load are held
in the memory of the microprocessor. According to the
driver's demand, the optimum settings for fuel delivery
and injection timing are generated by the processor, using
the engine characteristic maps and also taking into - 39 -
account other engine parameters such as engine tempe- .
rature etc.
The Ford Motor Co. introduced the first multivariable
Control system for automobile engine control based on microprocessor technology (71). The control strategy
was based on the minimization of fuel consumption
subject to fixed constraints on the total amount of
HC, CO, and NO emitted for an arbitrary driving cycle. X
From a control point of view, LAURENCE (71) listed
the engine variables into following ;
Cl) Engine State Variables - Engine speed, net engine
torque, intake air flow
(2) Engine Input Variables - Accelerator position, road
load engine torque
(3) Engine Control Variables - Spark timing, air-fuel
ratio, exhaust gas
recirculation (EGR)
(4) Engine Output Variables - Fuel consumption rate, HC
emission rate, CO emission
rate, NO emission rate
(5) Engine Observables - Engine crankshaft position
and speed, engine manifold
vacuum, exhaust gas flow
rate throttle position
As a first approximation, engine dynamics v/ere ignored
and the control formulation was based in terms of
steady-state behaviour. This system is based around - 40 -
a 12-bit microprocessor. This article concludes that
the major limiting factors for this system are the
sensors and actuators. That is the problem of pro-
ducing good quality, highly reliable sensors and
actuators at reasonable cost for the automobile environ-
ment.
CECI et. al (19) outline software production method
adopted at Ford to develop microprocessor based engine
control system. These microprocessor controlled cars
created a new problem. That is a special test system
is needed to diagnose problems within such cars.
PELTA et. al (98) describes a microprocessor-based
automatic diagnostic device for such engines.
ATHANS (5) discusses the importance of modern multi-
variable control theory to the design of advanced control
systems for future automotive engines. Specific areas
include static and dynamic optimization, multivariable
stochastic estimation and control, and realiability
issues. CHENEA (20) outlines how systems engineering
methods are used at the GM Research laboratories to
explore electronic engine control research problems.
SOLIMAN et al (112) describe in some detail the way in
which a microprocessor could be used as the main ele-
ment in an engine testing automation scheme. This paper
falls into two parts. The first part examines the
relative merits of the microprocessor system when com-
• pared with a conventional minicomputer. The second part - 41-
of the paper is primarily concerned with the appli- cation of microprocessors to the automation of engine testing as a replacement for minicomputers. Specific areas include the use of minicomputers in a supervisory mode and the use of microprocessors in dedicated control and data acquisition tasks such as their use as 3-mode controller, alarm monitoring etc.
H1GASHIN0 et. al (144) describe a multi-microprocessor based engine test facility. To augment the slow process- ing speed of microprocessors, parallel processing tech- nique are adopted. A host microcomputer controls 3
slave microcomputers. Each slave computer has a small amount of memory itself, but main memory is common to all computers. In the case of parallel running of com- puters, the host computer commends and assigns other
slave computers to obtain, measure and calculate the data, according to the given requirements.
MANN (143) describes the hardware structure and design of a general-purpose microprocessor (F100-L) based
controller intended for the control of gas turbine and diesel engines in ground based vehicle and industrial applications. The input/output to the system is in
analoque form. This paper also describes the non-
linearity introduced into the control algorithm by the
step change in values induced by the least significant bit of A-D or D-A converters.A minimum of 12-bit resolution
was recommended. - 42 -
A microcomputer controlled engine research and testing
facility is described by GERMANE et. al (142), which
has the capability of motoring the engine via a hydrau-
lic motoring system. Three-mode controllers were used
for controlling speed and load of the engine with a
sampling period of 0.5 sec. The test-bed contains a
2 302 in V-8 passenger car internal combustion engine
and it is loaded by an inductor type dynamometer. This
system is described as capable of conducting any
arbitary driving cycle. But, however, that the slopes
of all the schedules shown are very slow compared with
the requirements at Imperial College (see Section 6.5)
ROGORA et. al. (147) describe the engine test-facility
developed at Alfa Romeo S.P.A, Italy. A "master"
computer (PDP-11) controls four microcomputers (Intel
8085), which use a shared RAM area for data storage and
access. Each processor performs a specific task. For
example, one processor carries out data acquisition,
processing and storing the data in the shared RAM area,
while the other two processors perform the function of
fuel injection and spark advance control, using the
stored data and engine characteristic maps. The fourth
processor displays the significant engine parameters
continuously on a VDU.
2,3 DDC (Direct Digital Control) Systems
In 1958, YETTER et. al (137) were investigating the
potential of using multiplexed digital computers in - 43 -
place of conventional single-loop controllers.
To establish a basis for an economic comparison
between the digital and analoque systems, a differ-
ential estimate was made in one of their newly
constructed industrial plants. This plant has
150 control loops, and uses analoque controllers
located in a central control room. About half
of the controllers are strip-chart recorders,
the rest are indicators only. The digital system
would substitute for all the controllers, the
indicators, the alarm and the valve actuators.
They anticipated a cost reduction of 61% on
controllers alone. The first plant scale experi-
ments of DDC concepts were made in 1962 by Imperial
Chemical Industries Ltd, and the Monsanto Company
(23). During this short period DDC has grown
rapidly and created controversy over the best
methods of implementing. One important contro-
versy concerns "Control Algorithms", or the
digital representation of the actions of analo-
que controllers.
The next section presents some of the results
from the above controversy and recent develop-
ments in DDC algorithms due to the advent of low
cost microprocessors (6, 60, 117).
2.3.1 DDC Algorithms
DDC control laws may be broadly classified into
two major categories ; - 44 -
a) 3-mode or PID
b) Minimum Settling or Finite Time Settling
(a) 3-mode or PID
•COX et. al. (23) and DeBOLT et. al. (25) indicate that the equations of many 3-mode controllers (either analoque or digital) can be put into the sum and/or product form. A controller equation that is put into the sum or product form is said to be non-interacting if each of the mode parameters appears in only one term or factor.
There are two major approaches for digitally repre- senting the action of conventional 3-mode controllers
(COX et. al) ? Position and Velocity algorithms. They differ principally in the place where integration occurs. For the Position algorithm, computer output
is the corrected final position of the controlled variable (i.e. integration is performed in the computer). For the Velocity algorithm, computer out- put is the change that the controlled variable should undergo between sampling periods; integration must be performed by the controlled variable (eg. stepping motor, integration amplifier or other similar devices).
COX et. al suggested the following to improve the performance of the Velocity form of 3-mode algorithm. (i) If the measured signal is noisy, a four-
point difference algorithm may improve the
Derivative action of the controller (see Section
4.5.3).
(ii) Observing the property of Proportional and
Integral action of the controller around the
set-point, a set-point band criteria was pro-
posed to allow a faster recovery from process
upset than the conventional algorithm (see
Section 4.5.2).
(iii) A dead band zone around the set-point is
described, in which computer does not perform
any corrective action to reduce noise effects
on the computer inputs.
DeBOLT et. al indicates that provision should be made
to limit the controller output per computation step to
some maximum value. This feature is needed to limit the
derivative spike which results if the input signal is
subject to occasional sudden changes. This limitation
should be applied with care, since it can be detrimental
to the quality of control.
For position algorithms, some arrangement must be made
to prevent integral "Windup" from occuring when the final
control element of the control loop has saturated at an
extreme position (25). - 46 -
'(b) Minimum Settling or Finite Time Settling
KALMAN (67) in 1958 (before the actual implementation
of any DDC installation) described an identification and
self-optimizing control method for a direct digital
control computer. The identification method was a repe-
titive, weighted, least-squares fitting of the pulse
transfer function coefficients. It relies on normal
operating noise for identification. Those coefficients
were used in a feed-back control algorithm based on
minimum settling time to a set-point change.
GALLIER et. al (40) reported the development of such
a controller algorithm for a slow response second-order
lag process with dead-time. That is the computer has time
to test and identify process dynamics. First the com-
puter waits for the process to establish quiscent,
stable conditions. Then it internally disconnects feed-
back, making the process open-loop. The computer now
carries out the following steps ;
i) pulses the process
ii) identifies the process in the form of a second-
• order plus dead-time fit
iii) calculates optimum controller settings according
to some arbitrary criterion.
AUSL ANDER et. al (6) suggests that since the processing
speed of a microprocessor is relatively slow, algorithms
which require extensive iteration should be avoided. Thus - 47 -
for a slow response process, a finite-time- settling algorithm is an ideal candidate for a microprocessor based controller. They found the response of this algorithm is superior to the
PID for large sampling periods.
TAKAHASHI et al (117) reported a simple algo- rithm for a finite-time settling controller with an observer, using a microprocessor, for an industrial process with an S-shaped open-loop response. This paper discusses some software aspects of digital-loop controllers for industrial processes. Further extension of this work can be seen in ref. (146) .
The implementation and performance of direct digital control algorithms in a microcomputer- based controller in relation to the control of non-linear thermal processes was reported in ref (60). In this, experimental studies were carried out with a non-linear diffusion furnace controlled by an Intel 8080-based microcomputer system, on which the control algorithms were implemented.
From the above discussion, it becomes clearly evident that the PID controller is the proper can- didate for controlling internal combustion engines, because it is a fast response system compared to industrial processes. That is, frequent sampling is - 48 -
required for engine control. Thus a PID con-
troller is employed here for controlling the tor-
que of the engine-dynamometer combination.
2.3.2. DDC System design
BERNARD et. al (10) outline the requirements for
the successful implementation of DDC for an indus-
trial processes, under ten categories ;
(i) Control element actuation
(ii) Feedback control laws
(iii) Sampling times
(iv) Input and Output Quantization
(v) Type of Digital Computer
(vi) Interface Equipment Requirements,
(vii) Operator communication
(viii) Computer utilization
(ix) Reliability
(x) Economics
Noise on input signals has always been a big
problem for control engineers. Analoque filters
prove useful in reducing noise effects in both
analoque and digital control systems. In designing
direct digital control systems, the designer also
has a chance to use digital filtering. Here, the
computer can act as a low-cost, digital filter
that can provide a larger time constant than would
be economically viable from an analoque filter.
GOFF (46) put this problem into perspective and gives - 49 -
simple rules for estimating noise amplitude and band width.
GOFF (47) discusses the importance of matching the computer system to the dynamic characteristics of the plant and its associated instrumentation. He covers some factors affecting the dynamic performance of DDC loops and outlines a systematic approach to analoque and digital filtering, input sampling and control calculation periods, control algorithms, and output requirements.
When considering discrete systems, control engineers tend to pose a continuous problem, find the conti- nuous solution, and then invoke Z-transforms to obtain the discrete solution. KOEPCKE (68) suggests that this type of procedure creates the impression that discrete systems are a poor equivalence of continuous system. He treats the problem in the discrete domain to begin with. In this way, labo- rious intermediate calculations associated with continuous solutions are avoided and the results are more meaningful because they are expressed in terms of parameters that are directly measurable.
He also outlines two methods of designing a con- troller }
(i) fitting a model to the process and
designing the controller
(ii) assume a basic controller form, put - 50 -
the controller on-line and close the loop,
and adjust the control constants directly,
based on the actual system response.
In the first method, many assumptions (eg. quasi-
linear, noise etc.) are made in fitting the model
which may not be valid for a real physical system.
The only assumption involved in the second method
is that the assumed control form is sufficient
for the purpose. This technique was employed in
developing the engine control system described
herein.
2.3.3. Analysis of Sampling Rates
In most texts and theoretical discussions on the
subject of sampled data system, the sampling fre-
quency is derived to be at least twice the fre-
quency of the highest frequency component in the
signal. Under these conditions it is noted that
all information in the signal can be recovered.
GARDENHIRE (42) states that it is difficult to*
determine the highest frequency component in the
signal. Also, analoque filters cannot be built
that are capable of cutting off perfectly above a
certain frequency. His work outlines a method for
selecting optimum sampling rates for data system.
He also explains the traditional methods of inter-
polating between samples and describes a method
called computer interpolation, which reduces the . - 51 -
number of samples required. The computer interpo- lation method uses a computer to determine the secondary points between the samples. These are determined not only by the two adjacent samples but also by other neighbouring samples,both before and after the adjacent samples. Thus the computer fills in extra points.
HARTWIGSEN et. al (51) questioned the need for complete information in process control applica- tions, when establishing a strategy to find the minimum sampling frequency that can be used. This in turn raised the question of the sampling rate effect on control settings. Most of their work was carried out on third order systems. Although their study has not resulted in any simple procedure for selecting sampling rates, it has provided some interesting results as follows ;
1) Plant control can be achieved over a wide
range of sampling frequencies, including
frequencies that are much less than "the
closed loop natural frequency. The use of
sampling frequencies which are smaller than
the natural frequency will, however, result in
larger overshoot and increased response time.
2) For a conventional proportional plus integral
control algorithm, the gain and integral rate
settings are both functions of the sampling
frequency. 32 -
3) A method has been provided for selecting
sampling rates and control settings if the
plant to be controlled can be approximated as
a third order system.
2.3.4. Tuning PID Controllers.
Early work by ZIEGLER and NICHOLS (139) in 19 42,
gave the simplest procedure to determine the
optimum settings for control parameters in conti-
nuous control system. This rule was developed from
ZIEGLER'S experiments on various processes and
1 NICHOLS analysis. The criterion for optimum per-
formance is the minimization of integrated abso-
lute error. In developing a tuning technique it is
possible to use both empirical and mathematical
approaches, and both have their advantages. SMITH
et. al (109) describes a mathematically oriented
approach. Further extension of this work can be
found in references (75, 76, 90).
The latter technique was modified by LOPEZ et.
al (77) to suit discrete PID controllers. This
technique involves more work than an empirical one.
ROBERTS et. al (101) devised a simple tuning
rule based on the recommendations by ZIEGLER-
NICHOLS (139) and LEE (27) . This rule, initially,
fixes the integral and derivative time parameters
for a given sampling period using ref (27) and ref
(139), and allows only the proportional gain 53 -
parameter to be tuned on-line. They claim that the
simplified tuning procedure has been found to give
acceptable regulation comparable to the complete
tuning procedure of LOPEZ when applied to a pro-
cess represented by a first-order time constant
and time delay, provided that the time delay value
is greater than a quarter of the process time cons-
tant. Further extension of this work can be seen in
reference (102).
AUSLANDER et. al. (6) described a simplified dis-
crete version of the ZIEGLER-NICHOLS tuning rule,
which is used here. A simple tuning procedure is
essential to make the control system easily adap-
table, to cater for different test requirements
caused either by ;
(i) Changing engine and/or dynamometer
or (ii) Changing engine characteristics by
super-charging etc.
2.4. Engine Modelling
As seen before, a controller can be designed either
by ;
(1) modelling the engine
or (2) assuming a controller form and tuning it
on-line.
Although the latter technique was used here, some
key references on simple engine modelling methods,- - 54 -
for controlling purposes are presented. That is, refer- ences for more advanced modelling techniques are not included.
Engine modelling using analoque computers is presented by MONK et. al (91), GILL et. al (4 3) and AL-BERMANI et. al (1) . There are two popular techniques;
(1) Pseudo-random signal testing (PRSI)
(2) Digital Transfer function Analyser <(DTFA) which are available to determine the transfer function of a system for modelling and control design pur- poses. BRIGGS et. al (16) and HARLAND et. al (49) des- cribe the first technique while ELSDEN et. al (34) outr. line the latter technique. IRONSIDE (59) from LUCAS finds that the DTFA gives reliable prediction than other techniques.
Early work by WELBOURN et. al (130) described the application of continuous control theory to the study of the governing of compression-ignition engines. BOWNS (15) outlines the limitations of using continuous control theory because engines can only be controlled at the instant of injection and are uncon- trolled between injections. He concludes that diesel engine can be considered as a sampled data system and on this basis he developed his throretical work. For further reading see references (36-39, 53, 134)
For accurate modelling, engine frictional losses have - 55 -
to be included. MILLINGTON et. al (87) states that the measurement and analysis of frictional and other losses incurred during running piston engines has never been satisfactorily resolved. This is due to difficulties encountered in direct measurement of the losses with accuracy under the conditions actually occurring when the engine is under load and firing. This paper put this problem into perspective and gives empirical relationships to estimate engine frictional losses. - 56 -
CHAPTER 3
SYSTEM DESIGN ANALYSIS
3.1 INTRODUCTION
The advent of microprocessors with their low cost
have made the dedicated type of computer commercially
feasible for.automatic control applications. This
led to the current research and development of a
dedicated computer controlled engine test-bed
at Imperial College. The prime importance in design-
ing such a system is the proper selection of.: a pro-
cessor, because it is the heart of the system. Since
there is a wide diversity of architecture and per-
formance amongst the currently available microprocess-
ors, the selection procedure becomes extremely
difficult. PENNY'S (99) benchmark test of several different microprocessors were used in choosing a
processor. Details of interfaces, mainly speed and
torque control are then given in this chapter. A
review on the instrumentation used and signal adap-
tion hardware are presented.
3.2 Microprocessor Selection
The most widely adopted approach for the selection of
minicomputers is to give a figure of merit for each
of several architectural and technological factors
(such as typical instruction execution time) and to - 57 -
combine these figures to'derive an overall merit
factor. As microprocessor architecture is both
different and more diverse than minicomputer architect
ture, this approach is inadequate. A different approach
has been adopted by PENNY. He has devised programs
to perform several standard tasks for a wide range
of microprocessor architectures. The range of tasks
selected includes 8-bit addition, 16-bit addition,
8-bit multiplication, and two output routines, one
for programmed output and the other for interrupt
controlled output. The programs were written in the
appropriate assembly language for each of the several
selected processors for test. The programs were
characterised by three factors;
(i) the number of source language statements
(ii) the size in bytes of the compiled programs
(iii) the speed of execution
The first factor largely determines the cost of pro- gramming, which is directly related to the numbers of program statements. In practice cost increases faster than linearly with size, due to the extra structural requirements of bigger programs. The second factor, indicates the-.jnenory requirements. This is of signi- ficance, as in any practical system the cost of the memory is likely to be many times the cost of the microprocessor itself and will be the major influence on the total hardware cost. The third factor, program - 58 -
execution time, is a measure of the power of a pro- cessor. This gives a much better representation of the
capability/processing speed of a processor than the
9 cycle time or the execution time of any particular
instruction. Although there are different types of
LSI technology (PMOS, NMOS, CMOS etc) currently avail-
able, the cycle times encountered are, in practice, nearly the same right across the board. However, the benchmark tests showed that programs for different microprocessors have a very wide range of execution times. These differences are much wider than can be accounted for by differences in cycle times or indi- vidual instruction times. Several architectural factors contribute to these differences.
In order to make rational interpretation of PENNY'S benchmark test results, some aspects of the test programs are examined. The size of the code and speed of execution of the benchmark test programs were calculated using the manufacturers' published data.
That is, none of these programs were executed or run.
In programming practice there are a number of factors to be considered. The major ones being speed, size and simplicity. To achieve some compromise between speed and size, it was decided to optimise on simplicity in the test programs. Unnecessary short cuts were avoided. For example, to speed arithmetic programming the stack pointer could be used at the expense of disabling the interrupt system. But such a practice - 59 -
was considered unnecessary and undesirable.
Since there is a wide range in processor and system architecture, an appropriate change to the bench mark standards could significantly improve performance. Thus suitable changes were made.
Architectures of several processors limits the range of addresses accessible without reloading pointer, page or index registers, to a small value. In these cases it was assumed that all operands would lie inside that range. In practice, this would not be the case and overheads would be incurred in resetting the appropriate registers.
Nine different processors spanning the word length/ cost/performance rahge were assessed. They were the leading processors at the time the test was made and are ;
INTEL 4040 (PMOS, 4-bit) . FAIRCHILD F8 (NMOS, 8-bit) . INTEL 808OA (NMOS, 8-bit) . MOTOROLA 6800 (NMOS, 8-bit) . NATIONAL SC/MP (PMOS, 8-bit) INTERSIL 6100 (CMOS, 12-bit) . G.I. CP 1600 (NMOS, 16-bit) . NATIONAL PACE (PMOS, 16-bit) . TEXAS TMS 9 900 "(NMOS, 16-bit) - 60 -
The results of the test ar'e given in terms of size of
source programs (number of instructions), memory
requirements for the compiled programs and speed of
execution.
(a) Number of Instructions
There is a strong relationship with word length. The
Intel 40 40 had an average of about three times as many
instructions as did the 16-bit processors. The 8-bit
processors averaged about 50% more instructions than
the 16-bit processors.
4b) Memory Requirements
One would expect that for a given task the program
memory requirements would be smaller for a processor
with a smaller word length than for one with a bigger
word length. The Intel 4040 4-bit processor has a
majority of instructions occupying one byte of memory,
whilst the Texas Instruments 9900 16-bit processor has
a majority of instructions occupying 4 bytes of memory
and this might indicate that programs for the 9900 would
need more memory than those for the 4040. However, the
results show that on average programs for the 4040
require more memory than the 8 or 16-bit processors
and that programs for 8-bit processors occupy more
memory than the 16-bit processors.
(c) Execution Time
There is a definite trend for the longer word processor - 61 -
to have faster execution times. The results shows that the average 16-bit processor being four times as fast as the average 8-bit processor and four to twenty five times faster than the Intel 4040. This trend may be due to the powerful instruction sets of 16-bit processors.
The tests have shown that there are definite differ- ences between microprocessors, in respect of number of instructions, size of compiled programs, and execution speeds. These differences may be attributed to several architectural factors and are mostly characteristic ofthe differences that arise from the word length.
The 16-bit processors being superior in all three res- pects to the 8-bit processors and both types being far superior to the single 4-bit processor examined.
In implementing the Control System, the author has aimed for an instrumentational precision of one part
2 in 10 . This being a 10-bit word, which for signal adaption hardware, such as ADC and DAC, was considered adequate for most of the control applications envisaged.
Furthermore, if precision is not to be lost through changes of effective length in intermediate calculation, such as multiplying by a coefficient, the capacity must be greater than this, and in practice 16-bit pro- cessor is useful. PENNY'S benchmark test results also suggested that the 16-bit processor is the best choice for our application. The test results show, that among the 16 bit processors tested, the Texas Instrument, TMS
9900, is superior and was selected as the processor for - 62 -
this application.
BRIGNELL et. al (17) pointed out that the range and
nature of the instructions available, greatly influence
the efficiency with which real-time process can be
carried out. For instance, bit-testing and bit-setting
instructions in the TMS 9900 allow the use of fast
flag-based routines in critical program areas. Its eight
addressing modes and the hardware multiply and divide
instructions contribute to the optimization of programs
for speed. The most striking feature of this processor,
is its "Workspace Register" concept. The primary impact
of this concept is to give the program designer 16 h ii working registers for every routine and subroutine.
Since the "registers" are actually memory words, there is
no need to save and restore register contents when
branching from one routine to another. Other features,
such as alternative forms of jump (link storing, bit-
testing etc) add to the possibilities of efficient
program design. It should be noted that these factors
also influenced the author's selection procedure.
BARRON (9) also arrived at the same conclusions. His
findings show that compared to the DEC LSI - 11 (16-bit)
and the CP-1600 (16-bit) , the TMS 9900 has major advan-
tages in teres of throughput and program compactness.
The TMS 9900 also scored in such areas as internal
architecture, support, software, documentation and
peripheral capability. - 63 -
'3 . 3 TMS 9^00 Microprocessor
The TMS 9900 microprocessor is a single-chip
16-bi : Central Processing Unit (CPU) produced
usino NMOS technology. It is a 6 4-pin device and
no longer limited by the usual 40-pin restriction.
Hence it can communicate with the outside world
via a 16-pin address-bus, as well as a 16-pin data-
bus. The 69, 16-bit instructions of the-TMS 9900
provides the capabilities offered by full minicom-
puters (including hardware multiply and devide).
It uses a 16-bit word to address 32k words or 65
Kbytes of memory.
Other Key Features.
Capable of byte and bit addressing
3-MHz speed
Advanced Memory-to-Memory architecture
Separate memory, I/O, and Interrupt-Bus
Structures
16 General Registers for every routine and
subroutine
16 Prioritized Interrupts
Programmed and DMA I/O capability - 64 -
3.4 Microcomputer Control System at Imperial College
The microcomputer control system used here is based
around a commercial CPU board MICRO 9 9-16. This is a
one-board microcomputer containing all necessary logic
to form a minimum processor system based on the TMS
9900. The board contains the processor, clock, Random-
Access-Memory (RAM), Read-Only Memory (ROM), Interrupt
prioritizing logic, serial interfaces suitable for
driving a monitor terminal and parallel, 16-bit,
input/output data ports. All address, control and
data signals are buffered so that the system can be
expanded to the full memory capacity of 32K words
(see Fig. 3.1).
Feature Summary of the MICRO 99-16 CPU Board
TMS 9900 Microprocessor
256 words static RAM
. 1536 words PROM
RS232 and 20mA current loop serial Interface
15 Prioritized Interrupts
On-Board Clock Generator
16-bit Data-Out Port
16-bit Data-in Port
15-bit Address Bus
The PROM was programmed with TIBUG and Line-by-Line
Assembler firmware. TIBUG controls the system oper-
ation by interfacing the CPU to either teletype or' I 1
Fig. 3.1 MICRO 99-16 CPU BLOCK DIAGRAM - 66 -
other RS 232 compatible terminals, and offers the use of basic debug commands to'develop application software.
The Line-by-Line Assembler accepts assembly language inputs from a terminal. As each instruction is input, the assembler interprets it, places the resulting machine code in an absolute address, and prints the machine code (in hexadecimal) next to its absolute address.
To increase the storage capacity of the CPU board, a
RAM Extension Board (4 K words) was built.
A teletype is used as the monitor via the 20 ma current loop serial interface of the board. For program stor- age a domestic type of cassette player is utilised. It is interfaced with the processor by a commercially marketed interface kit (see Fig. 3.2). This kit is designed to convert the digital signals from the com- puter to audio tones and back again, using a standard system called CUTS (Computer User's Tape System), which is also referred to as the Kansas City or Byte format.
This records data with a logis '1' recorded as eight cycles of 2400 Hz, and a '0' as four cycles of 1200 Hz.
A byte of data is recorded as a start bit of logic
'0', followed by eight.bits of data and two stop bits
1 of logic 'l . This form of signal transmission is accepted by the UART (Universal Asynchronous Receive and Transmission) in the computer. It operates at a data transfer rate of 110 baud. For further details see
Ref. (80). - 67 -
Fig. 3.2 shows in block schematic how the computer system
is interfaced with the engine test-bed. It can be seen that i the system is structured into modules. That is, each module
is responsible for one specific task. For example, the
Speed Control Interface module provides the necessary hardware logic, to perform software control of engine
speed. A modular system is easier to understand, debug
and maintain.
The control system shown in Fig. 3.2 may be considered
as hierarchically structured and can be divided into three subsystems ;
(1) Speed Control System
(2) Torque Control System
and (3) Interrupt Control System
These subsystems (described in Section 3.6) are con- trolled by the main system, the processor.
In designing the subsystems it was decided to minimise as far as possible the conversion of signals from analoque to digital form and vice versa. Each such conversion would carry either a round-off error (analoque to digital) or proportionality error (digital to analoque) as reported by BLOXHAM et al (13). In short, digital signal trans- mission is emphasized in the system design.
BACON et al (8) reported some of the other advantages of transmitting data as a digital signal over analoque - 68 -
transmission. They are as follow% s :
(1) In all practical situations, the presence of noise
is inevitable. In such instances, a digital signal
can be recognised with more certainty than an ana-
.- loque signal.
(2) Owing to signal loses in communication lines, the
signal must be amplified at many intermediate points
of its transmission. In an analoque signal every
amplification stage increases the noise by the same
proportion (i.e. the noise will be accumulated).
The digital signal also requires amplification, but
at each amplification stage the digits or pulses
can be reformed or reshaped since the shape of
each pulse will, in general, be known.
(3) In digital transmission, there are methods for
detecting the presence of errors, and methods for
correcting them in certain form of digital trans-
mission.
The above discussion shows the importance of dealing with digital signals and this is the basis adopted throughout this system design.
Fig. 3.3 arid 3.4 show the Microprocessor - Based Engine-
Test Facility developed at Imperial College. Fig. 3.2 Microcomputer Based Control System For Engine Test-bed at I.C. - 70 -
Fig. 3.3 Photograph of TMS 9900 Control System
Fig. 3.4 Photograph of LSI-11 Data-logging System - 71 -
3.5 Test Bed
Fig. 3.5 shows the test bed arrangement, consist-
ing of the engine coupled to an eddy-current dynamo-
meter, a digital stepping motor for demand speed
variation and an external water cooling system. The
engine and the dynamometer were rigidly mounted to a
fabricated steel frame, which was flexibly mounted to
a large concrete base.
3.5.1 Engine
The experiments were performed on a PERKINS 4.236
series direct injection, diesel engine. This is a
four cylinder 4-stroke high speed engine.
x Engine Data
Bore 3.875 inches (98.43 mm)
Stroke 5.0 inches (127.0 mm)
3 . Cubic Capacity 236.0 IN (3.86 litres)
Compres si on ratio • 16:1
Firing Order 1, 3, 4, 2
Power rating 80 bhp at 2,800 rpm
. >>-Maximum Torque 193 lbf. ft (26.68 mkp)
at 1400 rpm
Fuel pump distributor type - 72 -
I
Fig. 3.5 Photograph of Engine Test-bed at I.e. - 73 -
3.5.2 Eddy-Current Dynamometer
The engine is loaded by an eddy-current dynamo-
meter (VIBRO-METER 3WB 15) capable of a maximum
torque of 41.5 mkp at 2,300 rpm (Big. 3.6). The
braking power rose progressively with speed
according to the degree of excitation. The nominal
power of the dynamometer was fixed for thermal
reasons, this being reached at 100% excitation
and speed 2300 rpm. A thermal safety switch is
incorporated to intervene if this excitation is
exceeded. At speeds above 2300 rpm maximum excita-
tion should be reduced.
The size of the dynamometer was selected such
that its maximum torque envelope completely en-
closed the engine operational range (Fig. 3.6). E>ower
dissipation in the form of generated heat is carried
away by cooling water which circulates inside the
stator jacket. Fig. 3.6 Maximum Torque Vs. Speed Map for Dynamometer & Engine. - 75 -
'3.6 Description of Subsystems
3.6.1 Speed Control System
The purpose of this subsystem is to provide the
necessary facilities to measure and control the
speed of the engine. To conform, with the primary
objective of keeping the design as digital as
possible, it was decided to use the time taken for
one engine revolution as the basis for speed mea-
surement. In addition the governor lever is con-
trolled by a suitable digital stepping motor. This
type of motor moves by a precise angular amount for
each pulse input. The advantage of such a discrete
step output is that the position of motor shaft
is always known from counting the number of steps
the computer has sent to the motor. In order to
have a high degree of versatility and flexibility,
the other important factors needed in this system
design are j
(1) to be able to control. the stepping rate of the
motor by the computer
and (2) manual control of the stepping motor, at a
pre-set rate. This feature is useful
during computer failure and for checking
motor installation.
Based on the above considerations, the Speed Control
Interface was designed and constructed. - 76 -
Engine speed was measured by two devices. The dynamo-
meter was fitted with a 60 tooth gear wheel, a mag-
netic pick-up and an analoque RPM indicator (ARI-l/A).
This is used for visual indication purpose only. A
more accurate means of speed measurement (described
in Section 3.6.1.1) is achieved by using a moire
fringe Incremental Shaft Encoder (FERRANTI 28H). The
encoder is coupled to the crankshaft of the engine
by a flexible but torsionally stiff coupling. It
.provides two output tracks; each providing 720
pulses per revolution. These two tracks being out of
phased by 90° to each other.
These pulses are referred to as "Digitiser-Pulses".
An additional third track is provided to give a
single pulse once each revolution. This pulse is re-r
ferred to as "Revolution - Pulse". Fig. 3.7 shows the
shaft encoder arrangement. The Digitiser-Pulses are
used for various timing functions in the LSI-11
data-logging system (see Ref. 103) . The Revolution-
Pulse is used for speed measurement and for synchro-
nising purposes in the data-logging unit (eg. T.D.C.)
3.6.1.1 Speed Control Interface
A 25 kHz crystal clock increments a 12-bit binary
counter as shown in Fig. 3.8. A Revolution Pulse
from the shaft encoder interrupts the counting
sequence for 500 ns. A settling delay of 200 ns - 77 -
Fig. 3.7 Photograph of Shaft Encoder Arrangement. - 78 -
is allowed for the counter before its contents are strobed into a 12 bit speed latch. The counter is then cleared and a speed flag is set. The contents of the speed latch are read by the computer and trans- formed it into engine speed (r.p.m) as indicated below;
Engine Speed = (Clock Frequency) x 60 Speed latch contents
= 25000 x 60 Speed latch contents
Fig. 3.9 illustrates the timing sequence for this operation. The actual time during which the speed counter is halted is small enough to have an insigni- ficant effect on accuracy. The speed flag is used to prevent the computer from reading more than once per engine revolution. An LED (Light Emitting Diode) is used to indicate the status of the flag. The flag can be cleared by the software using bit '0' of the CRU (Communication Register unit) output port of this interface. The CRU provides up to
4096 directly addressable input bits and 4096 directly addressable output bits. Both input and output bits can be addressed individually or in fields of from
1 to 16 bits. The status of the.speed latch is indi- cated by an LED array. This type of visual display is extremely useful during debugging and as a general monitor of the system status. - 79 -
The above method of measuring engine speed is far super-
rior to some of the other techniques reported. For
example, BENSON et. al. (11 ) converts the output of a
rotary shaft encoder to an analoque signal, using a
Frequency to Voltage Converter (FVC). This analoque
signal is then fed through an ADC, to be read by a
computer. In addition to pulse-integration ripple
introduced by the FVC in this system, each conversion carried a round-off error as reported in (13). Similarly
DUNDAS et. al. (33) at ESSO Research Centre uses a
DC Tachometer Generator for speed measurement which
involves generator ripple.
A stepping motor is used to control the governor lever position via a reduction gearbox. It facilitates fast and fine adjustments of the governor lever. The per- manent magnet motor (SIGMA 20-2235D200-E 3.7B) is capable of rotating at a step size of 1.8° and it is operated at a speed of 200 steps/sec. This being the maximum speed at which the! motor operation is reliable. This stepping rate
is controliible by the software. A gear reduction ratio of
15:1 was selected to give a governor lever set point resolution of 1/237 of full range. This allowed a change from minimum to maximum demand speeds in 1.185 seconds.
Fig. 3.10 shows the Stepping Motor, arrangement.
The computer uses either bit '1' or bit '2' of the CRU output port to increase or reduce the engine speed res- pectively. These bits are directly addressable by the - 80 -
computer. To issue a pulse on any one of these bits, the program performs the following sequence of operation
1) Set the selected bit to logical '0'
2) Set the selected bit to logical '1'
3) Set the selected bit to logical '0'
The above operation is repeated by the number of pulses specified, to achieve the required governor lever position 3.8 Speed Control Interface, Schematic 82 -
~~------Revolution Pulse ______Disa ble Speed Counter (500ns)
t Settline Time For Speed 1 Co~ter (200ns)
Strobe Speed Counter ______...,.~ ' .... ______Contents into Latch.(.100.ns) nI I • ~------Clear Speed Counter & set U Speed Flag(100ns)
Fig. 3.9 Timing Sequence for Speed ~easurement.
Fig. 3.10 Photograph of Stepping Motor Arrangement. - 83 -
3.6.2 Torque Control System
The function of this subsystem is to provide the necessary capabilities to monitor and control the load on the test-bed engine. The engine is loaded by an eddy-current dynamometer (VIBRO METER 3WB-15), the power being dissipated by a cooling water system. The excitation level of the dynamometer can be adjusted manually or by the computer via a DAC, using a Brake Excitation Unit (BEC).
The BEC, a thyristor - Controlled voltage stabi- lizer, supplies the stator coil with a highly stable direct current to maintain a fixed field strength. The output voltage is adjusted between zero and maximum value by means of continuous Coarse and Fine adjustment controls. The current value can be regulated from 10% to 100% of the maximum value by a manual control. An external direct current source between O and 1 volt can be used to control the output voltage between 0 and 45 volts. This feature provides the means for cpmputer control. An electronic fuse protects the instrument against overheating. Fig. 3.11 shows the BEC unit.
Load torque is measured by a strain gauge load cell resisting rotation of the dynamometer stator (see Fig. 3.12). The output of the torque measuring bridge-amplifier is available for the Torque Meter - 84 -
Fig. 3.11 Photograph of RPM & TQ Meter and BEC Unit - 85 -
Stator Rotor
Gauge?
Strain Gauge Support. Ring
Water Cooling Tubes For Strai .Gauges
Fig. 3.12 Load Cell- Arrangement. - 86 -
(PBB-l/A) and for closed loop control. This output is filtered prior to recording to elimi- nate the effects of torque variation during an engine cycle and vibration. The complete torque measuring system was calibrated stati- cally using a torque arm and static weights.
The preceding discussion indicates that the signals involved in the measurement and control of the load on the test-bed engine are in Analo- que form, hence signal adaption hardware such as ADC and DAC are required. These are the import- ant components in the Torque Control Interface. More emphasis is placed on the selection of the ADC over the DAC, due to its high usage in this application. For example, the mean value of twenty load measurements are used for each load corrective action (i.e. the ratio of usage of ADC : DAC is 20 : 1)
A 10 bit resolution was considered adequate for Control Application. A 10 bit DAC (ANQLOG DEVICES DAC 10 H) with a settling time of 25 jjts to \ LSB (Least Significant Bit) was selected.
3.6.2.1 ADC Selection
Three major techniques commonly used to convert an analoque signal to a binary number are out- lined by LESEA et. al (73). - 87 -
They are
i) Successive Approximation ii) Integration and iii) Direct Comparison
(i) Successive Approximation
As shown in Fig. 3.13 the output of a DAC is connec- ted to the input of a comparator. The other input of the comparator is the unknown signal to be converted. The algorithm of approximation is to set each success- ive bit of the DAC, starting with Most Significant Bit (MSB). As each bit is set, the comparator output is tested. The last set bit will be cleared if the comparator output indicates that the DAC output is greater than the unknown signal. This procedure is repeated for the next least-significant bit, until the last bit is reached.
(ii) Integration
In this method, the positive unknown voltage and a negative known reference voltage are integrated using a high quality capacitor. The positive unknown voltage charges the capacitor for a known period of time and after this the negative known reference voltage is applied. The time taken for the charge of the capacitor to reach zero is the basis for this method. Fig. 3.14 illustrates the timing diagram of such a technique. - 88 -
The integration technique rfesults in high accuracy measurements. This accuracy comes at the expense of the time taken to convert the analogue signal. This is slower than Successive Approximation but more accurate (73) .
(iii) Direct Comparison
Direct comparison is used only where extreme speed is required. Fig. 3.15 illustrates a 3-bit direct compa- rison converter. The seven comparators will establish if the input voltage is greater than or less than each eight possible reference voltages. For example, if the input voltage is greater than the reference voltages of the comparators below the fifth comparator and less than all above it, then the output of the converter will 'be a 3-bit binary number, lOt^-
Such system can provide a resolution of five bits in less than 100 ns per conversion. LESEA et al (73) indicates that the need for many comparators and reference voltages, and a complex encoder scheme, results in this method being the most expensive for anything beyond 3-bits of resolution. The trade-offs among the three techniques can be summarised. Direct Converter is fast but with poor accuracy. Successive Approximation Converter is of medium speed and average resolution. Integration Conversion has the highest accuracy but requires the most time to perform this conversion. - 89 -
It should be noted that the analoque input to an ADC must be stable during the conversion period. This may be accomplished by using a Sample-and-Hold Circuit (S/H). This tracks or samples the analoque input, and upon the hold command v.'ill hold constant the value of the input voltage at its output, for subsequent analoque to digital conversion. The device holds the sample voltage in a high quality low leakage capacitor, buffered by an Operational - Amplifier.
In some applications, it can be more economical to use a fast S/H with a slower ADC to convert a high frequency analoque signal, than to use a very fast ADC (eg. TV picture digitiser.).- The S/H also becomes useful in a sequenced multi- plexed signal system with a single ADC. In this mode of operation the S/H is placed between the multiplexer and the ADC. This allows the multi- plexer to address another selected analoque channel, and to settle at the new value whilst the ADC is converting the S/H output of the previous channel.
Based on the above discussion, the successive Approximation seemed to be the most appropriate choice for this application. The Direct Compa- rison method is inadequate due to its low accu- racy whilst the Integration technique reduces the flexibility of the Control Software, because - 90 -
Coronarator Unknown O/P
DAC
LSB
Fig. 3.13 Successive Approximation Hardware
Charge
1000 1000+K Time Pulses Fig. 3.14 Integration Timing Inout Vx V1 > Vx V1 ref
V2 ref
V3 ref
V4 ref
- V5 ref '
V6 ref J» ^^ V7 > V V7 rel Fig. 3.13 Mrect Comparison Converter - 10 3 -
of its slow conversion time. For example, in this application twenty load measurements are taken over a period of 20 ms for the purpose of digital filtering. This sampling frequency may be varied but its maximum limit is determined by the settling time of S/H (if used) and the signal conversion time.
A 10 bit ADC (ANALOG DEVICES AD 571K) was selected for this purpose. This has a conver- sion time of 25^u.s and is based on a Successive Approximation Technique.
3.6.2.2 Torque Control Interface
Fig. 3.16 shows the Torque Control Interface constructed. The output from the load cell is fed through a Differential-Amplifier (Gain 10) and an Analoque filter. As the signal .is of a low frequency nature, a Sample-and-Hold is not employed. The ADC conversion is initiated, by the 1 1 computer sending a pulse on bit ll of the CRU output port of the interface or by an external pulse generator. The computer monitors the status of the ADC busy line using bit '10' of the input port, before the contents of the ADC are read. The external pulsing facility provides the means for setting up and calibrating the ADC, using an external stabilised DC supply, without program implementation. - 92 -
The excitation level of the brake can be set by offering a 10-bit word from the processor to the
DAC. This will be converted into an analoque signal by the DAC, which is fed to the BEC unit. The output from the DAC is attenuated by an amplifier of gain
0.1, as the maximum DAC output is 10 volts, whilst the maximum input requirement of the BEC unit is 1 volt.
A 10-bit latch is used between the CRU output port and the DAC input, as the CRU output is set up serially by the CPU (15^us to set up 10 bits).Bit
1 10' of the CRU output is then used to strobe the 10 bits into the latch. This ensures that only completely up dated 10-bit words are offered to the DAC. LED arrays are used to show the status of the ADC and the
DAC. They are utilised as a tool for debugging and as a general monitor of the system status. Fig. 3.16 Torque Control Interface Schematic. - 94 -
3.6.3 INTERRUPT CONTROL SYSTEM
This facility provides the necessary capabilities
to., control the interrupt sequence. Each output
of this system is connected to a specific interrupt
level of the computer, as illustrated in Fig. 3.17.
The top three interrupts are used to register.low
oil pressure, high oil temperature and high water
temperature. The limits for these parameters are
pre-set. Any single limit excursion sets the
appropriate interrupt flag and this will be acknow-
ledged by the processor if the interrupt line is
enabled. This interrupt line is program control-
able, using bit '3' of CRU output port of the
1 n Speed Control Interface. The program uses bit 4
of the same CRU output port to clear the interrupt
flags. In addition, the INPUT-OUTPUT CPU RESET
operation also clears the flags.
The next two interrupts prevent the stepping motor
from indexing the governor beyond its idle and
maximum speed limits. Microswitches are used with
ANTI-BOUNCE circuits for these limits. Their status
are displayed by LEDs.
The Interrupt Control System is also used to moni-
tor and control the load on the engine. This is
achieved by using a R-C clock which interrupts
the system every 0.05 sec to invoke the Torque Control
Software. - 95 -
I/O RESET D
COMPUTER CLEAR "4 CLR • 1 ^INT. LOW OIL PRESS.
"1CLR
HIGH OIL TB-'.P.
1 CIR ^Qm, 1d HIGH WATER TEMP.
1 CLR
LOWER GOV. LEVER LIMIT fD^
UPPER GOV. LEVER LIMIT
"ICLR j ^INT. R-C CLOCK
INTERRUPT ENABLE LINE
Fig. 3.17 Interrupt Control System. - 96 -
CHAPTER 4_
THEORETICAL ANALYSIS
4.1 Introduction
The governing of compression ignition engines
f received much attention in the late 1950 s.
WELBOURNE et al (130) described the application of
continuous control theory to the problem of engine
governing. This classic paper gave an insight into
the principles involved and made possible the
scientific design and selection of governors for
compression ignition engines.
They considered the fundamental action of the
engine, in converting the fuel control signal to
shaft torque, as equivalent to a continuous time
delay. The implication is that the fuel is conti-
nuously injected into the engine and any particular
element of fuel appears as output torque for a
finite period of time after it has been injected.
However, in reality the fuel is injected into the
combustion chamber during a very short period and
any particular injection will produce a power
stroke of limited duration for each engine cycle.
Evidently, this method has some limitations in
high performance systems as it does not recognise
the fact that the engine can only be controlled at. - 97 -
the Instant of injection (BOWNS, 1970 - 71). It is
uncontrolled between the injection instants. The
consequence is that the behaviour of the engine is
not of a continuous nature but can be defined at
specific instants in time. It would seem, therefore,
more logical to base the modelling of the engine on
Sampled-Data concept (37,53).
BOWNS (15)discussed the accuracy of the Sampled-
Data approach to modelling of engines. It gives a much more accurate representation of the dynamic lags in the engine and thus renders a more accurate assessment of the stability of any engine-governor combination to be made.
Analysis for the creation of engine control loops .
(speed and load) is described in this chapter.
Prior to developing the governing equations for the control loops, a review on mathematical modelling of engine-load dynamics based on continuous control theory and Sampled-Data concepts are presented. This will aid towards a better understanding of the beha- viour of engine—test system for control purposes.
The behaviour of real systems (eg. governor, fuel pump etc.) is non-linear in nature and often diffi- cult to analyse. As a first step, small perturba-
tions are considered in model analysis, to give
linearized models. This results in two important advantages. The first is the property of super-
position. This implies that the system, initially
at rest responds independently to different input
applied simultaneously. Suppose r^(t) and r^(t) are
two inputs applied separately to a system, then the
outputs may be represented as
r (t) ^x-^t) ; r (t) ^x (t) x 2 2
Now if r (t) and r (t) are applied together, then 1 2 the property of super position allows the represen- tation of the output as,
jr-^t) + r (tj ^jx^t) + x (t)J 2 2
The second property of linearity is concerned with proportional response. This implies that if the input is multiplied by a factor K, then the output is multiplied by the same factor, i.e.
|k r (t) + K r (t x {t) + K x (tj| i x 2 2 )j ± 2 2
Finally, a continuous equation can be transformed to Sampled-Data system by the use of Z - transforms or by means od difference equations. The latter approach is usually easier to understand and imple- ment in simple cases, hence less subject to errors, and so is used here. - 99 -
4.2 Engine Load Dynamics
In order to investigate the stability of an engine
it is necessary to understand the dynamic character
istic of each of the elements involved. These con-
sists of the engine, the load and the governor
(Fjg. 4.1).
GOVERNOR ENGINE
Fig. 4.1 Schematic of an Engine-Governor System.
This section is devoted mainly to the study of the
engine and load dynamics. The model developed is
based on following assumptions ;
(i) a 'Perfect' engine comprising, a solid disc
(E) with a polar moment of inertia (J^) equal - 100 -
to those of the moving parts of the engine, lumped'
together (see Fig. 4.2)
(ii) a torque (T ) representing the indicated torque
developed by the engine
(iii) a viscous damping torque (C ft- ) equal to the engine e " friction torque (from motoring test).
(iv) a dynamometer comprising, a solid disc (D) with a
polar moment of inertia (J^) equal to that of the
brake rotor.
(v) an external torque applied to disc D, representing
the brake torque (T^). It includes windage and other
types of friction torques generated inside the loading
unit.
(vi) an elastic weightless shaft connecting both discs.
Td
V A D E G kj 0
«d e 0 K - Torsional Stiffness of the Shaft
Fig. 4.2 Engine-Brake model. - 101 -
The equation of motion 'for the engine and dynamo- meter can be written
J 0 + C + K (0 - 0.) = T e eQ e e e d e
J, e, + T = K(0 - 0 -j) d d d ret d
Transforming these equations in terms of differen- tial rotational speeds ft , and ft e d
J + C + K ) dt = T e "e e "e 1<°e " °d e
J + T K J (n - n > dt d °d d " e d
Obtaining the Laplace transform and assuming zero initial conditions j
J s s) + C (s) + Q (s) (s = T (s) *V e "e *| " "d ^J e e e
J s n (s) + T (s) = K (fnt (s) - ft (s d d d e d sL' 3 , l where s is the Laplace operator.
Eliminating ft (s) d
J S + K V5) d
T (s) 2 J J 3 C J, s + K(J + Jjs + KG e d, S + e d e d e
J, s + K T (s) d • d
J J s3 + C J s2 + K(J + J )s + K C T (s) e d e d e d e - 102 -
For a rigid shaft J K—
(s) T (s) " d T e
Substituting J = J + J , then
T (s) (4.1) n (s) = d e js + C Js + C
This represents the dynamic characteristics of engine
and load.
From a control point of view, the governor fuel pump,
injection and combustion systems are non-linear ele-
ments, whose input is the governor lever position,
and the output is engine torque. The torque developed
by the engine (indicated) can be represented as a
function of governor lever position (R) and engine
speed (ft ) ;
T = f (R, ft ) (4.2) e e
For small changes in both governor lever position and
engine speed
(4.3) - 10 3 -
where K_ = 9T \ torque gain with respect to ^ I 8R| tt I governor lever position at
constant speed
= 3T \ torque gain with respect to g Q I R
el speed at constant governor
lever position.
Since small perturbations are being considered, it is valid to linearize the Equation (4.3) in this way;
Invoking the Laplace transform,
T (s) = K . R(s) + Kq tt (S) (4.4)
where T , R, and tt represent small changes from
a steady state reference point.
Eliminating T (s) from Equation (4.1) gives j g
K Td(s) (4 5> ; - • »<•> ftTk^-' "" ' c K JS + C - k • e « q
The Equation (4.5) shows the effect of small changes in
fuel pump setting, combustion and load characteristics
on engine speed - 104 -
K .1 R(s) » R FUEL RACK POSITION
Fig. 4.3 Block diagram for engine-load system.
There is an inherent time delay between the injection
and the burning of fuel. This is due to transport and
ignition (both physical and chemical) delays ( 8] ) .
The Equation (4.5) neglects these time delays and
therefore includes some inaccuracy. For example,
during transient conditions, the speed of the engine
will not be the same at the time of the fuel~pump
delivering as it is during the subsequent combustion
stroke. Thus the value of will be different during
transients and steady running. However,the difference
will usually be small and it is therefore reasonable
to consider both of these effects as happening subse-
quent to the time delays. - 105 -
•4.3 Sampled data Model for- Compression Ignition Engines
As seen in Fig. 4.4, the fuel pump begins to deliver
at the point s, a few degrees before top dead cen-
tre. Due to transport lags, fuel is delivered to the
cylinder some time later than s. The amount of fuel
delivered will depend on rack position at the point
a and an appropriate torque will be developed
during the next firing stroke. Any alterations of
the fuel rack position between injection instants
will make no difference to the amount of fuel
delivered. That is, the fuel injected will respond
to a step change in fuel rack position after a time
delay which can vary in length by the time between
successive engine firing.
This feature is precisely the same as in Sampled
Data control system in which a sampler takes a
sample of the input and feeds it into the system
at the sampling instant, similar to the point s.
Between sampling instants, the system is virtually
uncontrolled.
For analytical purposes, the Torque Vs crank angle
diagram (Fig. 4.4) can be represented by the mean
values of the torque. The system can be represented
(using the terminology of Sampled Data system) by a
Sampler (injection pump), a time delay a£ ,
followed by a zero-order-hold, and finally by the
load transfer function, Fig. 4.5. -106-
In this model, a constant sampling time and instan- taneous fuel injection are assumed. But in reality, the engine speed fluctuates arid, therefore the time between firing instants varies. Further, the fuel pump does not deliver instantaneously and the nature of its control is such that the duration of delivery is controlled, rather than the rate of delivery. This is important in determining the sampling point s. If the fuel rack continues to move during pumping it is more appropriate to consider the sampling point s, at the end of the pumping stroke, thus reducing the time delays. For further details see BOWNS ( 15 ) ,
HAZELL et.al ( 53 ) , and FLOWER et.al ( 37) - 107 -
TDC
s - commencement of fuel injection
Fig. 4.4 Torque Vs Crank Angle Diagram
T (s) d
R(s)
Time delay Zero order Load Transfer Hold function G (s) = 1 where G.(s1 ) = R 0 Js+C -KjQ. Js+C -Kft e i-'ig. 4.5 Block Diagram of Engine with Time Delay - 108 -
4.4 Review of Engine-Test System
The previous section described the analytical tech-
niques available to investigate the dynamic charac-
teristics of the engine-load system. The next topic
in this chapter is the formulation of algorithms for
controlling engine speed and torque. The engine-test
system is reviewed from the control point of view
for the development of above algorithms.
From Equation (4.5), the engine speed for an
engine-brake system can be defined as a function of
brake-torque (T^) and governor lever position (R) ;
i.e. ft = f (R, T ) (4.6) e x d
Similarly for eddy-current dynamometer, the applied
torque (T ) can be represented as a function of rotor d
speed and current (I^) in the stator coil ( 1 ) .
If the connecting shaft between dynamometer rotor and
engine is rigid, then the rotor speed is same as engine
speed.
i.e. T = f (ft , I ) (4.7 ) d 2 e d
Multivariable control systems are those which have
a multiplicity of inputs and/or outputs. Feedback
control loops in such systems are usually coupled
to each other. As a result, they are complex to - 109 -
analyse using classical control theory. So it can
be concluded from Equations (4.6) and (4.7), that
the engine test-bed is a multivariable control system
(see Fig. 4.6). As an initial step in the design, the
system is decoupled into speed and torque control
loops and then they are treated independently. This
is based on the assumption that cross-coupling or
interaction between feedback loop is weak relative to
the desired control performance. In other words, Decoup
ling means that each input must affect one and only
one output. For this condition to be satisfied,
G3(s) and G4(s) must be equal to zero.
-Fig. 4.6. Engine Test System. - 110 -
4.5 TORQUE CONTROL
slts) ; MANUAL CONTROL
DIFFERENTIAL AMPLIFIER
Fig. 4.7 Feedback Control For Eddy-Current Dynamometer.
The feedback control system for the eddy-current dynamo- meter used is shown in Fig. 4.7. The feed forward path comprises a digital PID controller, thyristor control unit and ah eddy-current dynamometer. The thyristor con- trol unit is a voltage stabilized supply to the stator coil of the brake with a highly stable direct current, thus maintaining a fixed magnetic field. The output level of the thyristor control unit can be controlled manually or by the .PID.
In the feedback path, the output from the load cell of the brake is initially amplified by means of a differential anplifier and then fed through analoque and digital filters. In addi- tion to filters, the differential anplifier also acts as a noise - Ill -
eliminator (i.e. noise common to both inputs of the amplifier are eliminated)
In section 4.5.5, the effects of sampling on signals and the phenomenon is known as ALIASING is discussed.
Before examining the PID controller, the influence of different types of controllers on system response f based .on ANAND's (2) review, is as follows;
(a) Proportional Control
With this control system, shown in Fig. 4.8, the
actuating signal M(s), is proportional to the
error signal E(s) ;
where K - the gain of the controller, R(s) - P reference input and C(s) - output signal.
In such a system, it is not always possible to
select a proper gain so that the steady state
error and maximum overshoot are within accept-
able limits. This problem can be overcome if
proportional control is employed in conjunction
with some other type of control.
(b) Derivative Control
With this control, the actuating signal M(s), is - 112 -
proportional to the time derivative of.the error
signal E(s),
M(s) = K s E(s) d when K^ - gain of the controller,
This form of control is very useful for increasing system damping. It cannot be used alone since it does not respond if the error is constant.
Consider a second-order system shown in Fig. 4.9 with derivative control action in a feedforward loop. The output becomes
c(s) = K 5 + 1 d (4.80 2 R(s) As + (B + K ) s + 1 d
The equation (4.3 ) shows that the effective dam- ping of the system has increased and hence the system overshoot is reduced.
Consider the same second-order system shown in
Fig. 4.10 with derivative control action in the feedback loop. The output becomes
C(s) _ 1 R(s) (4.9 ) 2 As + (B+K )s+ 1 d
and the charcteristic equation is the same as in - 113 -
equation (4.8,). The system has some control of the output overshoot. But the main difference is in the system response. Since Eq. (4.8) has an open loop
zero, whereas Eq. (4.9 ) does not, the response is faster.
Integral Control
In most systems, it is desirable to eliminate positional error as far as possible. In such cases, an actuating signal M(s), is proportional to the integral of the error signal E(s),
i.e. M(s) = KT E(S) s where K is the gain of the controller
In the system shown in Fig. 4.11, the output becomes
(4.10) C (s) = s + K R(s) "3* 2 AS + Bs + s + K I
and the error signal becomes
2 E(s) = s (As + B) . R(s) 3 2 AS + Bs + s + K I
It is immediately obvious that in employing inte gral control to a second - order system, it is - 114 -
- C(s)
Fig. 4.8 Proportional Control .
C(s)
Fig. 4.9 Derivative Control in a Feedforward Loop
Fig. 4.10 Derivative Control in Feedback Loop
Fig. 4.11 Integral Control - 115 -
converted to a third-order system. Whenever this
is done, the system is no longer stable over all
ranges of gain (i.e. if the gain is sufficiently
increased, the system will become unstable).
Although this is unacceptable, integral control
is needed for eliminating steady state error. The
steady state error is
and is zero for a step or ramp input
4.5.1 PID Control
Knowing the advantages of individual types of con-
trol (Proportional, Derivative and Integral) action,
they can be combined together to form a single
controller, namely PID. The PID is widely used for
most process control system, where the plant Trans-
fer Function has not been defined completely. In
Finite Difference form, PID can be represented as )
N M..-= K e„ + K. J e. T + K. e„. - e.. .. + V (4.11) Itf pN I^is d N N-l m T s
th
where - controller output at the N sample
K^ - gain of the Proportional controller
K_ - gain of the Integral controller - 116 -
K^ - gain of the Derivative controller
th e - error at the N sample N
T - Sampling period g
V.. - initial offset M
The above form of the algorithm is known as the
Position Alogrithm which requires the control computer to command the full value of the contro- lled variable M^ at each calculation ( 116) •
In such a system, in the event of temporary loss of signal to the process actuator,the correct position could be transmitted on restoration of the communication link, and the system will res- pond without any synchronization problem.
There is another form of PID algorithm possible, which has other advantages but lacks the above feature of a Position Algorithm. This is. known as
Velocity Algorithm which only calculates the required change in the controlled variable. This can be obtained by applying Eq. (4.11) to the (N-l)th
sample, and subtracting the resulting equation from both sides of Eq. (4.11). This yields
= Am - «n' -i N
e e )+ K te 2e +e = V N~ N-l I ^ VL tr N-I N-2> T S (4.12) - 117 -
The main advantage is tliat the offset has disa- ppeared. This means that, when the controller is first started, the operator does not have to initialize the control loop by inserting this value manually. In the
Positional form of the PID algorithm, when the con- trolled loop is switched from manual to automatic control, the system will "bump" unless the controller is aligned with the present position of the controlled parameter. The Velocity algorithm is "bumpless". The second advantage is that the elimination of the summation of the integral term in Eq. (4.n) avoids the danger of windup, a condition in which the con- troller saturates its integral term if for some reason an error signal persistfe.
The Eq. (4.12) shows that adjustments can be made on the integral and derivative action parameters by not only with K^. and K^, but also by changing the sampling period T . The range of adjustment can be O made is extremely wide.
The error signal e is the difference between the N reference input (or setpoint) r and the value C N N of the controlled variable.
e r C (4 X3) N = - N ' N - 118 -
Assuming r to be constant, and substituting
Eq. (4.13) in Eq. (4.12), give
(c + (r + K (2 "h-S* n-I " This form of the control law has the advantage of avoiding a derivative "KICK" for sudden set-point change. Since r does not appear in the derivative N term, a change in set point will not cause a large, sudden change in the output. The integral action term must always be included, since the set point r appears only in this term. If the feedback sig- N nal is subject to sudden changes, a provision can be made in the controller program for limiting the output M^ per computation step to some maximum value. However, the limiting value must be applied with caution so that it will not degrade the control system. For further reading, see Ref. (12;107, 116) . The above form of PID algorithm (Eq.4.14) is employed in the torque control system used here. This also incorporates other features outlined in sections 4.5.2 and 4.5.3 respectively. - 119 - 4.5.2 Modifications to Improve PID. c(t) 0 c c )>0 •KpCVrS^ " ^p( -r N N 0 •Vvs^ J Time (t) Fig. 4.12 System Response. Digital PID algorithms are flexible and various modifications are possible to improve control quality. From equation (4.14), the P-action term and the I —action term have the same sign when the controlled variable is moving away from the set- point (BC arid DE in Fig. 4.12). But they have opposite signs when the controlled variable is moving towards the set-point (AB and CD). Obser- ving this property, COX el al. (23) proposed a strategy to tmprove the control quality. They selected a "set-point band" (SB) such that - 120 - K in Eq. (4.14) is made zero when the response P is outside SB, and the P-term sign is opposite to 1 that of the I-term (AA' and CC ). For further improvement in control quality, TAKAHA- SHI et al (116) suggested making K higher P outside the band (B'C and D''E) and much smaller within the band (A'B' and CD'). These modifications are also included in the control system developed here. - 121 - 4.5.3. Improved Derivative Action Fig. 4.13 Four-point difference. Since differentiation is sensitive to and accen- tuates data errors and noise, some smoothing must be accomplished before the signal is read by the computer. Noise reduction is achieved by the use of low pass analoque and digital filters. In addition, a four-point difference algorithm is employed to compute the derivative action (12,116 ). Assume four points C^ to equally spaced at the sampling interval (Fig. 4.13) (C +C +C + C } Define C = I N N-l N-2 N-3 122 + 0.5 T s thus C C + 3 C 3 C. (4.15) N N-3 N-l N-2 Ac 6 T s The amount of additional computation in this algo- rithm is minimal, but it requires two additional memory locations to store past values of controlled variables C(t). This form of derivation action is adopted in the control system used herein. - 123 - '4.5.4. Tuning of PID Control Tuning ' of controllers for optimum control action for a given process is one of the most difficult problems engineers face in the process industry. The rule of thumb, of ZIEGLER and NICHOLS ( 139) is the most simple procedure devised for such purposes. There are two methods', one is based on the step-input response pattern of a process, and the other employs information obtained on the stability of a process under P-control. The rules were developed from ZIEGLER's experiments on 1 various processes and NICHOLS analysis. The criterion for optimum performance is minimiza- tion of the Integrated Absolute Error(IAEj, 00 4 IAE = / /e(t) / dt evaluated for a free unit-step response which starts from an equilibrium state. In the first method, the process dynamics are reduced to only two parameters, R and L in Fig. 4.14. This method is employed here. - 124 - Fig. 4.14 Unit-Step response of a process R is the maximum slope of a tangent drawn to the Unit-Step input response of the process being con- trolled, and L is the time at which the tangent intersects the time axis. ZIEGLER and NICHOLS suggested the following .adjustments as optimum K = 1-2/ , = 2L , = 0.5L (4.16) c rl for an analogue controller of the form G C (s) = KC (1+ 1 + T,d s ) T.S where K , T. and T, are gain, integral and deriva tive time constants respectively. - 125 - A modified version of the above tuning rule has been suggested by AUSLANDER et al.( 6 ) for digital PID algorithm (Eq. 4.14), as follows K = 1.2 - K ; K = > K =0.5 to 0.6 p ][ I d 2 R(L+TS) 2~ r(l+h T ) R.T R.T s s s (4.17) where T is the sampling period This rule converges approximately to the ZIEGLER - 1 NICHOLS result (Eq. 4.16) at the limit of T 0. The quality of control deteriorates when the sampling interval (T ) is large compared to the dead time (L). g And also the tuning rule fails when L/T is very small. s The Equation (4.17) is the basis for tu ning the control .system used here. - 126 - 4.5.5. Effects of Sampling Fig. 4.15 Illustration of phenomenon of aliasing. A digital controller generates output by discrete com-* putation and differs from analoque control in two res- pects; (i) the input to a digital controller must be quantized (analoque-to-digital conversion) if the ori- ginal signal is analoque, and (2) digital computation is performed only at discrete times instead of conti- nuously, so that a sampler is required for the input side and a holder on the output side of the computer (116). SCHWARZENBACH ('l07) suggests that the selection of the sampling interval and the length of the sanple function to be analysed must be made with care since both can adversely affect the accuracy of the resulting spectrum. They can also directly influence the computational time - 127 - required. For the samples to be truly representative of the ori- ginal signal it must be possible to reconstruct the signal accurately from the samples. The well known sampling theorem of SHANNON (116') suggests that reconstruction of the signal is possible only when the sampling frequency is at least twice the highest frequency component present in the signal. In order to determine the sampling rate, the dynamic characteris- tics of a process in a time series should contain all components of the signal at frequencies up to one or two orders of magnitude greater than the reciprocal of the smallest significant time constant of the process. In practice the signal from the process almost always contains components extending to much higher frequen- cies than the required data because of noise contami- nation, and this noise must be taken into considera- tion . Selecting a sampling rate sufficiently high to record the noise accurately results in an excessively large amount of data for processing. This would be computationally wasteful. But reducing the sampling rate can give misleading results since the high frequency components then appear ds though they are of lower frequency. This phenomenon is known a ALIASING. The low-frequency component thus produced has the same amplitude as the original signal, but > its frequency is the difference between the original and a multiple of the sampling frequency. To illus- trate this SCHWARZENBACIi (107) considers a signal of - 128 - constcint magnitude but contaminated by noise at 50 Hz. If sampled at 16 Hz, a noise signal of 2 Hz. would appear ( see Fig. 4.15 ) . To reduce the aliasing effect of sampling in digital control systems, the high frequency noise component should be removed before sampling. It is not possible to remove aliased components after sampling since they are indistinguishable from signal components at the aliased frequencies. Noise can be reduced by the insertion of an appropriate low pass analoque and digital filters between the measuring element and the input to the digital control algorithm (see Fig. 4.7). Digital Filtering Algorithm The two most common algorithms used for digital smoo- thing are, (1) the arithmetic average and (2) the digital lag The arithmetic average produces a mean value on N input samples for use in the control algorithm N 1 i ~ (4.18) Y N 1=1 where x and Y are the filter input and output respectively.N is the number of inputs samples avera- ged over one control sampling period. - 129 - The difference form of the first order lag is defined as (ref 47) Vi — (4-19) and the design parameter Q in terms of the filter time constant T,. and the input sampling period T is; I s q._ 1 CsJ T /T for T /T >>1 f s f s i-e^sAf Neither algorithm possess any particular computational problem but each one requires one memory location for data storage. The high attenuation of the averaging algorithm for frequency ( = 1/NT ), can be used to " s advantage to reject a strong periodic component at a fixed frequency . This method was selected as the digital filter for the control system used herein (Fig. 4.7) - 130 - 4.6 Speed Control MANUAL CONTROL Td(s) DIGITAL STEPPING STEPPING MOTOR H SPEED MOTOR DRIVE-UNIT REDUCTION CONTROLLER GEARBOX Fig. 4.16 Speed control system The speed control system used is shown in Fig.4.16. The feedforward part comprises a digital speed con- troller, stepping motor drive unit and a stepping motor is connected via a reduction gearbox to the engine. The stepping motor can be controlled manually or by the digital controller. Input to the stepping motor drive unit is in pulse form. The engine speed is measured from an angular posi- tion encoder connected to the crankshaft of the engine by a torsionally stiff coupling. The output of the encoder is transformed into meaningful form by a speed measuring interface (see chapter 3). - 131 - This is then read by the'computer for corrective action by the digital controller. Assuming dynamometer torque (T) and governor lever position (R) are completely independent variables and uniquely define the;running speed of the engine and dynamometer shaft (ft), the equation of state becomes ; ft = f (R, T ) For small changes in both governor lever position and brake torque, the change in engine speed becomes, dft = ^ft\ dR + 3R\ dT 3RJ T i.e. = K dR + K dT — (4.20) an m j. where K = _8ft\ speed gain with respect to 3Ri T governor lever position at constant brake torque K = 9ft speed gain with respect to 9T R brake torque at constant governor lever position Hence the problem of engine speed control is trans- formed into one of finding a simple governing equation to estimate governor lever position for large speed and torque change. - 132 - Suppose an engine has to be.governed at speed (fl ) 2 for a given brake torque (T ) from an initial speed 2 (f^) and torque (T ) , (Fig. 4.17). 1 Engine'Speed —• Fig. 4.17 Speed control sequence. Assume that the brake torque remains constant for engine speeds between fi^ and Thus the Equation (4.20.) reduces to ; dft = dR Kt Since constant torque (T^) is assumed between and remains constant Kt 3 /?3 i.e. dfi = K J dR J t R fi-, n (« - = K (R - R ) (4.-21) 3 t 3 ± - 133 - whore R^ and R^ are governor positions at ft^ and ft^ for torque T^ Now assume that the governor lever position remains at R^ for torque change from (3) to (2) , see Fig. 4.17, Thus the Equation (4.20) reduces to , dft = K_ dT K. Since the governor lever position remains fixed at R-, the K remains constant, j K ft T i.e. J ddfnt == K„K r IJ dT n T 3 x i.e. n - n = K (T - T ) (4.22) 2 3 r 2 1 Adding Equation (4.22) to Eq. (4.21), yields = K (R R + K (T " "l T 3 " l> R 2 " V i.e. R - R, = 1 (« - FI^ - K (TJ-TJ^) 3 2 R k t K^ If suffices i and f are used for initial and final conditions, then R (f! fi (T «P " i - i F" i' " !r F " V T K t -134- where K and K can be obtained experimentally T R K s If a proportional gain ( p) i introduced to give S flexibility in the governing equation for speed control In practice, to achieve a set-point (speed and torque), the torque and governor lever position are changed alternatively or on a time sharing basis to optimise the total system response. Due to the type of eddy-current dynamometer used, the response of the torque control system is slower than the speed control unit. Hence the assumption that torque remains constant between engine speed changes ft^ and ft^ (see Fig.4.17) is a reasonable assumption to make. -135- 4. 7 Software Design Considerations In Direct Digital Control (DDC) execution speed is of prime importance. External or internal interrupts of a system can occur randomly and/or in a defined sequence. For instance, the engine test-bed at Imperial College utilises a hardware R-C oscillator to initiate a defined sequence of interrupts every 0.05 sec to invoke the torque control routine (see chapter 5). Three of the available interrupts of the system are used by the software alarm routine to register engine para- meters such as low oil pressure, high oil tempera- ture, and high water temperature for emergency shut down of engine operation. The limits of these parameters are pre-set.Any single limit excursion • initiates an interrupt to invoke the software alarm routine. These interrupts can be classified as randomly occuring interrupts. The software, there- fore must be capable to recognise the urgency and service interrupts as quickly as possible in a descending priority order. For other input/output units such as ADC/DAC, execution time should be comparable to the hardware response. Memory requirement for programs is of significance in two respects ; (1) as in any microcomputer system the cost of the memory is likely to be many times that - 136 - . of the processor itself and will be the domi- nant element in the total hardware cost. (2) any increase in memory requirement also natu- rally decreases the execution speed, which is undesirable in real-time operation. In order to achieve the above requirements, the com- plexity of the control algorithms are deliberately kept to a minimum without adversely affecting the control quality of the system. Another important requirement is to use the computer hardware in the most efficient way to ensure fast response and maximum utility of the equipment. From the above requirements one can say that the high level languages give concise and convenient facilities at the expense of increased memory requirements and running time, whilst low level languages give rapid access to every hardware feature of the computer at the expense of some tedious coding. Although there are efficient compilers available now, they are not yet at the stage of matching the benefits of the low level languages. A professional programmer who is experienced in the instruction set of the par- ticular computer can produce a program that is more efficient than that produced by a good compiler. Hence a low level language (TMS 9900 assembly) was - 137 - chosen as the basis for 'program development of the new engine control system at Imperial College. Activities required during engine control were divi- ded into small modules, each responsible for a cer- tain function. A proper combination of these modules will produce the required control software. In short, the program development was based on a modular pro- gramming concept. A review on modular porgramming concepts is outlined in chapter 5. - 138 - CHAPTER 5 CONTROL SOFTWARE DESIGN 5.1 Introduction With a process control such as that for a computeri- zed engine test-bed, the software organisation assumes an overriding importance. This is because the soft- ware has to provide facilities for fast interaction with the plant in real-time and comprehensive testing and checkout. A structural study has been carried out to decide the optimal framework to reconcile the diverse programming objectives of an engine test-bed facility. The test-bed should be available to cater for every conceivable test. Improvements should be easy to adapt and test while the original system remains operational. If a newcomer or specialist wishes to write programs for part of the system, these segments should be readily integratable. In essence the program structure decided upon was modular and the software wad written in accordance • with the following guideline ; 1. Memory requirements and execution time being minimal 2. Simplicity and logical segmenting to reduce development efforts. 3. Care should be taken to ensure that the computer - 139 - is not delayed while waiting to service a relatively slow device 4. Flexibility and ease of expansion to accommodate other possible testing requirements. 5. Maximum use of the conversation mode for computer operator interaction. Based on the above considerations and the fact that the majority of the operations were to be executed in real- time, a fast and efficient symbolic Assembly language of the TMS 9900 microprocessor was extensively employed. An Assembly language is a computer-oriented language for writing programs. It consists of machine instructions and assembler directives. In machine instructions the user assigns symbolic addresses and specifies instructions by means of symbolic operation codes called mnemonic opera- tion codes. The user specifies instruction operands by means of symbolic addresses, numbers, and/or expressions. The expressions can consist of symbolic addresses and/or numbers. Assembler directives control the process of; (1) making a machine language program from the Assembly language program (2) place data in the program and (3) assign symbols to values to be used in the program - 140 - Assembler directives that pl'ace data in memory locations allow the user to assign symbolic addresses to those loca- tions This Chapter introduces the concepts of Modular Pro- gramming based on the review by TURNER (126) with parti- cular reference to the structure of the Control Soft- ware of the microprocessor-based engine test-bed facility developed by the author at Imperial College. A detailed explanation of the task of individual modules are pre- sented. Finally, program development tools are discussed. - 141 - 5.2 Modular Programming and Control Software Structure Software engineers have long recognised the fact that the larger the programs they write, the greater the difficulties encountered. TURNER (126) advocates that the difficulties inherent in the design of large programs can be overcome by segmenting them into smaller and more managable modules. • His review on the Structure of Modular programs, indicates that each module should be limited to between 50 and 200 lines of executable code (126). This means that a large system may have several times as many modules in a program as there are lines of code within a module. The combined structure configured by those modules is as important as the structure of each individual module. A module may be defined as a named sequence of program statements, with a single entry and a single exit. It can be compiled by itself and apart from its own local variables, can reference only those global variables that are explicitly ipade accessi- ble to it (eg. COMMON blocks in FORTRAN subroutine). The purpose of structured programming is to devise programs- that are at once easy to understand, reliable in operation and are easy to maintain or extend. Structured programming of the individual - 142 - modules can help achieve this ^oal, but the structure of the program into modules is itself an important factor. TURNER claims that a program unstructured at the module level (one in which modules can transfer control to other modules arbitrarily) is just as un- manageable as a single module in which GOTO statements are used indiscriminantly. Well-Structured programs are mostly characterised as "hierarchical" or "tree-structured". TURNER'S definition for hierarchical structure is as follows; "Any program structured in levels, where the modules on a given level may or may not be shared by the modules pn the higher levels". The extent of the sharing of lower level modules is important. If too much sharing is allowed, it becomes difficult to separate the functions performed by one branch of the hierarchy from the functions performed 11 by other branches. A tree-structure" is a specific type of hierarchy in which sharing is not allowed. In a pure tree structure, a given lower level module may be called only by a single module on the next higher level (Fig. 5.1). TURNER has noted that for a large class of programming problems the pure tree structure, with a few desirable exceptions, is the best model to choose in designing modular programs. - 143 - Fig. 5.1 Pure Tree - Structure A module is classified as functionally strong if all its elements contribute to the performance of a single task. A collection of functionally strong modules in a pure tree structure is initiated through a single main or root module. The root module is responsible for control over the entire collection of modules. Each of the modules directly called by the root module controls a major branch or subtree of the program. For instance, the new control software developed by the author for engine test-beds at Imperial College, illustrated in Fig. 5.2, has the routine called CONTROL as the root module. This root module controls two major branches, devoted to control engine speed and torque respectively. Each branch or subtree of such a tree structure is - -144 - functionally and structurally separate from the other subtrees. TURNER indicated that there is a general tendency for the top level modules to contain the control logic of the program while the lower level modules handle the details of the processing. This is quite true, with the Control Software where the root module (CONTROL) is mainly involved in scheduling or controlling the speed and torque control routines. In a tree structure, each subtree is structured into further subtrees. As a result, each module occupies one specific level within the structure and calls only modules on the level immediately following it and is the sole caller of any modules that it uses. Again modules are not shared. Finally, to ensure that each branch of the tree remains isolated from other branches at the same level, the * locality of reference should be preserved (126). A program retains locality of reference if all communication between modules is by means of the-parameter lists passed bet-ween a calling module and the modules it calls. Such a program may be said to be parameter driven. When- ever modules are allowed to communicate by any other means such as through shared storage areas (eg. COMMON blocks in FORTRAN or GLOBAL variables in MACRO), the locality of reference is lost. When locality of refer- ence is violated, it becomes possible for one branch of the tree to interact with another branch without the - 145 - 'knowledge of the higher level modules which suppo- sedly control the respective branches. As a consequence, each of the higher level modules has lost some of its control over its branch of the program. Some of the several fundamental characteristics of a program having a pure tree structure are as follows > (i) It should consist of a collection of modules each of which has functional strength. (ii) At each level, each module has exclusive control over the modules it calls. (iii) Each branch of the program is isolated from the other branche at the same level (iv) The program should be parameter driven, i.e., locality of reference should be preserved. Advantages of a Pure Tree Structure The advantages of a tree structure are consistent with the major requirements of structured programming and can be summarized as follows j (i) the program is easier to understand because each level of the program is structured into a small number of separate branches. (ii) Minimization of interaction^ between modules, result in a program of high reliability - 146 - (iii) Because of the separation of functions within the program, maintenance is easier. Maintenance can be performed on any one branch of the tree with minimal impact on the other branches. TURNER'S review establishes that the number of bugs in a system grow as the number of interactions increases. Therefore, minimizing the interaction is of great import- ance. These advantages suggests that in a given case, even where it is not possible to achieve a pure tree structure, it is most important to design a program to be as treelike as possible and avoid the lattice like types of hierarchical structures (126). As illustrated in Fig. 5.2, the control software retains the major advantages of the pure tree structure. But - however it violates the characteristics of a pure tree structure in two respects; (i) the locality of reference is not completely observed (ii) restrictions against module sharing is not totally maintained A common storage area was allocated for all the variables used by the software as shown in Fig. 5.3. Some of those variables are shared by more than one module and hence the locality of reference is not preserved. It also - 147 - violates the second restriction by allowing the modules RDSPD, CURVFIT and DECBIN to be shared among other modules. In any practical system such as the Control Software, there are a number of activities which are performed repetitively at many different points. Where a particular function is required in a number of different places it is more logical to code a single module to perform that function and to allow that module to be shared. The alternative would be to recode that function wherever needed. This will obviously increase the memory require- ments and the coding effort, which is not a desirable feature. Thus: module sharing allows the program - designer to reduce the coding effort and the memory requirements. TURNER suggested that the major advantage of module sharing is that it allows the concealment of superfluous details of the implementation of a particular function from the higher level modules which make use of that function. If a given function were to be hard coded wherever needed, then each module that required the function would have to know details of its algorithm. The possibility would arise for inconsistencies in imple- mentations, as well as for high overhead associated with maintenance to the function. The preceding discussion implies that!in order to retain the major features of a tree structure, a program may be - 148 - divided into groups; (1) Main Pr.dgram - Which shall retain a pure tree structure that allows no sharing. and (2) Shared Subprogram - Which may be shared. A subprogram may be called by more than one module of the main program and these calling modules may be on different levels within the structure of the main program. But each subprogram is built as a separate entity and optionally need not appear on the structure of the main diagram. Fig. 5.2 illustrates the structure of the Control Soft- ware developed by the author which conforms to the above criteria. Prior to the detailed description of the Control''Soft- ware, some key features unique to programming TMS 9900 are outlined in the next section. These features are extensively employed in the development of the control software. Since the system is not equipped with Floating Point Arithmetic, the control algorithms were trans- formed to accommodate integer arithmetic operations. kdft trans print spcontrl t Qcontrl piaxbrak flaxeng 0ec8in - (a) Main Program Structure (b) Shared Subprograms Fig. 5.2 Control Software Structure - 150 - WORKSPACE FOR TIBUG LEVEL 8 INT. LOW OIL PRESS. LEVEL 9 INT. HIGH OIL TEMP. LEVEL 10 INT. HIGH WATER TEMP. LEVEL 11 INT. LOWEH GOV. LIMIT LEVEL 12 INT. UPPER GOV. LIMIT LEVEL 13 INT. R-C CLOCK LEVEL 14 INT. SPARE LEVEL 13 INT. SPARE XOP - 0 XOP - 8 WORKSPACE FOR TI3UG WORKSPACE FOR LINE BY LINE ASSEMBLER CONTROL SOFTWARE VARIABLES, COEFFICIENTS, CALIB. CONSTS. etc. LINKING ADDRESSES FOR MODULES HEADINGS, MESSAGES etc. MEMORY EXPANSION AREA (EMPTY) LINE BY LINE ASSEMBLER & TIBUG LOAD VECTOR Fig. 5.3 Memory Map. - 151 - 5.3 Key Features Unique to » Programming TMS 9900 The TMS 9900 is equipped with 69 instructions including byte and bit addressing. The instruction set can perform one of the following operations ; Arithmetic (includes hardware multiply and divide), logical, comparison or manipula- tion operations on data. Loading or storage of internal registers (program counter, workspace pointer, or status) Control functions Data transfer between memory and external devices via the communication-register unit (CRU) The CRU provides up to 4096 dix-ectly addressable input bits and 4096 directly addressable output bits. Both input and output bits can be addressed individually or in fields of from 1 to 16 bits. The processor uses a concept called the "Workspace Register" which is a unique architectural feature of the TMS 9900. In contrast to the push-down stack found in many mini-computers and microprocessors, the workspace register file is a contiguous block of 16 words in memory used as working registers. Storage of intermediate results and subroutine addresses, as well as index register.functions, is - 152 - accomplished in the workspace (131). For example a subroutine may have its own 16-word workspace. A workspace pointer (a 16-bit register within in the arithmetic unit) points to the first word of the appropriate workspace for any given program. This is especially significant in systems where interrupt pro- cessing is used, or where multifunction applications (such as engine control) require frequent changes of program context. When an interrupt occurs, there is no need to save register contents and a return address in a stack or other block of memory, because they are all in the workspace. The Workspace Pointer (WP), Program Counter (PC), and Status Register (ST) are saved in three words of the workspace (R13, Rl4-and R15 res- pectively) , the WP is set to a new value, pointing to the appropriate service routine and processing resumes around a new set of workspace registers. In other words, the workspace concept gives the program designer 16 registers for every routine. Since these registers are memory words, there is no need to save and restore register contents when jumping from one routine to another. Other important feature of the TMS 9900 is its eight addressing modes Workspace Register Addressing Workspace Register Indirect Addressing - 153 - Workspace Register'indirect Auto Increment Addressing Symbolic (Direct) Addressing Indexed Addressing Immediate Addressing Program Counter Relative Addressing CRU Relative Addressing - 154 - Description of Control Software As outlined in section 5.2, the Control Software is categorised into ; (1) the main program which retains the impor- tant features of a pure tree structure and (2) Subprograms which can be called by more than one module of the main program. The calling modules can be on different levels within the structure of the main program. The main program is initially discussed, in top- down fashion. It consists of four levels (see Fig. 5.2) ; Level 1 - MAIN Level 2 - CONTROL Level 3 - TQCONTRL, SPCONTRL, MAXBRAK, MAXENG PRINT & TRANS Level 4 - COMSTEP, CUTOFFPT, PID, DACSET, SETBEO, SETGOV, RDTQ & DECIMAL Finally, the descriptions of the subprograms (RDSPD, CURVFIT & DECBIN) are presented. - 155 - '5.4.1. Main Program L 1.1 - MAIN This routine performs the function of printing headers, messages and various instructions for the user. It also initialises interrupt vector addresses, engine parameters (such as idle and maximum speed of the engine under test which are provided by the user) and clears system flags. It adopts a conversational mode, which is easy to understand by any user and to communicate with the user. This strategy is used with other modules as well. There are two test modes available; (1) Steady-State test and (2) Transient - test According to the user requirement the test mode flag is set by this routine. Before this module invokes the CONTROL routine, it resets the governor lever position and clears the interrupt flags. L 2.1 - CONTROL The main task of this module is to schedule various routines to perform the required engine control (speed and load). A R - C clock is linked to the interrupt level 13. This interrupts the system every 0.05 sec, to invoke the TQCONTRL routine - 156 - which performs the torque control function. Initially, this module resets all system flags and disables the clock interrupt by setting the Interrupt Mask on the Status Register. The level of the highest priority pending interrupt request is continually compared with the interrupt mask contents. When the level of the pending request is equal to or less than the mask contents (equal or higher priority) the interrupt is taken after the currently executing instruction has completed. This routine then enables the interrupt line which i.s common to all the interrupts used here. Unless this line is enabled, these interrupts cannot interrupt the processing. According to the test mode flag (which is set by the MAIN program), this module either (1) activates TRANS routine which performs the transient test scheduling. (See L 3.6 - TRANS) or (2) performs the steady state test operation. For steady state test, the user inputs the required speed and torque and they are varified. For example, the required speed is checked whether it is within the speed limits (maximum and idle). Similarly, the required tor- que is checked using the MAXBRAK and MAXENG routines. These routines gives the maximum torque of the brake and the engine respectively with respect to the required speed. - 157 - These values enable this module to check the validity of the required torque. To perform engine control, the following sequence of operations are conducted by this module ; 1) enable clock interrupt 2) activate SPCONTRL routine which performs speed control 3) disable clock interrupt 4) if five consequtive set conditions are within the tolerance (i.e. 0.2 mKp and 10 rpm respectively for torque and speed), the set parameters and the governor lever positions are printed. 5) GOTO (1) and continue the control operation - 158 - CLOCK INTERRUPT ENAOLEO 10 11 12 13 14 110 31 31 - CONTROL V l\ 32 - TQCONTRL. 33 - SPCONTRL 32 IN - N th Clock Interrupt after enabled V 33 0.0 0.05 0.10 0.15 0.20 0.50 Fig. 5.4 Status of Modules with respect to time .For instance, the execution of the SPCONTRL and the CONTROL module can be terminated by the clock interrupt and the control is transferred to the TQCONTRL routine. Once the clock interrupt is serviced by the TQCONTRL the execution of the terminatd module resumes at the point where it was interrupted by the clock. Fig. 5.4 shows the status of the three modules (CONTROL, TQCONTRL & SPCONTRL) with respect to time. The arrows used, shows the flow of control among modules. - 159 - L 3.1 - TQCONTRL (a) Loading Sequence (b) Unloading Sequence arrows indicates control sequence Fig. 5.5 Torque Control Sequence This module essentially controls the torque developed . by the eddy-current dynamometer. The output of this module controls the excitation level of the coil of the dynamometer via an excitation unit. The maximum voltage that can be applied to the excitation unit is 1 volt. This routine performs various checking (eg. new set point, PID flag etc) clears the clock interrupt flag and measures the speed and torque of the engine using RDSPD and RDTQ routines respectively. For the loading sequence, initially a 1 volt pulse is applied to the excitation unit by this routine as - 160 - illustrated in Fig. 5.5 (a). The pulse width depends on the difference of the required and measured torque and is estimated by the CUTOFFPT (See L 4.2 CUTOFFPT) routine. TQCONTRL routine monitors the torque and when the rate of change of measured torque becomes negative, the PID routine (a three term controller) is invoked. This type of loading sequence is employed to optimise the system response. For unloading, the excitation voltage is set to zero until the difference between the measured and the required torque is 2.0 mKp. At this point, the PID is invoked. Fig. 5.5 (b) shows the unloading sequence employed here. L 3.2 ~ SPCONTRL This routine performs the necessary operations to control the speed of the engine. It reads the engine speed using RDSPD program, checks the validity and stores the mea- sured data. To accomplish the required speed, the COMSTEP routine estimates the correction (in both direction and magnitude) needed on the govenor lever. A stepping motor and reduction gearbox is employed for the rapid control of the govenor lever. The SETGOV routine is used to actuate the stepping motor at a rate of 200 steps/sec, by the estimated correction. This stepping rate being the maximum for the motor used, at which the repeatability test was satisfied between the govenor lever limits (idle and max. speed). - 161 - 'After each correction is performed, settling delay of 0.5 sec is enforced to reduce the undue overshoot of speed. L 3.3 - MAXBRAK 100 ^NORMINAL TORQUE (NTQ) » 41.5 mKp C3 U n 0C3CT xvCURVE (2) O O O NOMINAL SPEED (NSPD) = 2300 rpm 100 (100 x SPEED)/(NSPD) Fig. 5.6 TORQUE Vs SPEED MAP FOR DYNAMOMETER (TYPE 3WB 15) Fig. 5.6 shows the normalised Torque Vs Speed map of the dynamometer used here. The two curves (1) and (2) are fitted by two third-order polynomials (using Gaussian elimination technique, see Appendix 3) and they are ; 2 3 Y = 1.0 + 2.35 X - 0.0213 X + 0.000077 X and 2 3 Y = 289 - 3.0 X + 0.013 X - 0.000020 X where Y = normalised torque and X = normalised speed - 162 - respectively. The main task'of the MAXBRAK module is to estimate the available maximum torque of the dynamometer for a given speed. To accomplish this, it initially performs normalisation on the input and then runs the CURVFIT routine which computes the function value of the given third-order polynomial and returns the function value at register zero (RO) of the MAXBRAK. This routine performs the necessary operations on the estimated value and returns the Torque Value at RO of CONTROL module, which is the calling routine (see Fig. 5.2). Thus enables the CONTROL module to check the validity of the test point given by the user. •Two contiguous segments of 4 words each were reserved to store the coefficients of the above two polynomials. Starting addresses of each segments are labelled as BR1 and BR2 respectively. L 3.4 - MAXENG Fig. 5.7 Torque Vs Speed Map for Perkins 4.2 36 Engine i - 163 - Fig. 5.7 shows the Torque Vs Speed map of the engine (PERKINS 4.2 36) used here. It is fitted by a third-order polynomial using Gaussian elimination technique and is ; 2 Y = 120 + 0.144 X - 0.000046 X where Y = the torque and X = speed This module computes the maximum torque of the engine for a given speed by invoking the CURVFIT routine. This enables the calling module (CONTROL) to check the validity of the test point. A contiguous block of 4 words is reserved to store the coefficients of the above poly- nomial. Starting address of the block is labelled as ENG. L 3.5 - PRINT This routine is used to display the set parameters (speed and torque) and the govenor lever position on a tele- type. L 3.6 - TRANS This module performs the necessary operations to conduct the 1979 proposed USA Federal Smoke & Emission test, which will be enforced in 1983. Since the control system at present, is not equipped with any fast peripherals (eg hard disk) or enough memory capacity to accommodate the whole test schedule, a selected/ part of the schedule - 164 - only is tested. The system has only 4K words of memory and part of it is used by the control software and its workspace, the rest is only available to store the selected part of the test. Whenever this module is actuated by the CONTROL program, it provides the next set point and stores the current measured set para- meters in the memory. When the LSI-11 is commissioned to communicate with the TMS 9900, the test points will be provided by the LSI-11. In other words, this module is only included to show the capability of the control software rather than the actual test. The test schedule is given in Appendix 2. L 4.1 - COMSTEP The speed governing Equation (4.23 ) is the basis for this module. The constants of the above equation are found experimentally (see chapter 6). It computes the correction (in magnitude and direction) needed oh the governor lever to achieve the required speed. Positive correction indicates an increase in speed and vice versa. The inputs to the module are ; measured speed (rpm) measured torque (lOx mKp) required speed (rpm) required torque (lOx mKp) The output, the required correction will be returned at register RO of the calling program. - 165 - L 4.2 - CUTOFFPT As the maximum input to the excitation unit of the dynamometer is 1 volt, a pulse of that amplitude is applied to the engine-load system and the torque response was observed. The experimental results shows that for a same initial speed, the torque overshoot increases with pulse width. A series of test was conducted to establish a relationship between the torque overshoot and the pulse width at a particular initial speed, for two initial conditions ; (1) Zero initial condition . and (2) Non-zero initial condition (say above 1 mKp) respectively Fig. 5.8 shows the typical torque response for a pulse input. -OVERSHOOT TIME — TIME—<* Fig. 5.8 Torque Response for Pulse Input. - 166 - A Linear relationship was found for the torque overshoot and the pulse width for a particular speed (see Chapter 6). This relationship is the basis for this module. It estimates the pulse width to achieve a required overshoot at a given speed by making suitable speed correction on the established relationship. Initially, this module uses the RDSPD routine to measure the speed. It was observed that for a given pulse width and initial speed, the overshoot is greater for non-zero than zero initial condition. This may be due to the smaller "dead time" for the non-zero initial condition (see Fig. 5.8) In any practical system, there is always an initial delay before it begins to response to an input; this is known as "dead time". This type of pulsing technique is employed during loading, to optimise the brake response. L 4.3 - PIP This module is based on the Velocity form of the three term controller, incorporating all the additional fea- tures, discussed in chapter 4. The inputs to the module are ) 1) measured torque and 2) required torque - 167 - The output of the module gives, the incremental correction needed on the torque in register RO of the calling program. L 4.4 - DACSET Fig. 5.9 Characteristics of the Dynamometer. The characteristics of the dynamometer used here were established experimentally (see Chapter 6). Fig. 5.9 shows the typical shape of the curves obtained. Each curve consists; of two parts ; 1) Non-Linear for X < PT (this is fitted by a third-order polynomial) - 168 - and 2) Linear for X ^ PT (this is fitted by a straight line) where X = (1000 x TORQUE)/ NTQ This module estimates the required excitation voltage for a given speed and Torque, using the above character- istics of the brake. The output will be returned at register RO of the calling program. L 4.5 - SETBEC AMPLIFIER Fig. 5.10 On-line control of Excitation unit. For on-line control of the excitation unit, the digital output of the computer is fed through a 10-bit Digital- to-Analoque Converter (DAC) and via an amplifier (gain = 0.1) to the excitation unit (Fig. 5.10). The maximum output of the DAC (i.e. when all of its bits are set to '!') is 10 volt. This module sets the bits - 169 - of the DAC according to its input using the DAC cali- bration constants obtained experimentally (see Chapter 6). L 4.6 - SETGOV The purpose of this module is to actuate the stepping motor to control the governor level position. Input to this module is the required number of steps and the direction of motion of the motor. Positive steps means increase in speed and vice versa. According to its input, it actuates the motor at a rate of 200 steps/sec. This stepping rate being the maximum for the motor used at which the repeatability test between governor position limits was satisfied. L 4.7 - RDTQ ANALOQUE FILTER OUTPUT FROM THE LOAD CELL TO THE COMPUTER DIFFERENTIAL AMPLIFIER Fig. 5.11 Torque Monitoring by the Computer. - 170 - This module takes twenty load cell readings spanned over a period of 20 ms and averages them to get a mean value. This mean value eliminates the mains frequency (50 Hz) noise contamination and possibly attenuates other frequency noises as well. This mean value is transformed to torque units (mKp) by using the cali- bration constants of the Analoque-to-Digital Converter (ADC). L 4.8 - DECIMAL The main purpose of this routine is to transform the binary number into ASCII decimals and displays them on a teletype. - 171 - 5.4.2 Shared Subprograms (1) RDSPD This module is used to measure the speed of the engine. When there is a revolution pulse from the angular shaft encoder of the engine, the Speed Control interface disables the speed coun- ter, transfers the contents of the counter to a latch, and then sets the speed flag (see chapter 3). The normal sequence of speed read is ; 1) Clear speed flag 2) Wait for speed flag to be set 3) Read the latch Clearing and waiting for the speed flag ensures • that the speed read will never take place during the period when the contents of the speed counter is transferred to the latch and eliminates a possible speed read error. Testing the speed flag also prevents reading more than once in a revo- lution of the engine. Let us examine the above procedure of speed mea- suring for a worst possible case. This will be at the lower engine speeds and at say 600 rpm. Then the time between the revolution pulses will be 100 ms. - 172 - Suppose the software clears the speed flag just after being set by the revolution pulse, then it has to wait a minimum of 100 ms before it can read the speed. This type of time delay is undesirable in real-time opera- tions and should be avoided as much as possible. This author adopts a different approach which elemi- nates this time delay but allows more than one speed read in a revolution. To begin with, this routine does not clear or wait for the speed flag, instead it takes three consequitive speed readings designated as SI, S2 and S3 respectively. REVOLUTION PULSE .REVOLUTION PULSE REVOLUTION PULSE II Ji11 1 III S1 S2 S3 S1 S2 S3 S1 S2 S3 S1 « S2 S1 i S2 S2 - S3 . '(a) (b) (c) Fig. 5.12 Three possible cases of speed read Fig. 5.12 illustrates three possible cases of speed read where one of the reading may be wrong. In the first case, two readings were taken before the Revolu- tion pulse and the third was taken during the pulse. - 173 - Similarly in the second case, the first and the third were taken before and after the Revolution pulse res- pectively and the second during the Revolution pulse. Finally, in the third case the last two were taken after the Revolution pulse and the first was taken during the pulse. This indicates that if the first two readings are equal then either of them is correct otherwise it is safe to take the third one as correct. It should be noted that two speed readings are not possible during a Revolution pulse because each speed read takes about 20 ps whereas the speed control inter- face completes its task in 1 ps (i.e. transferring the contents of the speed counter to latch and setting up the speed flag). This criteria is the basis for the RDSPD routine. In this method, speed may be read more than once in a revolution since the speed flag is not tested. But this has been taken care of by the SPCONTRL routine which imposes a 0.5 sec settling delay between speed corrections to restrict the engine from overrunning. In other words, speed may be read more than once in a revolution but it will not be serviced immediately. This module is shared among SPCONTRL, TQCONTRL, CUTOFFPT and SFTALARM routines. (2) CUKTFIT This module computes the function value (y) for a given input (x) of a known third-order polynomial of the form; - 174 - 2 3 y = a + ,a X + a X + a X x 2 3 4 Before calling this module, the coefficients (a^, a , 2 a and a^) should be initialised to represent the 3 required polynomial. It is shared among MAXBRAK, MAXENG & DACSET routines. (3) DECBIN It receives ASCII decimal digits from the teletype and unpacks them into binary number. It also performs various checks on the input and returns the value at register RO of the calling program. It is shared between MAIN and CONTROL routines. - 175 - 5.5 Fail Safe and Alarm System The TMS 9900 employs 16 interrupt, levels with the highest priority level O and lowest level 15. Level 0 is reserved for the hardware RESET fun- ction which resets the processor and loads the monitor, TIBUG, (see Section 5.6). A contiguous block of 32 words are reserved for the 16 interrupts (each needs 2 words), starting from the memory address zero. In this system the top eight interrupt levels are masked by the TIBUG and the bottom eight are available for our use. They are assigned as below ; Level 8 Low oil pressure Level •9 - •High oil temperature Level 10 - High water temperature Level 11 Lower governor lever position limit. Level 12 - Upper governor lever position limit. Level 13 R-C Clock interrupt (used for the torque control) Level 14 Spare Level 15 Spare The top five interrupts are used for the "fail safe" system. The limits for the first three interr upts are pre-set. The other two interrupts pre- vent the stepping motor from indexing the governor - 176 - lever beyond its idle and maximum speed limits. Any single limit excursion initiates an interrupt which activates the INTERUPT routine, which is described below. INTERUPT and SFTALARM Programmes The INTERUPT module consists of five entry points, and each is assigned to an interrupt level. The interrupt vector addresses are initialised by the addresses of these entry points and the workspace of this routine using the MAIN module. For the governor lever interrupts, this module clears the interrupt flag and indexes the stepping motor by 4 steps in the appropriate direction to de-activate ' the interrupt. This 4 steps being the hysteresis/ backlash involved in the microswitches used for the - limits. It sets a software flag to notify the main program that the governor lever has caused an interrupt. This interrupt does not terminate the engine control operation. For the other three interrupts, this module displays the warning message and activates the SFTALRM routine which brings the speed to idle and energises the tele- type bell. Control operation is terminated. - 177 - 5.6 Program Development Tools The computer system used here is equipped with two firmware routines; . TIBUG Line-by-Line Assembler The TIBUG controls the system operation by inter- facing the processor to either a teletype (20 MA current loop) or other RS 2 32 compatible terminals and offers the use of basic debug commands to develop applications software. The Line-by-Line Assembler accepts assembly lang- uage inputs from a terminal. As each instruction is input, the assembler interprets it, places the resulting machine code in an absolute address and prints the machine code (in hexadecimal) next to its absolute address. The above facilities are inadequate for large program developments. To facilitate such large program developments, two options are available; (1) Prototype development system (2) Cross-Software support The Prototype development system is a stand alone system which has its own TMS 9900 processor with adequate memory, assembler, mass storage media etc. - 178 - It is an efficient program'development tool but it is quite expensive for a "one-off" project. Cross - Software support is economically viable if the user has another computer. At the time when this pro- ject was initiated, the cross-compiler marketed by Texas Instruments was not compatible with the computer (CDC 6 400) of the Central Computer Centre. This forced the author to develop his own cross-compiler. This com- piler was written in Fortran IV and runs on PDP -15 minicomputer (see appendix 1). This compiles an Assembly language program and dumps it on paper tape arid is transferred to the TMS 9900 system via the paper tape reader of the teletype, using the load command of TIBUG monitor. - 179 - CHAPTER' 6 EXPERIMENTATION AND EVALUATION 6.r Introduction This chapter describes the experimental programme carried out during the present work, including the tests conducted and results obtained. A Perkins 4.236 Diesel engine with an eddy-current dynamo- meter (VIBRO-METER 3WB-15) was used as the test equipment. The engine is a four cylinder, natura- lly aspirated with direct fuel injection. Fuel injection equipment is a C.A.V. distributor (DPA) fuel pump with hydraulic governor and C.A.V. injec- tors. Preliminary tests were executed to establish the control characteristics of the various components of the speed and torque control loops, described in Chapters 3, 4 and 5. As illustrated in Chapter 4, the torque control is mainly based on a widely adopted digital PID algorithm. A brief description of the systematic approach used to optimise the response of the torque controller is presented. Finally, to demonstrate the capability .of the com- plete control system a part of the proposed 1979 USA Federal Smoke and Emission Schedule (ref. Feder- al Regulation part 86, vol 44, No.31), to be imple- mented in 1983, was executed. Due to the limited - 180 - memory capacity of the computer used the entire schedule was not run. The results of the tests were discussed from a control point of view. The experimental work is organised as follows ; Speed Control Implementation Torque Control Implementation Optimisation of Torque Control Demonstrating the capability of the control system, using the Proposed 1979 USA Federal Smoke and Emission Test. - 181 - 6.2 Speed Control Implementation As illustrated in Section 4.6, the speed control is governed by the Equation (4.23) ; R R (n K (T f" i = fsE | f " "i> " R f " V kt 4 where fY & ft^ - initial and final engine speed R & R i f " initial and final governor lever positions K p~ Proportional gain S K - Speed gain/brake torque at constant R governor lever position K^ - Speed gain/governor lever position at constant brake torque a series of preliminary tests were conducted to establish the speed gain coefficients K_. and K_ x\ 1 respectively for the test engine. The computer controls the governor lever position using a stepping motor connected to the lever via a reduc- tion gearbox. For each governor lever position (relative to the lower governor limit) and at various manually set braking torques, the corres- ponding engine speeds at steady running conditions were measured by the computer. Fig. 6.1 shows the - 182 - engine map obtained from fhis experiment. It can be seen from Fig. 6.1, that the constant governor lever position lines are nearly linear, Parameter K_. is taken as constant over the entire operational range and is equal to the reciprocal of the average gradient of the constant governor lever lines. Any deviations due to the above assumption will be taken care of by the corrective action of the controller. Suppose K is taken as a function of governor lever Jb\ lines (R), any change in the datum position of R will affect the K - R relationship. This means, that K. the control package becomes less manageable. So it is a good practice to minimise hardware dependent features in the algorithm without affecting its performance. By examining Fig. 6.2 which is in fact an axis trans- formation of Fig. 6.1, can be taken as a function Kt of brake torque. Fig. 6.3 shows the curve obtained for the reciprocal of K and the brake torque. This T is linearized using the least square error method. The Speed Control system has two modes of operation (i) Coarse and (ii) Fine That is, if the speed error (the difference between the required and measured) is less than 50 rpm, speed gain - 183 - K in Eq. (4.23) is set to 0.50. But in all other sp circumstances K is set to 0.75. sp The following are the settings for the speed con- troller; K =0.5 if speed error < 50 rpm K = 0.75 if speed error 50 rpm K = -23.33 rev/min K mkp 1/K = 0.00114(T) 0.093 T + where T is the brake torque in mkp Once the required speed is provided by the operator for a given brake torque, the speed control algo- rithm initially measures the engine speed and the brake torque which were used to determine the values of K and K^ respectively. It then activates the sp) stepping motor in both direction and magnitude to achieve the required governor lever correction esti- mated from Equation (4.23). A settling delay of 0.5 sec is imposed between corrections. The speed control algorithm was tested over the entire operational range with the aid of manual torque control. That is, for a given torque and speed, torque is set manually and the speed is achieved by the speed control algo- rithm. The speed control uses a set-point tolerance of 10 rpm. This control system is used to debug the Torque Control System, described next. \ \ \ \ \ A \ \ 140SMS 160SMS 180SMS 200SMS 220SMS 240SMS 2 0 \ i i * » . © 20SMS 40SMS.60SMS 30SMS 10 Con3t. Gov. Posn Lever Lines M CO 1500 500 1000 Speed (rpm) Fig. 6.1 Torque-Speed .Characteristic of the Engine at Constant Governor lever positions 4 Fig. 6.2 Governor Lever Position Vs. Speed of the Engine at Constant Torques. - 186 - Fig. 6.3 1/K Vs Torque of the Engine - 187 - 6.3 Torque Control Implementation MANUAL CONTROL Fig.6.4 Torque Control Schematic The Torque Control System used is shown in Fig.6.4, where the excitation level of the dynamometer is controlled by the Brake Excitation Control unit (BEC). The output of the BEC unit can be controlled manually or by the computer via a DAC. In order to establish the control characteristics of this sys- tem, a series of static and dynamic tests were per- formed . The static tests were aimed at assessing the linearity of (1) load cell, amplifier and ADC (2) DAC and the dynamic tests to establish the system be- haviour of the engine-dynamometer combination. - 188 - 6.3.1 Static Calibration (a) Load Cell, Amplifier and ADC calibration. The braking torque is determined by means of a torsion box, which is fitted with a full bridge strain gauge, at one end of the dyna- mometer stator. By using static weights and a calibration lever of length 0.5 m, the stator was subjected to static torques and the corresponding strain gauge deflections were monitored by the computer via an ADC. Strain gauge measurements were taken for both loading and unloading and the resulting graph is shown in Fig. 6.5, which is linear. i.e. Torque = 0.029 x (ADC reading) (b) DAC Calibration The computer was programmed to set various bit patterns on the input of the DAC and the corresponding outputs of the DAC were mea- sured using a digital voltmeter. The results of test are shown in Fig. 6.6 which is a straight line i.e. DAC Output (mV) = 9.775 x (DAC setting) - 189 - - 190 - 6.3.2 Dynamic Calibration As illustrated in Section 4.4, the torque (T) developed by the eddy-current dynamometer is a function of stator coil current (I) and the rotor speed (ft) ; i.e. T = T (I, ft) But the stator coil current is controlled by the BEC unit. In other words, if the BEC unit input is (E) then T = T (E, ft ) (6.1) Thus the main purpose of this test is to establish a relationship among the above three parameters in Eq. (6.1). A calibrated d.c supply was used to vary the BEC unit input. For each BEC input and at various manually set engine speeds, the corresponding brake torques at steady running conditions were measured. The results of the test are shown in Fig. 6.7 where the constant BEC input lines are nearly linear. By making a suitable transformation on Fig.6.7 and assuming that constant BEC input lines are linear upto 4000 rpm, then Fig. 6.8 is obtained - 191 - The axis of this plot are normalised using the maximum E = BEC input ( 1 volt) and the nominal torque max of the dynamometer (T^ = 41.5 mKp). This plot is divided into two portions ; (1) Non-linear and (2) linear The non-linear curves are fitted by third-order poly- nomials and they are 2 4 2 6 3 Y = 6 + 363 x l(f (X) - 322 x lcf (X ) + I07xl0" (X ) for X $ 150 500 rpm 4 2 Y = 4 + 167xl0"2(X) - 108X10~ (X ) + 32xlO~6(X3) for x $ 150 4000 rpm where Y = (1000xE)/E and X = (1000 x T)/T__ . max N Similarly the linear curves are fitted by straight lines and they are ; Y = 0.489 (x)+130v0. fqr x >150 500 rpm Y = 0.278 (x)+ 75.0 for x > 150 4000 rpm The above four relationships are used to estimate the BEC input value to achieve a required torque at a given engine speed, assuming a linear variation for BEC input with speed at constant torque. That is, suppose E and 1 torque (T ) at 500 rpm and 4000 rpm respectively, then r the BEC input required (E ) to achieve T at the engine i\ r speed N is ; K. Er = Ex +• (E2 - Ej) X (Nr - 500) ( 4000-500 ) Any errors introduced in E due to the above assumption R (i.e. the variation of BEC input with speed at constant torque is linear) are taken care of by the repetitive corrective action of the torque control software. - 193 - 6.7 Torque-Speed Characteristic of the Dynamometer at Constant BEC inputs - 194 - .6.8 Normalized Excitation - Torque Characteristic of the Dynamometer. - 195 - 6.3.3 PID Control As seen before in Section 4.5.1, the torque control system used here is mainly based on the Velocity form of the PID algorithm (see Eq. (4.14) ) \ AM K (C C ) + K (r + N = p N-r N I N - V K (2G C d N-l" N-2 " V th where M^ - Controller output at the N sample th C - Controlled variable at the N sample N th r - Reference input at the N sample N Kp K^ & K^ - gain parameters for Propor- tional, Integral and Derivative action. with other modifications described in Sections 4.5.2 and 4.5.3. Section 4.5.2 discusses a Set- point band criteria to improve the PID performance, whilst Section 4.5.3 deals with a four-point differ- ence algorithm to minimise noise effects on the Derivative Action. 6.3.3.1 Tuning of PID AUSLANDER et. al (6) suggested a modification to 1 the well known tuning rule of ZIEGLER - NICHOLS (139) for continuous control, to accommodate a - 196 - digital PID algorithm. This is represented by the Eq. (4.17) in Section 4.5.4. As the sampling period becomes very small, the above toning rule, Eq (4.17), 1 converges approximately to the ZIEGLER-NICHOLS sett- ings for the continuous control; K = 1.2 ; K = 0.6 ; K, = 0.6 — (6.2)' p ' I d 2 R.L - max. slopR.e L of a tangent drawR n to the unit- step input response. where R - time at which the tangent intersects the time axis, known as the dead-time of the process L to be controlled. In most processes, the response curves, caused by different step-inputs, are similar in shape, differing only in the value of the maximum slope (139). For example, maximum slope caused by a 10.0 mKp step change - is about twice as great as that from a 5.0 pnKp change (see Fig. 6.11). But however, the dead-time (L) remains the same regardless the step size. On this basis, the values obtained for R and L from the step-input response shown in Fig. 6.9 are ; R = 0.1558 mKp/ ; L =1.8 sec O w Since the chosen sampling period (0.05 sec) is very small compared to the system response and the dead-time (1.8 sec), the Eq (6.2) was used to obtain the initial settings for the control parameters ; - 197 - I< = 4.279 ; K = 1.189 ; K = 3.851 p IT ' d The actual control algorithm incorporates the set-point band criteria suggested by COX et. al. (23) and TAKAHASHI et. al. (116). Hence the final settings for the control parameters were obtained by on-line tuning, and are given below. Let P and I represent the proportional and Integral com- ponents of the control algorithm. selectedset-point band = + 0.5 mKp Control parameter settings (i) Within the set-point band K = 1.00 ? K = 4.00 ; Kj = 5.00 p It d (ii) Outside the set-point band (a) when P<0&I>o;K = 0.0 ; K = 2.00 ; K = 5.00 p d (b) when f><0 & I (c) when P> 0 & I< o ; K = 0.0; Kj. = 2.00 ; K = 5.00 p d (d) when P> 0 & I> o / K = 5.0 ; Kj. = 2.00', K = 5.00 d - 198 - 6.3.4. Review of Torque Control System It is worthwhile examining the cause of the wide spread dispersion in the torque measure- ments shown in Fig. 6.9 which is the open-loop response of a step-input, and its effects on the control system. Each torque measurement in the figure is the average of twenty load-cell outputs taken over 20 ms to minimise noise contamination of the signal, in addition to the analoque filter- ing of the load-cell output (see section4.5.5). The dispersion in the torque measurements may be caused by / (i) Variation of angular speed of the engine in a revolution, (ii) Cyclic variation in Engine performance, (iii) Torsional vibration transmitted to the load-cell through the rigid coupling of the dynamometer and engine . The principal cause for the variation of angular speed of the engine is the non-uniformity of the engine developed torque, due to periodic nature of the combustion process and the kinematics of the engine. Non-uniformity of the torque decreases with an increase in the number of cylinders. At each instant, the engine torque is balanced by the applied load and the inertia load of all the moving parts, which includes the engine, flywheel, - 199 - rotor of the dynamometer etc. The purpose of the fly- wheel is to damp such angular speed variations to an acceptable tolerance limit at the idle speed. As the tolerance limit becomes smaller, the inertia of the flywheel becomes larger which reduces' the engine response or acceleration rate. So there is always a compromise between the acceptable tolerance limit and the engine response. As a result, there is always a small varia- tion in the angular speed which will have some effect on the applied load on the engine. This is because it is a function of the dynamometer rotor speed and the excitation current/voltage of the stator, which remains constant. Any fluctuations on the excitation current/ voltage due to line voltage variations etc. is negli- gible (see Appendix 5). Cyclic variation in engine performance is mainly a function of fuel injection system (i.e. injection nozzle, pump and governor)and combustion . This engine is equipped with a rotary fuel-injection. WING (135) found that the major source of cyclic variation in the Perkins 4.2 36 diesel engine was due to the rotary fuel- injection pump. These cyclic variations may also have some effects on the torque measurement. At an engine speed of 106 7 rpm, the engine was exhibiting severe vibration and the corresponding torque measurements showed a wide spread scatter, as illustrated in Fig. 6.10, which shows the open-loop response at different speeds for the same step-input. Even at this speed, at high - 200 - 'loads the scatter is reduced as indicated in Fig. 6.11, which is the open-loop response for different step- inputs at speed 1067 rpm. In this latter case, the effective damping of the system increases with an increase in load hence the reduction in scatter. So it is reasonable to conclude that the engine vibration is the major source for the scatter in torque measurements. Under closed-loop control, the load disturbances cau- sed by the angular speed and engine power fluctuations will be minimised, but however, engine vibration will have an adverse effect on the control system. For example, the controller will perform a corrective ' action based on a faulty torque measurement caused by the engine vibration. This problem may be overcome; (i) by increasing the capcitance of the analoque filter of the load-cell output. " or (ii) by increasing the frequency of the torque control action. Any increase in the capacitance will only damp the system response which is undesirable. The quality of control increases as the frequency of control action increases (6), and this strategy is adopted in deve- loping the torque control system. A sampling frequency of 20 Hz was chosen as acceptable, because any further increase will only reduce the quality of speed control, as the speed and torque controls works on a time sharing - 201 - ' basis. The selection of the set-point tolerance must be made with care, since it can adversely affect the settling time of the system. Settling time increases with a decrease in the tolerance. Also if the environment is very noisy, then it is not realistic to specify a very low tolerance. In accordance with the above considera- tions, a set-point tolerance of 0.2 mKp was chosen. Before proceeding to the next section, an examination of the results shown in Figs. 6.10 and 6.11 is given from a control point of view. Fig. 6.10 shows that at high speeds the ripple on the torque measurements become less, except at speed 106-7 rpm (which was ex- plained before). This trend is due to the flywheel action which can be considered as analoqus to a capa- citor in a electrical circuit. That is, if the capa- citor is subjected to a periodic signal, the output becomes steadier with an increase in the frequency of the input signal. The open-loop response shown in Fig. 6.11 indicates that at high loads the engine operation becomes more stable. In this, the effective damping of the system increases with load. These observation suggests that the governing of the engine at high loads is likely to be better than at low loads and speeds. - 202 - Fig. 6.9 Open-loop Response for Step-input . - 20 3 - . y • rx •a 0) • ua" o Speed 1856 rpm H Tine(sec) 5 10 15 (/4 ... — sV 'R 0 to 3 / y / xO H y Speed 1460 rpm t t ('Timet sec) ( 5 10 15 • ' • .. a to 3 o• o EH Speed 1067 rpa j. • •"*•{•' Time(sec) 5 10 15 \ ...... 1 - ...» "to x . / H Speed 772 rp« ^ Time(aec) ( —» Ji i i >— 1 ^ ' • ' • ^ * ' ' 7s Fig. 6.10 Open-loop Response for step-input at different Speeds. - 204 - Fig. 6.11 Open-loop Response for Different Step-inputs at 1067 rpm. - 205 - 6.4 Optimisation of Torque Control In the process of optimisation, two versions evolved in addition to the basic PID model. These incorporated the improved derivative action and the set-point band criteria discussed before. This section outlines the modifications included in each model and compares the response. 6;4.1 Basic PID Fig. 6.12 shows the response of the Basic PID model to achieve approximately 50% of the maximum engine torque from zero initial condition and at a speed of 1000 rpm. It takes nearly 5.0 sec to achieve 90% of the set-point. The slow response of the system is due to the lags involved in the ; 1) BEC unit - the worst case is about 500 ms (Appendix 5). 2) Eddy-current dynamometer 3) Engine speed response MARZOUK (81) found the engine rise time to vary bet- ween 0.7 to 1.2 sec. Rise time is defined as the time necessary for the response to rise from 10% to 90% of its final steady state error (2). Fig. 6.11 suggests that this model can be optimised by initially giving a large step-input, and when the output of the dynamometer reaches a certain value, the - 206 - basic PID model can be activated. This strategy led to the development of the next mode].. 6.4.2 Modified PID - 1 As described in the preceeding section, the BEC input was set to its maximum value ( = 1 volt) and the torque was monitored every 0.05 sec. When the torque reached a certain value, (which depends on load requirement and engine speed) the Basic PID model was activated. Fig. 6.13 shows the response of this model, which takes about 2.0 sec to achieve 90% of the required torque ( = approx. 50% of engine max.) from the same initial conditions as in Section 6.4.1. The repeatability of this system is poor. This is mainly due to the fluctuating nature of the engine torque as explained in Section 6.3.4 (i.e due to speed variation, engine vibration etc.) , which will tend to make the cutoff-point change from test to test. This problem may be overcome by increasing the sampling frequency but this will affect the quality of the speed control, as explained in Section 6.3.4. Apart from the above difficulty, the cutoff- point with this present sampling frequency did not exhibit any simple relationship with speed and load that could be used in the control algorithm. Therefore this model was not pursued any further. - 207 - 6.4.3 Modified PID-2 This model is basically the same as PID-1 , but the cutoff-point is on a time base, followed" by a dead-zone before the Basic PID is activa- ted. That is initially, the BEC input is set to 1 Volt and after a time-delay 't', it is set to zero. The torque is monitored every 0.05 sec and when the rate of change of torque becomes nega- tive, the Basic PID is activated. This time-delay is a function of the load required and the engine speed. A series of preliminary tests were conducted to establish a relationship for the time-delay with load and speed. The BEC unit was subjected to 1 Volt pulse input and the overshoot was moni- tored for j 1) zero initial condition and 2) non-zero initial condition (say >0.5 mKp) This test was repeated for different pulse-widths and at different engine speeds. Fig. 6.17 shows that the plots obtained for the overshoot and the pulse-widths for the two initial conditions at a speed of 1500 rpm, are linear. They are ; Y = X - 3.5 for zero initial condition at 1500 rpm - 208 - Y = X - 1.6 for non-zero initial condition at 1500 rpm Where Y - Overshoot (mKp) X - pulse-width measured in terms of sampling instants A 2% speed correction is performed to obtain the pulse- width at other speeds to achieve the required overshoot. The large capacitors used in the BEC unit to stabilise the output are the cause for the overshoots. That is, the output of the BEC lags its input, which causes the rise in torque even after the input is set to zero. Fig. 6.14 shows the response of this model, which takes about 2.0 sec to achieve the 90% of the required set-point ( = approx. 50% pf the engine max.) from zero initial condition and at a speed of 1000 rpm. Fig. 6.15 shows the response of this model for different load requirements from zero initial torque, where the peak-overshoots are well within 30%. Peak-overshoot is the measure of the largest error between input and out- put during the transient state. This model can be consi- dered as well-designed according to ANAND'S (2) statement; "In most well-designed systems, peak-overshoots are lower than 30%". It is vital to point out that the price paid to minimise the peak-overshoot is the response time. So there is a compromise between the peak-overshoot and the response time when designing a system. In this system the response time is optimised, keeping the - 209 - peak-overshoot within 30% limit, to conduct USA Federal Smoke and Emission tests (described in the next section). An unloading sequence is illustrated in Fig. 6.16. ·- -~ l 0 - 10mkp = 2.0 sec Fig. 6.12 Response of Basic PID for 10mkp base = 2.0 sec Fig. 6.13 Response of PID-1 for 10mkp base = 2.0 sec Fig. 6.14 Response of PID-2 for Step-input - 211 - 15rnkp 10mkp 5mkp Time base = 2.0sec Fig. 6.15 Response of PID-2 for Dif1erent Step-inputs • 5mkp Time base = 2. 0 sec Fig. 6.16 Response of PID-2 fer Unloading - 212 - Fig. Overshoot Vs Sampling Instant at Engine Speed 1500 rpm. - 213 - '6.5 Proposed 19 79 USA Federal Smoke and Emission Test Owing to the limited memory capacity of the com- puter used here, the first hundred set-points of the schedule (see Appendix 2) were executed. It should be noted that when the LSI - 11 data-logging system is commissioned to communicate with TMS 9900, set- points will be provided by the LSI-11 via the para- llel communication link. In other words, this test is only to demonstrate the capability of the control system developed here. The results are shown in Fig. 6.18 and Table (6.1) along with the actual schedule. Since the engine test-bed is equipped with an eddy-current dynamometer, motor- ing of the engine is not possible. Therefore, during motoring regions of the schedule,- the tor- que and speed were set to zero and idle conditions respectively. As indicated in the Fig. 6.18, the speed control has followed the schedule very closely except for small deviation during unloading. This deviation may.be due to ; i) the mandatory delay of 0.5 sec imposed between speed corrections for stability reasons. This limits the number of corrections per second to a maximum of two. 'ii) the time taken to move the governor lever - 214 - between its limits (approx. 237 stepping motor steps) is about 1.185 sec. This limitation is due to the type of stepping motor used (max. speed is 200 steps/sec.) This will have serious impact on the per- formance for large speed change demand. iii) the engine response itself. Its rise time varies between 0.7 to 1.2 sec. (81). Torque control has followed the loading sequence quite well except in certain regions where it exhibits over- shoot. But however, torque during unloading is also deviating from the schedule . In these .regions, the control software merely sets the BEC input .to zero and just monitors the load-cell outputs. That is, the deviation is purely caused by the slow response- of the hardware. The overshoot values obtained from Table (6.2), des- cribed later, shows that they are mostly within 30% which is acceptable for most control applications (2). These overshoots may not be acceptable for the actual scheduling purposes. But in this system, because of slow response of the hardware used, a compromise has to be made between the overshoot limit and the response time as described in the previous section. Fbr example,-with the present overshoot limit (approx. 30%), the system rise time is nearly 2.0 sec which is - 215 - already too slow to conduct the schedule accurately. To illustrate the repeatability of the system, ten tests were conducted. For each set-point, the absolute maximum and minimum errors were obtained from these tests and are shown in Figs. 6.19 and 6.20 for speed and torque respectively. It was observed that the signs of the large errors were the same for all the . ten tests and hence the absolute errors were plotted, and tabulated in Table (6.2). When the calculated errors were more than 100%, they were taken as 100% for plotting purposes. For zero torque conditions, the percentage of errors will be an indeterminate quantity and hence they were set to zero. Table (6.2) shows that for the speed control, at scheduling points 59 and 69, the percentage of errors are more than 100%. But these points, from Table (6.1), corresponds to unloading from 83.86% to 0.0% and 92.10% to 0.0% respectively. As the speed change demands are very large, the cause for the large errors may be attributed to the reasons presented earlier, in this section (i.e. mandatory delay, stepping rate etc.) Similarly, for the torque control, at scheduling point 87 the percentage of error is more than 100% which correspond to unloading from 16.74% to 3.36%. Its again due to the slow response of the hardware used. - 216 - Apart from these odd-points discussed earlier, the results show high repeatability (Figs. 6.19 & 6.20). So it is reasonable to conclude that the capability of the control system is only restricted by the hard- ware used to monitor and control, apart from the basic response of the engine itself. - 217 - TABLE ( 6 1 > (IEA FEDERAL SMOKE AND EMISSION TEST TO BE ENFORCED IN 1983 TIME DESIRED * ACHIEVED * < PERZENT ) (PERCENT) SEC RPM TORQUE RPM TORQUE 0 0 0 -.17 0 1 0 o -.76 0 0 o -.29 0 3 0 o -.52 o 4 o 0 -.88 o 5 0 0 -.35 o 6 0 o .47 o 7 0 0 .58 o 8 o o .47 0 S 0 0 .70 o 10 0 o . 52 0 11 0 o .47 0 12 o o .58 o 13 0 o .47 o 14 IJ o .70 o 12 o o .29 0 10 0 0 0 0 17 o o .82 o IS 0 0 . 17 0 19 0 0 . 17 0 20 0 0 . 17 o 21 0 0 . 17 o 0 0 .58 0 23 0 . 0 . 23 0 • 24 o 0 .41 0 n cr o 3.67 -.88 3.18 20 o 47.69 1 .35 32.27 27 3.11 59.41 1 .29 72.27 28 9. OS 84.54 9.70 86.81 29 15.02 80. 00 13.64 84.09 30 33.49 80.00 26.05 88. 18 31 37.93 79.29 35.47 91.81 32 31 .20 38.26 27.82 65.90 33 21 .99 26.67 19.64 31.3G 34 30.00 16.10 28. 17 17.72 35 i- • i- TriOLE ( . 1 ) LUMT IIJUED TIME DESIRED * ACHIEVED * * Percentage of operating range of Speed/Torque of engine - 219 - TABLE<6.2 ) SETPOINT ERROR OS TIME TIME Z SPEED ERROR % TORQUE ERROR SEC MIN MAX MIN MAX .48 1 .64 0 0 1 0 2.15 0 0 .14 .99 o 0 3 .31 1 .64 0 o 4 0 2.49 o o e: o 2.15 0 o s .31 1 .64 o 0 7 0 1 .64 o 0 8 .31 1 .33 0 0 S 0 1 .98 0 0 10 .31 1.98 o 0 11 .48 1.47 0 0 12 .14 2.32 0 o 13 .31 1 .64 0 0 14 0 1 .98 0 o 15 0 1 .98 0 0 IS 0 1.81 0 o 17 0 2.32 o 0 18 .31 1 .64 o o IS . 14 1 .33 n 20 .14 1 .64 o 0 21 0 2.15 0 0 22 .31 1 .64 0 0 23 .31 1 .64 0 0 24 0 1.33 o 0 •ye: .31 4.81 13.35 13.35 2G 1 .98 5.15 32.25 34.24 27 1 .53 4.73 21.64 21 .64 28 .20 3.89 •2.15 3.22 2S 2.71 6.30 5.11 13.07 30 3.9G 11 .50 6.25 11.92 31 2.48 3.68 6. 46 15.79 32 1 .27 6.67 60. 17 72.24 33 .40 6.05 17.58 17.88 34 1 .80 3. 96 7.26 12.91 35 .60 2.86 31 .02 36.55 3G .69 3.26 1 . 17 10.16 37 .09 1 .50 31 .35 36.01 38 9.46 13.31 0 0 3S .99 8.88 o 0 40 .95 3.82 0 0 41 . 14 2.87 o 0 42 .65 1.81 o 0 43 3.47 11 .09 60.74 62.92 44 3. 06 6.45 21 .23 23.84 45 2.72 4.96 31.05 31.81 4G 1 .02 2.80 8.75 10.22 47 2.28 6.89 5.54 7.96 48 .25 6.32 7.37 13.62 48 .56 3.03 1.70 10.22 50 .36 4.38 er r> j 9.75 - 220 - TABLE( t .2) CGNTINUED TIME >'SPEED ERROR % TORQUE ERROR SEC MIN MAX - MIN MAX 51 1 .75 2.95 2.04 4.13 52 2. 18 4.31 .11 11.45 53 2.68 5.33 .92 8.20 54 3.34 7.67 3.64 10.92 55 1 .75 2.89 13.53 22. 18 ' 56 1 .64 4.80 2.25 12.50 57 .23 4.91 5.21 14.17 58 .23 3.96 22.21 24.03 59 124.00 143.15 0 0 60 18.47 27.14 0 0 61 1.64 12.66 0 0 62 .14 3.14 0 0 63 34.01 36.30 31 .56 36.01 64 9.67 13.62 25. 16 39. 19 65 3.34 5.35 3.64 8.20 66 .09 2.91 . 90 4.54 67 1 .49 2.26 11 .63 16.89 68 7.79 13.80 11.07 14.78 69 145.50 150.18 0 0 70 10.82 20.32 0 0 71 4.47 7.65 0 0 "7 *? 2.32 4.81 o 0 73 .14 2.66 o 0 74 27.66 28.58 9.57 9.57 75 6.09 8.62 6.55 8.08 76 5.14 5.74 40.45 40.90 77 .31 2.08 .86 8.72 78 .01 1 .28 22. 70 27.20 79 .03 1 .36 4.60 9. 10 80 86.65 88.65 0 0 81 13.48 16. 15 o 0 82 28.51 30.39 4.60 9.00 83 2.41 7.26 56. 10 58.62 84 1 .43 3.85 22. 10 27.38 85 .18 1 .45 9.00 13.60 86 1 .15 2.00 24.01 30.88 87 .49 .90 170.53 238.09 88 18.98 22.66 0 0 89 .14 3.99 0 0 90 0 .99 0 0 91 0 1 .64 0 0 92 .31 2.66 0 0 93 .99 2.49 0 0 94 .14 2.97 0 0 95 .14 1.81 29.45 29.67 96 2.49 6.65 11 .OG 13.52 97 2.15 6.82 0 0 98 3.82 6.82 0 0 99 .98 5.15 o o - 221 - Fig. 6.13 Results of USA Federal Smoke & Emission Test Time ( SEC ) Fig. 6.19 Set-point Error Vs. Time for Speed Control Time ( SEC ) Fig. 6.20 Set-point Error Vs. Time for Torque Control - 224 - CHAPTER 7 CONCLUSION AND RECOMMENDATIONS 7.1 CONCLUSION The main objective of developing a workable dedi- cated type microcomputer control system for engine testing has been achieved. This system offers a high degree of flexibility, reliability and improved repeatability compared to the old mini-computer based system, which uses an Analoque PID for the torque and a hardware logic for the stepping motor control. The Torque Control system used here is based on a modified version of the velocity form of the digital PID algorithm. This system can be extended to any diesel engine and eddy-current dynamometer combination. The computer also directly controls the stepping motor (i.e. stepping rate and direction), used for the control of governor lever position. A part of the Proposed 1979 USA Federal Smoke and Emission Schedule was conducted to illustrate the system capability. The test results indicated the following ; (1) the control system was able to follow the schedule very closely, except at certain points which were mainly due to the slow- - 225 - response of the actuators used in the control paths. (2) the repeatability of the system is good. Control Software development conforms with the basic requirements of modular programming. That is, it looks more like a tree structure with certain exceptions such as (i) Violation of locality of reference (ii) Allows module sharing The programs were written in the assembly language of the TMS 9900, to optimise memory requirements and real-time usage of the computer. The main inference that can be made from this experiment is, that the present-day microprocessor offers the necessary potential (speed, instruction set, etc.) to implement sophisticated and accurate Direct Digital Control Systems economically com- pared to mini-computers. 7.2 RECOMMENDATIONS 7.2.1 Speed Measurement As seen before the engine speed is measured from an Optical Incremental Shaft encoder coupled to the crankshaft of the engine by a torsionally stiff - 226 - coupling. The encoder provides three tracks ; Track 1 : 1 pulse/rev. (Revolution pulse) Track 2 & 3:each 720 pulses/rev at 90° to each other (Digitiser pulses) A 25 kHz crystal clock is used to measure the time between the Revolution pulses. JONES (65) found that the revolution pulse is the major source for random spurious speed measurements. He outlines three causes for bad speed measurements ; (i) missed Revolution pulse - produces about 50% error in the measured speed (ii) Interference/spurious Revolution pulses causing fragmental readings (iii) Low power to the encoder lamp or interface logic causing small or non-existent Revo- lution pulse which would not update the speed latch (see Section 3.6.1). The first two in the list would give random read- ings, while the last would give a continuous reading. Although there are certain checks included in the software to minimise the effects of spurious speed measurements on Control Software, it is essential to make the measuring instrumentation as reliable as possible. The effects of the first two can be - 227 - reduced by using the Digitiser pulses for speed measurement. That is, these pulses can be fed through a hardware logic which could generate one pulse for every 720 Digitiser pulses it monitors. This one pulse can be used as Revolution pulse. In this method, the speed error will never be as high as 50% . There is no easy solution for the third cause but status checks on the hardware (eg power on, lamp failure etc.) by the computer may overcome this problem. 7.2.2 Speed Control A stepping motor is used to control the governor lever. The motor used here can operate at a maxi- mum speed of 200 steps/sec, at which it can overcome the static friction and maintain repeatability between governor limits (note that the torque of the motor decreases with speed). At the maximum speed, it takes nearly 1.185 sec to travel from one limit to the other, which is slow. To achieve high speed operation and fine resolution, a iarge stepping motor with high gear reduction ratio (possibly SIGMA 3437 D200 - F075 with gear ratio 56.25:1) could be used. Since the governor lever position is measured in terms of stepping motor steps, the motor movement should be as accurate as possible. On this basis, the motor operation can be divided into two regions ; - 228 - (i) Slow Speed * : the maximum speed at which the motor can overcome static friction and maintain repeata- bility between limits (ii) High Speed * : the maximum speed at which the motor can overcome rolling friction and move without loss of steps. * The low and high speeds that can be achieved with the suggested motor are approximately 200 and 5000 steps/ sec. For small step changes, the slow speed can be used but for large step changes, the high speed operation may be invoked as illustrated in Fig. 7.1. That is, the number of steps can be split into an acceleration, deceleration and (if necessary) steady regions. This type of operation is essential to prevent omission of steps. Suppose the motor is operated at high speed and its driving pulses are then shut off, an error may be caused by overshoot if the inertia force of the motor is greater than its holding torque. The motor creates a holding torque when it is energised. The optimum acceleration and deceleration rates can be found by conducting a series of test on the motor. The above form of stepping motor control can be implemen- ted either ; (1) by software or (2) by hardware logic. - 229 - Software implementation must be made with care since both Torque and Speed Control works on a time sharing basis. Increasing the sampling period from the present value 0.05 sec to 0.1 sec would ease this time critical problem. But this new sampling frequence may affect the control quality due to the noise effects on the load-cell measure- ments. This necessitates a new approach in the digital filtering of load-oell output and a possible alternative is suggested ih section (7.2.4). If the software implementation of stepping motor control is complex then hardware logic may be considered. This should be used as the last resort, as it reduces the flexibility of the system. It should be noted that it was decided not to use the above stepping motor control strategy in the present control system as the improvement achieved will be minimal compared to the effort needed in implementing it. This is because y (1) the maximum speed that can. be achieved with the motor used is only 600 steps/sec. and (2) the number of stepping motor steps between governor lever limits is only 237. - 230 - 7.2.3 Torque Control NIGHTINGALE (92) outlines a method used at RICARDO, to optimise the response of their Froude Dynamatic eddy-current type brakes. RICARDO initially, over-excites their brake by applying a transient high voltage of 200 V (compared to the rated maximum of 60 V of the brakes) without damaging the windings of the stator coil. The same principle can be used here but redesign of the BEC un:i t is necessary because the maximum output of the BEC is 45 V (see Appendix 5). A new BEC unit has been designed and is currently being developed, which uses the widely adopted "Pulsing technique". This technique eliminates the usage of high value capacitors to stabilize the out- put, which reduces the inherent damping caused by the capacitors. The pulsing technique can be considered as an open-loop ON-OFF control, where the frequency of initiation of the ON period is fixed. The duration of ON period changes according to its input demand. The amplitude of the pulse and the frequency of the ON period are adjustable to suit any eddy-current dynamometer. If the above venture is successful, then major part of the signal transmission in the system will be in digital form as shown in Fig. 7.2. - 231 - 7.2.4 Digital Filtering As suggested in Section (7.2.2), if the software implementation of stepping motor control is made possible by increasing the sampling period of the torque control system, then it is necessary to optimise the digital filtering technique. One of the widely used Kalman filter algorithm may be used, which generates estimates of variables of the system being controlled by processing available sensor measurements (20,116,140) .It actually uses a model of the system being controlled and its success depends on the completeness and accuracy of this model. This algorithm might take more memory space but it is worth investigating. 7.2.5 Software development Program development process, at present, involves- the following procedure ; (1) Creating a Source program in the PDP-15 system (2) Compiling the source program using the cross-compiler developed for this purpose (Appendix 1) (3) Dump the binary code of the program on paper tape. (4) Transfer the binary code via the paper tape reader of the teletype, to TMS 9900. - 232 - 'All these procedures takes time and an average of 45 minutes is required for each program developed, after creating the source program. To modify or correct complex bugs in the software the above procedures have to be followed because the TMS 9900 monitor does not provide facilities to insert instructions. This long development time could be considerably reduced, when the LSI-11 data-logging system is linked with TMS 9900. By making suitable alterations, the cross-compiler can be transferred to the LSI-11. Now this system can be used for program development and loading the binary code to the TMS 9900 via the serial communication link (max. rate = 9600 bits/sec). - 234 - Fig. 7.1 High Speed Stopping Motor Control _TL - DIGITAL - ANALOGUE Fig. 7.2 Proposed New Engine Control System Schematic - 235 - REFERENCES 1. AL - BERMANI, S.A and GRAVESTOCK, R.E (1975) An Engine Test Bed Model for Dynamic Control Studies J. Automotive Engineer, Vol. 6, No. 1, Feb. 1975. 2. ANAND, D.K (1979) Introduction to Control Systems Pergamon Unified Engineering Series, 1979 3. ANDERSON, J.C. et al. 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Tech. & Automation, 1979 - 259 - I ' APPENDIX 1 ; TMS 9900 Assembly Language and Cross-Compiler CONTENTS Page A.1.1 Introduction 260 A.1.2 Source Statement Formats and Elements 261 A.1.3 Addressing Modes 262 A.1.4 Assembler Directives and Pseudo- Instructions 265 A. 1.4.1 Assembler Directives 265 A.1.4.2 Pseudo-Instructions 267 A.1.5 Cross-Compiler and its Error Codes 268 A.1.5.1 Error Codes 271 - 260 - I APPENDIX 1 TMS 9900 ASSEMBLEY LANGUAGE AND CROSS-COMPILER A.1.1 Introduction This Chapter describes the TMS 9900 Assembly language and the cross-compiler developed for this purpose. The cross-compiler is a two-pass Assem- bler which runs under DOS of PDP-15 computer. The chapter describes the following ; Source statement formats and elements Addressing modes Assembler directives and pseudo-instruc- tions Cross-Compiler and its error codes The following conventions are used to describe the syntax definition of source statement formats and elements. Items in capital letters, and special characters, must be entered as shown Items within ( ) brackets are defined by the user Items within £ ]] brackets are optional The dot represents a blank or space. - 261 - I For further reading on TMS 9900 Assembly language Ref (4). A. 1.2 Source Statement Formats and Elements An assembly language source program consists of source statements which may contain assembler directives, machine instructions, pseudo-instruc- tions, or comments. The syntax for source statements other than comment statement is defined as follows £( Label) ] OPCODE . . . [( OPERAND)] [( REMARKS) ] This compiler only accepts fixed formatted source statements as indicated below : Field Name Columns Label 1-5 Opcode 6 -10 Operand 11 -30 Remarks 30 -45 Label Field : The label field contains a sym- bol containing up to four charac- ters, left justified. Operation field : The operation field contains an opcode. - 262 - I and one of the following : Mnemonic operation code of M/C instructions Assembler directive operation code Pseudo-instruction operation code Operand Field :The operand field may contain one or more expressions, terms or cons- tants, according to the requirement of opcode. Remark Field : The contents of the remark field are listed in the source portion of the assembly listing and have ho other effect on the assembly. A. 1.3 Addressing Modes One of five addressing modes may be used in the instructions that specify a general address for the source or destination operand. (i) Workspace Register Addressing Workspace register addressing specifies a work- space register that contains the operand. A work- space register address is written as term RO through R15. - 263 - Ex: 1 MOV..R4...R8 copy the contents of work- space register 4 into work- space register 8. (ii) Workspace Register Indirect Addressing Workspace register indirect addressing specifies a workspace register that contains the address of the operand. An indirect workspace register address is written as a term preceded by an asterisk(*). Ex : 2 ....A...*R7..*R2 add the contents of the word at the address in workspace register 7 to the contents 'of the word at the address in workspace register 2, and place the sum in the word at the 0 address in workspace register 2. (iii) Symbolic Memory Addressing Symbolic memory addressing specifies a memory address that contains the operand. Ex : 3 ....S...TAB..LIST subtract the contents of the word at location TAB from the - 264 - I contents of the-word at location LIST, and place the remainder in the word at location LIST. ....C...RO...STOR compare the contents of workspace register O # with the contents of the word at location STOR. Indexed Memory Addressing Indexed memory addressing specifies a memory address that contains the operand, the addres is the sum of the contents of workspace and a symbolic address. Ex : 4 MOV. .R7. . .XR4. .LIST copy of the con- tents of work-, space register 7 into a word memory. The address of the word memory is the sum of the contents of workspace regis- ter 4 and the value of the symbol LIST. - 265 - I (v) Workspace Register Indirect Autoincrement Addressing Workspace register indirect autoincrement addressing specifies a workspace register that contains the address of the operand. After the address is obtained from the work- space register, the workspace register is in- cremented. The workspace register increment is one for byte operation and two for word opera- tions. A workspace register autoincrement address is written as a term preceded by an asterisk and followed by a plus sign (+) Ex : 5 ....S...*R3 + R2 subtract the contents of the word at the address in work- space register 3 from the con- tents of workspace register 2, place the results in workspace register 2, and increment the address in workspace register 3 by two. A.1.4 Assembler Directives and Pseudo-Instructions A. 1.4.1 Assembler Directives Assembler Directives are used with machine instructions in source program to supply data to be included in the program and to - 266 - control assembly process. (i) Block Starting' with Symbol (BSS) syntax definition : [(label)] BSS..(wd-exp).... [(remarks)] BSS advances the location counter according to the value of the well-defined express- ion (wd-exp) in the operand field. Use of the label is optional Ex : 6 BUFF. BSS..00080 card input buffer This directives reserves an 80-bytes buffer at location BUFF. (ii) Initialise Word (DATA) syntax definition : [(Label)] DATA (wd-exp) ....(exp) (exp) (exp) DATA places one or more values in one or more successive words of memory. The assem- bler advances the location counter to a word boundary (even) address. Use of the - 267 - I label is optional. Ex : 7 KONS. DATA. 00004 01235 02245 The directive initialises two words,starting with a word at location KONS. the contents of the resulting words are 1235 and 2245 m 10 ±u (iii)Define Assembly-Time Constants (EQU) syntax definition : [(label)] . EQU. . (exp) [(remarks)] EQU assign a value to a symbol. The label field contains the symbol. The operation field contains EQU. The operand field contains the value to be assigned. Ex: 8 SUM..EQU..00005 workspace register 5 The directive assigns an absolute value to the symbol SUM, making SUM available to use as a workspace register address. A.1.4.2 Pseudo-Instructions (1) NO Operation (NOP) syntax definition : [(Label)j. NOP [(remarks)] NOP places a M/C instruction in the object code which has no effect on execution of the - 268 - program other than execution time. (ii) Return (RT) syntax definiton : [(Label)]. RT [(remarks)] RT places a M/C instruction in the object code to return control to calling routine from a subroutine. A.1.5 Cross-compiler and its Error Codes. The Cross-compiler development is based on a modular programming concept and the modules were programmed using standard Fortran IV lang- uage. Fig. A.1.1 shows the structure of the cross-compiler and the description of the modules are given below : ROUTINE NAME DESCRIPTION 1. TMS99 This is the main routine, inter- acts with following modules ; • SETING . SYNTAX . LIST . XREF . ERROR 2. SETING This routine sets up the dic- tionary for the labels defined - 269 - ROUTINE NAME DESCRIPTION in the source program 3. SYNTAX This routine checks the syn- tax of the statement by call- ing following subroutine, & developes the object code . DIREC . DUAL . DOPER . SOPER . JUMP . SHIFT . REGIST 4. LIST This routine list out the source program with the object code, address, & line no. 5. XREF This routine prints out the cross-reference of labels defined. 6. ERROR This routine prints out the error source statement with error code & line no. 7. DIREC Checks the syntax of assembler directives & pseudo-instructions, & develops the object code or appropriate error code. - 270 - ROUTINE NAME DESCRIPTION 8. DUAL Checks the syntax of dual operand instructions with multiple address modes for source & destination operand, & developes the object code or appropriate error code . 9. DOPER Checks the syntax of dual operand instruction with multiple addressing modes for the source operand & workspace register address- ing for the destination, & developes the object code or appropriate error code 10. SOPER Checks the syntax of single operand instruction & deve- lopes the object code or appropriate error code. 11. JUMP Checks the syntax of jump ins- truction & developes the object, code of appropriate.error code. 12. SHIFT Checks the syntax of shift ins- truction & developes the object code or appropriate error code. - 271 - ROUTINE NAME DESCRIPTION 13. REGIST Checks the syntax of register instruction and developes the object code or appropriate error code. A.1.5.1 Error Codes CODE DESCRIPTION 1 Undefined symbol 2 Syntax error. The statement corres- ponding to the error location con- tains a syntax error. 3 Workspace register 0 cannot be used for indexing. 4 Multiply defined symbol. A symbol * in the statement corresponding to the error location has been pre- viously referenced or defined. 5 ' Unrecognizable operator. Contents of the operator field of the sta- tement corresponding to the error location is not a mnemonic opera- tion code, directive, or a name defined as an extended operation. 272 - DESCRIPTION Illegal forward reference. A symbol in the statement corres- ponding to the error location that should have been previously defined is not previously defined. Illegal term. A term has an illegal value .less than zero or greater than 15. Illegal register number Displacement exceed allowable range (ie - 128 to 127) Non-numeric character is pre- sent in the numeric field. - 27 3 - / Fig. A.1.1 Software Structure of TMS 9900 Cross-Compiler - 274 - I APPENDIX 2 Proposed 1979 USA Federal Smoke .and Emission Schedule PracrwT RPM ajtd Pctccwt Torque Vcuoi Time Schedule llrrunt iflrr t rvtrmi ri'm fVrrrul Umiiv 0 00 00 00 0.0 2j 00 00 3.— _._ 00 00 4 00 0.0 - I „,„ 0.0 M . 4 , . , 00 0.0 t ,, . , ,,„ 00 00 «L. _.._ 0.0 00 ^ , - , . , - w-MMm 0.0 00 , , ,, . i ,-- -•., -- 0.0 08 i.. L . 0.0 0 0 u_1 \ . i .._ i i 0.0 0.0 13 0.0 00 14. 00 0.0 15.. — 0 0 0.0 , 14 _____ 00 00 n 00 0.0 ii _ 00 OE 15 00 0.0 20 0.0 0.0 31 0.0 0.0 31 .... 00 0.0 23 0.0 • t .__._ 0.0 0.0 4 23 .. 00 3.91 24__ 0.0 41.90 27 3.11 50 41 25 . too •« 34 3« — 15.03 )00 JO 33.40 •wo•1 o • 31.______31 93 10 30 33. . 31.70 39 18 33 _.._ 31 00 10 91 34 30 00 • 18 10 35 31 13. It 47 39 10 01 not 37 30 00 31 _____ 18 33 10 38 30.. 0 35 MotoMotortrvr WiM 40 18.83 Motor tn« 33 03 Motor loo Note : 1. Original Federal Regulations Part 86 2. Source Federal Register Vol. 44 No. 51 - 275 - I pemctht htm and prnmn tOAQI'i vf-mmib i'r.nrrm hpm ahd prnrtnt toautir vnt8u8 Prorrwr I1PM A«n rmrmT Thmuit Vr««ii| TIMS BcM«DMJC--ContlniiPf1 Tims Rcnr.niii.r. Conlliiurrl Tiwr KNIMTM.R (*«nti NUTRIL rrcrrd trvr.l Pnrcrni hi prrrml limpir llrmrrl ifUr.t IVrrmt III'M Prrrrtil lornnr TtrrrHrl (Brr » f^rrrnl IT I'M IVrrrnl Iftqur n >i Mntnrmg l?P — 1 7T Motoring 310 - 31 30 81 90 14 l» 83 f>7 130 IJOO Motoring '217 — 41 15 •o 00 It 04 08 .10 131 no 00 ' 316 - 44 00 00 n n 80 (N) 132 0.0 00 219 40 41 90 0O 37.0.1 03 7V 133 - 2 14 • 26 370 SI 04 87 41 47 It 75.36 (34 a 08 no 221.... 60 88 •O 90 »4 77 80 (M) 115 00 00 222 7.6 03 90 00 ft 7 70 80 00 1.70...- - 00 00 09 83 90 00 84 01 79 92 117 - 00 0.0 32411T1ZIH 98 78 • 3 88 86 (Ml 08 03 130 „ 00 00 225 86 01 80 94 88 tft •3 23 138 _... 00 00 220 94 00 17.02 «y ar 80 oo 140.— 00 0.0 • 327 90 18 29 00 89 M .V»0 pmcrwt nrM amd Pjnrmrr Tonqur Vr*bi»o PrjirrHT HI'M amp Prm-rwT To*qun Vming Pmn-TtHT R I'M amp Ptoctnt Tongi'i Vr»ai>* Timk Srnrnuui—Continued TiMr. Sciirnuur-ConUnurd "I'm* Briir.ntJL«- CiHillniHil Rrrord i&nr.l Prrrrnl IIPM Prrrt-nl torque flrmrd iJV-r » IVrrrnl RPM IVrrml tnrqirr Rcrord iRnc.l Prrrt-ttl RPM rrrr»-ni t 30 3 00 : . 0 0 390 106.00 72 78 477 11 >4 M(M * - 277 - I Pehciht RTM /two l'DtrrjtT To*Qt/r Vexius J*mcrrrr RPM awd PzxraiT Tonoui Vr*iu« Pvicrtrr RPM a*d Pwcnrr Torovt Vr*sirg TIME KrurnuLE-Contlnued • TIMI ScHrouuE—Continued TlMt BcnniULi-Continued Record (Brc.l Percent RI'M Percent torque Record (Bee.) Percent RPM Percent lorqire Record (Bee.l Percent RI'M Pcrcerl torque •44 51.10 1000 831 88.00 90 00 738 •4 00 • 188 MS 81.19 88 52 • 52 86 00 90 00 739 •7.13 ' 10 00 508..— 70 M 59 94 • 53 90.00 90 00 740 •9.44 17.31 Ml 73 11 80 00 • 34 89 63 90 00 741 . SMI •A 78 MS 77.87 16.46 • 55 88 A8 90.00 742 . 90 AJ • 9.86 Ml 88 03 90 00 636 90.00 90 00 743 92.00 eo no BIO 10 00 90.00 657 90.00 90.00 744 •2 10 ao 00 Ml 13 21 •100 00 • 51 91.63 81.66 745 •4.00 •0 00 tn 84 00 100 00 859 92.00 80 00 744 94.00 •o 00 673 14.88 100.00 BOO 90.00 81.29 747 94.0C •0 00 874 •0 00 100.00 801 89 43 92.80 748 94 00 •0 00 B7B 17 49 100 00 662 87.11 100.00 94.00 • in 876- . . 108 84 100.00 663 88.00 100.00 750 •4.69 •7.05 877 110.00 83.92 484 66.00 100 00 751 96.00 •7 40 878 104 77 Motoring 685 89.66 100 00 752 96 00 43 !• 671 87.80 Molortni 866, 90.00 90.27 153 taoo 42 33 MO.; 90.00 00 087 90.46 90.00 754 96 00 40.00 581 (131 Motoring 668, 9278 90.00 755 __*._.. 96.00 38 37 613 81.84 Motoring 640.... 95 09 90.00 756 96.00 12 83 883 65 99 Motoring 670 100.22 82.97 757 96 00 Motoring 814 •3.68 Motoring 671 102.00 10.00 758 96 00 Motoring 885 40.71 Motoring 872. 102 00 10.18 759 «... 96 00 Motoring 6M 5705 Motorinr 673 10200 80.00 760 97.74 7.37 887 83 47 Motoring •74... 97.34 80.07 161 100.05 19 14 Ml 80.42 Motoring 875 87 02 Motoring 762 102 o0 11 83 M9 14 31 Motoring 678 84 00 Motoring 763 102 90 36 81 610 37.58 37.91 •77 13 12 22.10 764 103 00 49 96 811 33 48 20.00 878. 75 77 39.42 765 104.00 <0 00 812 .._ 31 14 20.00 879 7576 48.80 768 102 37 60 00 613 28 86 20 00 680.. 75 11 37.23 767 103 24 60 OO 814 22 13 20.00 681.. 18 00 34 34 768 _. 104 X) 40 00 915 1.31 Motoring 682.. 80 37 4000 769 104.00 25 75 896 00 0.0 •83 77 51 47.49 770 103 17 Motoring 817. 00 00 •84 81 44 80.00 771 100 80 Motoring 818 00 0.0 •85 82 13 39.36 772 . 100 00 Motoring 819 - 00 0.0 •88 84.00 27.79 773 , .. . 101 33 44 88 • 0 0.0 687 84.00 16.21 774 102.00 >6.40 60too1 00 0.0 688 84 00 18.36 775 102 00 Motoring •02 0.0 0.0 •SB : 85.39 36 93 778 102.00 Motoring •03 0.0 0.0 . •90 •6 00 30.00 777 100.91 Motoring •04 0.0 0.0 •91 86.00 30.08 778 . 101.40 Motoring •05 0.0 0.0 •91 85.67 40.00 779 100.28 Motoring •06 2.62 • 30 693 84 65 40.00 780 •7.97 Motoring •07 10.30 17 87 604 86.00 35.20 781 96 00 Motoring •on — 13.89 20 00 805 87.28 30.00 182. 96.00 10 OO •09 20 20 20.00 606 88 00 22.05 783 96 00 0.23 • 10 — 24.07 22.69 •97 86.09 Motoring 784 96 00 Motoring en — - -33 33 17.50 •98 •3.78 Motoring 785. 96.00 Motoring • 12 40.30 Motoring 690 81 47 Motoring 94.08 Motoring • 13 47.85 Motoring 700.. 81.70 Motoring 787 18 00 Motoring • 14 •6.00 7.78 701 85.14 Motoring 785. __ 77.45 Motoring • 15 6*.f>0 1093 702 84.52 Motoring 7R9 71.67 235 96 • 10. •7.59 32.04 103.... 82.21 Motoring 7B0_ 61.18 •OOO • 17 ...._ ... _.... 66 00 40.00 704 79 89 Motoring 701. 66 50 •7.48 • HI — •• 67.04 40 00 705 77.58 Motoring 792. 71 43 90 DC 619 68 00 40 00 708 76.00 0.31 793 14.13 90 00 •30 68 00 48.33 707 79 !• 00 794 15 56 •2.20 •31 75 93 09 53 708 75 16 27.36 705 14.75 100.00 •32 78 00 100.00 709 72 00 40 00 798 77 07 94.65 •33 7H.00 100 oo 710 72 00 40.00 707 19 38 83.08 •24 - 77.97 100.00 711 74 00 38.44 7P8. MO.OO 71 81 •25 76 00 100.00 712. 74 00 30.00 790 f.'tOl •9 93 628 76 00 100 00 713 74 00 3000 800 82.33 58.36 •27 70 00 ' 100.00 714 74 00 36.28 801. 64 00 80 00 828. 75 01 100.00 715 12 43 47 86 802. •4 00 89 58 •29 13 00 97.50 718 68.23 59 43 803 •4.00 78.36 •30. 76 81 90 00 117 13 80 90 00 804 - 841)0 80.00 •31.. 80.24 90 00 718 12.52 50 00 805 84.00 70.49 •32..— 81 44 90 00 74.00 45 85 806. ,, .. b: 00 80 OO •33 84 00 08.79 720. 72.BS 87.18 807 . 81.47 87 66 •34 - — 84 00 100 00 76 38 82.70 808 80 00 •OOO •35 — 83 01 100 00 722 81.55 00.00 809- 77.68 •OOO •34 82 00 100 00 723 _.. 80.18 •0.00 810 14.53 1314 •37— 83.02 94 91 83 60 80 00 811 77 58 78 96 •38 64 67 90.00 725 •3 44 84 40 • 12 81.89 80 OO 639 89 65 90 00 720.. •800 80 00 813 - 80 42 St) 00 •40 90 00 99 81 87.35 80.00 814 •2 00 83 68 • 41 •P 45 100.00 •6.34 80.00 815 •3 05 79.50 • 43.... M00 100 00 86.00 40.11 816 •4 00 70 OO • 43 •4 00 95 47 730 . 88 29 • 1.47 817 84 00 • 1 60 •44.. 87 22 90 00 8618 •3.92 818 •4 00 80.03 •45 — 18 00 •0 00 86 92 80 00 819 88 00 •OOO •48 .. 84 00 80 74 733 84 74 60 00 •20 86 00 ss 00 •47 .... 88 00 79.17 734 87 55 42.24 821 66 00 •0 39 • 48 8A.00 77.21 735 •A 00 49.34 832 - •a st (3 73 • 41 68 DO 100 00 •6 no 80 91 • 23 88 43 IOOO •80 88 00 94 45 73/ 86 00 •1 43 • 24 . _.... • A.OO 19 OO - 278 - I pmcTNT RPM and PmctTfT Toaqi/e VR.mua Prncm«t RPM ann Puht.ht Towqpe Vrasui Pekctkt RPM ann Pr*rxxt tofqng Vnsos Time SctiEnotx—Continued Time ScHEuoLE-Conttnued Time sotcnout— Continued Percent torque Record (Sec.) Percent Rf Percent torque Record (Bee.) Percent RPM Percent torque Record t8ec.» Percent rpm •4.00 70.99 913 00 00 990 00 0 0 44.31 "80.00 913 00 00 1000 0 0 0 A •5.17 . 80.00 914 0.0 0.0 1001 0.0 0 O 93.14 80 00 913 0.0 0.0 1002 00 0O •4.34 80.00 916 0.0 0.0 1003 0.0 00 94.00 <0.00 917 00 0.0 1004.™ 00 0 O •4.00 77.89 010 0.0 00 1005 00 0 0 •4.00 31 99 919 00 00 1000 0.0 0 0 •4.00 43.87 920 0.0 00 00 0 0 04 00 00 28 921 ' 00 0.0 1008 00 0 0 04.00 6?.29 922 - 0.0 0.0 1009 00 00 •4.00 70.57 923 0.0 0.0 1010 0.0 o.o • 4.00 89 86 924 00 0.0 1011..- 0.0 0 0 •4.20 90.00 925 0.0 0.0 1013 0.0 0 0 07.00 87.00 920 0.0 0.0 1013 00 00 102.91 80.00 927. 0 0 3.07 1014 0.0 0 0 104.00 73.85 928 0.0 47.09 1013 _ 0.0 00 104 00 62.28 929 2.11 59.41 1010 00 00 104.00 69.29 930 , • 09 84.54 1017 0.0 0.0 100.00 70.00 931 15 62 80 00 1018.. 0.0 0 0 100.00 63.70 932. 33 49 80 00 1019 0.0 00 100 00 40 00 933 37 93 79 29 1020 00 • 0 104 88 40 00 31.20 38 25 1021 ,.,,, , 00 00 104.00 32.85 935 21 »9 26 87 1022 00 oo 104.00 30.00 938 - 30 00 18.10 1023 0.0 00 104 00 0.30 937 22.23 10.47 1024 00 • 0 103.03 11.87 19.61 2805 1025. 0.0 00 100.03 13.12 939 20.00 20.38 1026 00 • 0 05 00 8.01 940 18.33 Motorlnf 1027 0.0 00 90.08 10.00 941 6.58 Motortnf 1028 00 0 0 •0 00 Motortnf 15.82 Motoring 1029 0.0 0 0 90.00 Motoring 943 23.63 Motoring 1030 0.0 0.0 90.00 Motortnf 944 ' 17.81 Motorlnf 1031 1.77 Motortnf 93 43 Motortnr 945 14.10 62.32 1032 1.00 Motor! n« •4.00 Motorlm 948 16.64 69 36 1033 0.0 00 94.00 Motortnf 947 27.77 60.00 1034 0.0 00 95.33 8.18 • 948 27.03 63.79 1035 2.14 • 28 07 83 Motortnf C49 _ 47.36 73.30 1036 3.08 00 98.00 Motortnf 950. 84.77 80.00 1037 0.0 00 98.00 Motortnf 57.70 80 00 1038 ... 00 00 97.33 Motorlnf 952 - 54 03 79 92 1039 0.0 0.0 90 00 6.35 953 • - - 58.00 6503 1040 0.0 00 90 00 12.98 58 65 43.33 1041 0.0 0.0 90.00 10.00 955 , 62.88 80.00 1042. 00 00 98.93 10.00 936 ,,, 69.63 50 00 1043 ... ._ _ 0.0 00 92.00 10.00 957 72.00 4205 1044 . 0.0 00 93.00 10.00 958 75.81 40.00 1045 0.0 00 92.98 14.89 959. _ 84.22 42.20 1046 0.0 0.0 94.00 -13.84 960 83.86 41.28 1047 0.0 0 0 • 0 90.79 42.12 60.35 Motorlnf 1048 0.0 88.08 40.40 95 } 80.51 Mntortnf 1049 0 .0 . 5.51 88.23 30.00 963 ..... 78.00 Motorlnf 1030 0.0 11.34 88.00 32.75 964 ,. 79.79 Motoring 1051 00 • 0 87.14 44.32 963 80.33 30.54 1052 0.0 0.0 84.82 50.00 960 85.58 42.13 1053 00 00 82.81 50.00 967 81.78 50 00 1054 0.0 • 0 82.00 50.00 968 _ 78.00 50.00 1055 0.0 • 0 82.13 40.00 80.74 43 16 1056 0.0 0.0 83.13 33.64 970 92 10 73 65 1037 0.0 0.0 80 00 20.00 68.01 Motoring 1038 00 0.0 84.30 51.95 972 . 64.00 Motorlnf 1059 o.o 0.0 8002 00.21 973 — 84.00 Motoring 06 0.31 -84.31 infln 60.00 974 81.17 Motoring 00 30 00 81 99 lofll 9.96 975 - 70.48 Motorlnf 1062.! ; 00 24.7f 79 35 1.01 976 66.00 13.57 1083 . • 0 80 00 7.3 30 19.56 62.23 29 43 1064 00 30.00 73.03 40.00 970 64.00 20.00 1065.. 0.0 4.12 70.73 8.35 979 m 63.46 17.42 1066 00 00 08.42 Motorlnf 980 60.34 10.00 1067 0.0 00 47 15 8.95 981 56.85 1000 1006 0.0 00 35 79 10.00 98X * 50.00 Motoring 1069 0.0 - . 00 32.93 7.38 983 52.43 Motoring 1070. _ 0.0 • 0 29.10 Molorlnf 984 39 91 10.00 1071 • 0 0.0 16 47 Motorlnf 985 36 38 tooo 1072 0.0 00 Motorlnf • 986 - 30.00 1000 1073 to • 0 2.13 • 0 00 0.0 37 93 10 00 1074.. 00 1674 1073 0.0 00 0.0 00 20 00 0.0 989 27.60 3 36 1070 00 • 0 • 0 00 00 0.0 990.. , 28.00 Motoring 1077. 0.0 1078 • 0 00 0.0 27.41 Motorlnf • 0 0 0 0.0 992 30.90 Motorlni 1079 . • 0 0.0 0.0 00 0.0 993 12.15 Motortnf -1080 • 0 00 0.0 994 3.81 Motoring 1081.. • 0 • 0 00 00 0.0 095..'. 00 00 1082 00 09 00 00 00 00 00 too 00 00 00 00 001 10*4 • 0 1014 • 0 00 00 on 00 752 - 279 - I Prxcnrr RPM AKD tmcrrrr TORQUE Vnsos Pmcrjrr RPM akd Ptncnrr Torque Vdjui TIME SCHEDULE—Continued Time Schedule—Continued Record (Bee.) Percent RPM Percent torque Record <8rc.) Percent RPM Percent torque 1086 r 0.0 ao oo 86 54 Motortnf 108 7 00 2000 63.56 Motoring 108 8 00 11.73 66.00 Motoring 1069 0.0 0.0 46.00 Motoring 1090 00 0.0 41.60 45.18 (091 0.0 0.0 . 38 31 78.47 1092 0.0 00 35.98 80.00 1003 00 0.0 31.03 80 00 109 4 0.0 0.0 25.36 •0.00 109 5 0.0 0.0 23 05 00.97 1096 . 0.0 0.0 IB 30 27.34 109 7 0 0 0.0 13.84 43.71 109 8 0.0 0.0 10.10 68.95 1099 0.0 0.0 3.78 68.95 1.48 44.28 1100 0.0 of0.0t 0.0 O.O 1101 0.0 0.0 lioz o.o 0.0 0.0 0.0 110 3 0.0 0.0 0.0 0.8.0 1104 00 0.0 0.0 0.0 110 5 0.0 0.0 0.0 0.0 1106 0.0 0.0 0.0 0.0 110 7 0.0 0.0 0.0 24.97 110 8 0 0 0.0 110 9 00 0.0 0.0 17.16 111 0 0 0 0.0 0.0 6.20 00 00 1111 0.0 0.0 ' 1000 11IX 0.0 00.00 0.0 10.00.00 111 3 0 0 0.0 0.0 111 4 00 0.0 0.0 0 JO 0.0 111 5 0.0 73.41 0.0 0.0 1118 00 00.00 0.0 0.0 111 7 0.0 81.30 0.0 0.0 111 8 2130 00.00 0.0 0.0 1118 41.15 00 00 0.0 00 1120 44 00 00.00 0.0 0.0 1131 46.41 82.41 0.0 0.0 1122 61.04 80.00 00 0.0 113 3 66.66 00.00 00 0.0 113 4 75.03 00 00 00 00 1135 89.85 03.88 0 0 0.0 113 6 96.78 50.94 00 00 1137 96.91 17.02 0.0 00 113 8 94 60 28 80 0.0 0.0 1139 99.16 39.83 00 00 113 0 100.00 30.00 00 0.0 113 1 100 00 28.69 0.0 00 1133 100 00 20.00 0.0 0.0 113 3 100.98 20.00 0.0 00 113 4 100.71 36.06 0.0 00 113 5 100 00 40 00 0.0 0.0 1138 9618 30.00 0.0 0.0 113 7 95.77 32.75 0.0 00 113 8 94.55 35.66 0.0 0.0 113 9 86.86 30 00 0.0 0.0 1140...- 99.16 44 93 0.0 00 114 1 - 100.00 6 0.00 0.0 0j0 114 2 101.81 - 280 - I APPENDIX 3 Curve Fit Routine - 281 - APPENDIX 3 < o c - - c C h QUI I NE NAME : CURVE C C AUTHOR : S.WIJEYAKUMAR C C MECHANICAL ENGINEERING DEPARTMENT C C IMPERIAL COLLEGE C C LONDON SW7 2BX C C FUNCTION : A PROGRAM FOR LEAST SQUARE C CURVE FITTING OF A CUBIC C TO EXPERIMENTAL DATA. C 0 0 C THIS PROGRAM SETS UP THE MATRIX, THEN C CALLS THE GAUSSIAN ELIMINATION SUBROUTINE 0 c- - c REAL MATRIX DIMENSION MATRIX(4,5),A(4),SUM(6),RIGHT(4) DO 10 1-1,6 C CLEAR THE VARIABLES THAT ARE USED TO C ACCUMULATE THE SUMS 10 SUM(I).0 DO 20 1=1,4 20 RIGHT(I)=2 .2 C READ THE DATA POINTS AND FORM THE C VARIOUS SUMS DO 40 J=1,10 READ(4,102G) TG, EX 1000 FORMAT(2F5.1) DO .30 1=1,6 30 SUM(I)= SUM(I)+TQ**I DO 40 1=1,4 40 RIGHT(I)=R1GHT(I)+EX*(TQ**(1-1)) C SET UP MATRIX COEFFICIENTS MATRIXC1,1)=10.0 DO 50 1=1,4 MATRIXCI,5)=RIGHTCI) DO 50 J=1,4 K=I+J IF ( K .NE. 2) MATRIXCI,J)=SUM C K-2) CONTINUE C CALL THE GAUSSIAN ELIMINATION SUBROUTINE CALL GAUSSCMATRIX, A) C PRINT THE RESULTS VRITEC4,1100) C A(I), 1=1,4) 1100 FORMATC3X,4CF10 . 4, 2X) ) STOP END DOSPIP V6A > - .282 - L c------c L R CJLT l iJE Nf~ME GAUSS (, (, AUTH OE S.wiJEYAKUMAR c C MECHANICAL ENGINEERING DEPARTMENT c c I~'JPERIAL COLLEGE c c LONDUr~ S'W7 2BX c c FUNCTION THE METHOD OF GAUSSIAN ELirvJI c NATION FOR SOLVING SIMULTANE c OUS LINEAR ALGEBRAIC EQLA:IO (.; NS IS USED c (,------~------(; C PART I AL PI V0 T C CJ NDE NSA T I 0 N IS US ED , TH t, T C IS, A SEARCH IS MADE IN EACH COLUMN FCR C THE DIAGO~JAL, bLT OTHER COLU~iN ARE NOT L SEAhCHED. c c------t. S L !1 R 0 l T I NE G~. US S < A , X ) Dl~ENSIO~ AC4,5),XC4) N=4 NP 1 =5 Nl'Jl =tJ- 1 D 0 60 0 r~ =1 , NM 1 KP 1 =K+ l L=K DO 40~ I=KPl,N 4k10 IF CABS C A CI, K) ) • GT • ABS CA CL, K) ) ) L =I !FCL .EQ. K) GOTO 500 D 0. 4 1 0 J =l< , NP 1 TEMP=ACK,J) A<~, J) =~. > - 283 - I APPENDIX 4 Source Listing of Control Software ROUTINE NAME PAGE 1. MAIN 284 2. CONTROL 288 3. TQCONTROL 29 2 4. SPCONTROL 296 5. MAXBRAK 299 6. MAXENG 301 7. PRINT 302 8. TRANS 303 9. COMSTEP 3Q5 10. CUTOFFPT 3Q7 11. PID 309 12. DACSET 312 13. SETBEC 315 14. SETGOV 316 -15. RDTQ 318 16. DECIMAL '- 320 17. INTERUPT 321 18. SFTALARM 323 19. CURVFIT 324 20. RDSPD 327 21. DECBIN 329 22. SYSMAP 1 330 23. SYSMAP 2 333 24. SYSMAP 3 335 25. SYSTEM MESSAGES 338 - 284 - I * IDT : M-A-I-N * * BU2 ECU 00002 0 03 ECU 00003 004 EQU 00004 SI AT 00256 RSET LWPI WSP LI MI 00000 * * PRINT HEADER if XOP LCR 14 XOP MSA 14 XOP LCR 14 if * READ DATE if XOP MSB 14 XOP R4 11 CI R4 03328 J NE $-006 XOP LCR 14 ENTER ENGINE ID -f XOP MSC 14 XOP R4 11 CI R4 03328 JNE $-006 XOP LCR 14 * * PRINT TEST INSTRUCTIONS if XOP MSG 14 XOP LCR 14 XOP MSH 14 XOP LCR 14 XOP MSI 14 XOP LCR 14 GET LOWEST C; XOP MSD 14 LLV.P LKA MOV RU LS XOP LCR 14 lZ i MAX. i f'Ec.0 Or LNlI.'.E - 285 - XOP MBL 14 ULWP LKA MOV RO MSP XOP LCR 14 DOES MAX. TO CURVE OF BRK ENVELOPES MAX. TQ CURVE OF ENGINE XOP MSF 14 XOP R4 11 XOP LCR 14 CLR SKP CI R4 22784 JEQ $+006 INC SKP INITIALISING INTERRUPT VECTOR ADDRESSES LI R0 INT LI RI 00032 LGW OIL PRESSURE MOV *R0+ *R1 + MOV *R0+ *R 1 + HIGH OIL TEMPERATURE MOV *R0+ *R1+ MOV *R3+ *R1 + HIGH WATER TEMPERATURE MOV *R0+ *R1+ MCV *R0+ *R1 + LOWER GOV. CONTRL LIMIT MOV *RO+ *R1+ MOV *R0+ *R1+ UPPER COV. CONTRL LIMIT MOV *R0+ *R1+ MOV +RS+ *R1 + CLOCK INTERRUPT -.0.1 SEC MOV *R0+ *RI+ MOV *R0 *R1 , CLEAR INTERRUPT FLAGS LI RI2 00032 SBZ B03 SBZ B04 SBO B04 SBZ B04 ENABLE GOV. CONTROL LEVER INT. LI MI 0J012 VN'A.-'U lMl-RH'Pl Ilia. - 206 - SbO G03 . CLEAR INTERRUPT FLAGS CLR IFL I NII. GOV. CONTROL LEVER POSN. SBZ B02 SB 0 B02 SbZ B02 MOV IFL IFL JNE $+014 CLR Ri INC Rl CI Rl 00600 JNE $-006 JMP $-022 PRESS A KEY WHEN READY XOP MSU 14 XOP R4 11 XOP LCR 14 GET MODE OF TEST - STEADY OR TRA -IENT MODE. XOP MSJ 14 XOP R4 1 1 XCP LCR. 14 CLR MOD CI R4 21504 JNE ST SET MOD FLAG FOR TRANSIENT AND PRINT HEADER I.NC MOD XOP LCR 14 XOP MSY 14 XOP LCR 14 JMP $+010 PRINT STEADY STATE TEST . HEADER XOP LCR 14 XOP MSX 14 XOP LCR 14 CLEAR INTERRRUPT FLAGS SBZ 003 SBZ S04 SbO 1304 SbZ B04 SbO B03 BRANCH TO CONTROL .MODULE 6LWP LKB L»i'J 3 3 3 3 3 c 0 N UN BBS 00002 IfL BSS 3 3 3 3 2 LSP till 30302 MSP BSS 00002 t KP USS 00032 INI BSS 00 002 MOD uSS 00002 LKA BSS 00002 LKB DSS 00002 MSB BSS 00032 MSA BSS 00002 MSB BSS 00002 MSC BSS 00002 MSD BSS 00002 MSE BSS 00002 MSF BSS 00002 MSG BSS 00002 MS H BSS 00302 MSI BSS 00002 MS J BSS 00002 MSX BSS 03302 MSY b'SS 00002 LCR L'SS 00002 V.SP oSS 30032 .END DOSPIP V6A - 288 - I * IDT : CONTROL T» 803 EQU 00033 STAT 00800 LWP1 WSP LI R12 00032 * * INITIALISES FLAGS CLR TRF STR CLR PID CLR NSP CLR NTQ CLR ESP CLR ETQ CLR DEL CLR IFL CLR TIM CLR ST CLR CK CLR CK1 CLR CK2 if * MASK CLOCK INTERRUPT * LIMI 00012 * * ENABLE INERRUPT LINE if SBO B33 if * TEST FOR MODE OF OPERATION if MOV MOD MOD JEQ $+008 if * INVOKE TRANSIENT MODULE if BLWP LKQ JMP BEG if * STEADY STATE OPERATION * * READ SPEED FROM TTY XOP MSK 14 RDL ULW'P LKA XOP LCR 14 1LEl VOR AV.CLPIAI.LL SPllD MOV LLP Ri - 289 - MOV MSP R2 c R0 Rl JLT $+012 C RO R2 JGT i+oos MOV R0 SP2 JMP $+012 * PRINT ERROR MESSAGE * XOP MSM IA XOP LCR 14 JMP RD1 * * READ ENGINE TQ FROM TTY * XOP MSL 14 RD2 BLWP LKA XOP LCR 14 MOV R0 TQ2 * * BRAKE MAX. TQ. CHECK * MOV SKP SKP JEQ ENG MOV LKG RL MOV SP2 *R1 EL'*P LKG C TQ2 R0 JGT $+0K0 * * ENGINE MAX. TQ. CHECK * ENG MOV LKH R2 : MOV SP2 *R2I BUP LKH C TQ2 R0 JLT BEG * * PRINT ERROR MESSAGE * XOP MSN 14 XOP LCR 14 JMP RD2 * * INDIRECT BRANCHING * IND JMP STR * * ENTRY POINT FOR SCHEDULING * CONTROL MODULES ^ * * * ENABLE CLOCK I NT. * BEG LI MI 00013 INITIATE SPCONTRL MODULE X. £ PLWP LKI I'L'./ULL (..CCH IM, - 290 - L J MI 000 12 y * I H A N 21R N T R X V»E RI JI P. N T . * CHECK FOR FIRST TEST POINT X MOV TRF TRF JEQ $+0 14 MOV TIM R1 CI R1 00020 JGT IND JMP BEG * SET POINT ERROR CHECKING MOV ETQ R1 MOV ESP R2 ' * * CHECK FOR 5 CONSEQUTIVE * ACCEPTABLE TORQUE * CI R1 00005 JLT BEC * * IF IFL IS SET ,DO NOT CHECK FOR * SPEED CORRECTION ELSE CHECK 5 * CONSECUTIVE ACCEPTABLE SPEED. x MOV IFL IFL JNE $+008 CI R2 00005 JLT BEG * TEST FOR MODE OF OP. * MOV KGD MOD JEQ $+016 MOV ThF TRF JNE IND INC TRF JMP IND * * PRINT TORQUE & SPEED * MOV LKJ RO MOV SPl *R0+ MOV TQ1 *R0+ MOV STP . *R0 BLwP LKJ JMP 8E6 R1 WP u>SP USS 00032 CK USS 00002 CKl BSS 00002 CK2 BSS 00002 ST BSS 00002 SPl BSS 00002 T 01 BSS 00002 SP2 BSS 00002 T02 USS 00002 SYN BSS 00002 TIM BSS 00002 MUD BSS 00002 STP USS 00002 , c < .' . '1 ' • •«. 11 \. c. LLP I: r ' 0 0 2 i\ T (. DSS 0 it: C 2 ESP JSS O O tJ 2 L1G ESS J ,'JCltid. DEL ESS 2 2 2j 0 2 PID BSS 00002 SKP BSS 00002 IFL BSS 00002 ThF BSS 00002 LKI BSS 00002 LKA BSS 00002 LKG BSS 00002 LKH BSS 00002 LKJ BSS 00002 LKQ BSS 00002 MSJ BSS 00002 MSK BSS 00002 MSN BSS 00002 MSL BSS 00002 KSM BSS 00002 LCR BSS 00002 .END DOSPIP V6A > - 292 - I IDT : TCCGN1RLF EGL' 00004 2^6 LFCPI WSP INCREMENT TILE COUNT INC TIL INCREMENT DEL COUNT INC DEL CLEAR I'.} IE REIPT FLAGS LI R12 00032 SbZ bC-4 SbO B04 SUZ B04 | READ TQ FROM ENGINE BLWP LKL MOV RO R8 iOOV RU IQ1 READ ENGINE SPEED LI R1 0000 1 LCV LKF R2 ivj OV R1 *R2 BLWP LKF M OV RZ SP1 IS PID UN MOV PID PID JNE PI MOV CK2 CK3 MOV Chi CK2 MO V CK CK1 MOV R0 CK CHECK DHLA Y TO INVOKE T ORCUE .CuN TROL A - 293 - CHECK r OA NEC ] Q MOV NIC NIG JNE. CHK CHECK FOR LOAD CONDITION CLR UFL MOV TG2 RIO MOV R10 R0 C Ri 0 R8 JCI LD SEI CUT,UFL & INT. BEC VOLT FOR UNLOAD CONDITION INC UFL CLR R6 LI R2 03323 A R2 R0 MOV RO CUT JMP ERR SET CPT,UFL & INT. BEC VOLT. FOR LOAD CONDITION * LD BLwP LKR MOV Rj CP.T LI R6 01000 JMP ERR CHECK FOR CUTOFF CONDITION FOR LOADING if CHK MOV UFL UFL JNE ULD C TIM CPT JLT TST MOV ST ST JNE PK INC ST CLR R6 JMP SET PK MOV CK R0 S CK2 R0 MOV RJ R0 JLT $+J16 JMP TST if * CHECK CUTOFF CONDITION if FOR UNLOADING if ILD C R8 CUT JCT TOT MOV R8 UK JMP $+33 6 MOV RIO UK I NIT. PID MODULE IMC PID CLR RJ1 i.. j I • \ > - 294 - I •> I NVO/- PID PI CLR RO INC ?U 1 CI KI 1 02 JNE $+0 1 6 CLR RL 1 MOV L KM R2 MOV R8 *R2 + MOV R10 *R2 BLWP LKM * * LIMITING THE G/P OF THE * PID TO A MAX. VALUE OF 2 MKP * PER COMPUTATION STEP * LI R3 00020 MOV R0 RL ABS RL C Rl R3 JLT $+0] 0 MOV R0 R0 JBT $+004 NEG R3 MOV R3 R0 A UK R0 MOV R0 UK MOV RU R0 JGT S+004 CLR R0 * CHECK SET TQ ERROR * ERR 5 Rl 0 R8 ABS R8 CI R8 00002 JbT $+024 INC ETQ MOV ETQ Rl CI Rl 00001 JNE $+014 MOV Rl 0 UK MCV Rl 3 RS JMP $+006 CLR ETQ * CHECK FOR NEV TO MOV NTG NTQ JNE $+008 INC NTQ JMP SET * * * INVOKE DACSET BLC M OV LKC R3 MOV R0 +R3+ MOV SPJ *R3 BLWP LKC MOV F.J R6 I NVO}( E SETBEC •f ,\0V AC ;>L*P LR.H - 295 k * IRA.VF.ILM TEST CHECK TST MOV TRF TRF JNE $+334 RIwP MOV TIM RJ CI RJ 33323 JOT $+334 RTWP MOV PID PID JNE $+310 INC PID MOV RI 0 R3 JMP DEC •RTwP k'sp bis 30032 dll bss 00032 cb bss 00002 tim bss 00002 tli bss 33002 702 bss 03332 pjd bss 30332 ck bss 00302 oki bss 00332 ck2 lss 03302 ck5 bss 03332 dtq bss 03332 ntg bss 30332 ufl bss 30j32 cut bss 33332 lpi dss «-/»_.' c 2 £t bss 30032 uk bss 30032 etc bss 00302 sp1 bss 32032 trf bss 33332 lkl bss 30332 lkf bss 02032 lkm bss 30002 lkc bss 00002 lkk bss 3z002 lkr bss 00032 .end dcspip vga - 296 - I * IDT : SPCONTRLF * * STAT 01700 LWPI WSP RD LI Ri 00001 MOV LKF R2 MOV Rl *R2 * DISABLE CLOCK INT. * LIMI 00012 * READ ENGINE SPEED * BLWP LKF * * ENABLE CLOCK INT. * LIMI 00013 * * CHECK WHETHER THE READ * SPEED LIES WITHIN THE SPEED * BAND OF THE ENGINE * C R0 MSP JGT $+010 C R0 LSP JLT $+004 JMP $+004 nlv.'P * * CHECK FOR SPURIOUS SPEED * READING * MOV NSP NSP JNE $+012 MOV TIM R5 MOV R0 SPl JMP ERR MOV TIM R3 5 R5 R3 ABS R3 MOV R0 Rl S SPl Rl AuS Rl LI R4 002. .297 i:J\. (\ ,".- i\ J - - \.... hl ;ri{tC JL1 1+~l:4 f< 1 ~.' p I :r. (J v Tii"i fi) ~~ uv E k~ ~Pl * :+ CHECY. fOR 1f'A!JS1EN1 (Jp I ~ l'JGV 1?\F 1RF JEQ ERR ~i ov T Ii~ Rl Cl Rl ~)0020 JLT ERR RTWP * * CHECK SET SPEED ERRuR * c. ERR a.J 5P2 R0 ABS R0 CI R0 kj0010 JGT .$+008 INC ESP RT:..JP. CLR ESP ~ ~ CHECh NE\.,. SPt:ED FLAG :.'!( f'j (i v tJSP NSP J :~E $+008 1 :JC NSP Jf'iP COf1 * CnE Cr: rOFt IJELAY ~ ~ uv DEL R0 Cl R0 ~30'10 JGT COM Rr·~r * * CGMPU1E NO OF STEPS *COM iV:GV LKD R3 LI R5 SPI rv:ov *R5+ *R3+ r1ov ~h)+ *n3+ ~iOV *R5+ *R3+ f"JOV *h5 *R3 BL \\:p LKD * * INIT. SETGOV fi OUT I NE * CLR IFL MOV LKE R4 lY. ov f\0 *R4 * * BRANCH TO SETGuV R UU TINE * ELWP LKE CLR DEL kT'hP ." ~.P L< ss ;J ~) ~13 2 ". <: \.1 ",...._,..;~' <:..; c JJ~Hj2 ' ~ ..... ' I...... '-· ,,_; t5 ~) ~J. u~H.0~) 2 { ~· i I 1 iJSS 00002 :.. .»S5: \j /' 0 it 2 ;ci OSS 000 02 ESP BSS 00032 LLP n££ 0 0 0 0 2 11 I'J BSS 00002 TKF BSS 00002 LKE BSS 00032 LKF BSS 00002 LKD BSS 00002 • END DOSPIP VSA - 299 - * IDT : MAXBEAK * * STAT 04200 Lv.PI WSP LI R11 00100 MPY Rl1 R0 DIV BSP R0 * * SYMMETRICAL ROUNDING * MOV BSP R2 ERA R2 1 C Rl R2 JLT $+024 INC R2 * * BRANCH TO CURVFIT ROUTINE LI R3 AJ CI R0 00100 JGT $+008 LI R4 BR 1 JMP S> + 0 0 6 LI R4 BR2 MOV *R4 + *R3+ MOV *R>C 4 + *R3+ M OV F.4 + *R3+ MOV *R4 *R3 MOV LKN R5 MOV R0 *R5 BLWP LKN MPY BTM R0 DIV Rl1 R0 * * SYMMETRICAL ROUNDING * CI Rl 00050 JLT $+004 INC R0 MOV R0 *R 13 RT wp WSP ^SS 00032 d SP LAI A 00002 02300 d 1 M LA 1 A \U 0 0 0 2 0041 5 Hi bSS 00002 j R1 PA j A 0000S 0000 1 00235 u K2 DATA 6523 6 6ET30& L K N BSS 000v32 . END D0SB1P VGA - 301 - I * * * J IDT PJAXENG * STAT 04350 LWPI WSP LI R 1 1 00010 MOV H U RL CLE R0 DIV RL 1 R0 * SYMMETRICAL ROUNDING CI RL 00005 JLT $ + 004 INC R0 X x ERA:: CH TO C'JRVF IT ROU ^F LI RL AI LI R2' ENB MOV *R2+ *R1 + MOV *R2+ MOV *R2+ *R1 + MOV *R2 *R1 MOV LKN R2 MOV R0 *R2 BLWP LKN MOV R0 *R13 RI'..? WSP OSS 00032 AL BSS 00002 EN 6 DATA 00008 00120 0O144 65490 00000 LKN DSS 00022 • END DCSPIP V6A IDT : PRINT 04 600 LVP1 *SP LI R10 02560 LI R9 03328 MOV LKO R3 XOP R10 14 XuF R9 14 MOV IFL IFL JEQ S+006 XOP MSG 14 XOP MSO 14 MOV R0 *R3 3LWP LKO XOP MPP 14 MOV R1 *R3 BLWP LKO - XOP R10 14 XOP R9 14 XOP MSZ 14 MOV R2 *R3 BLW'P LKO XOP R10 14 XOP R9 14 RT WP WSP BSS 00032 LKO ESS 00002 IFL uSS 00002 MS P V6A - 303 - I * IDT : TRANS * STAT 05060 ' LWPI WSP LI R7 10000 MOV TRF TRF JNE STO CLR R8 MOV AST R9 MOV SAD RI0 MOV ' RAD R11 JMP RD * * STORE SPD, TQ & STP MOV SP1 RI s LSP RI CLR R6 MOV RI RI JOT S+ 03 6 INC R6 ABS RI MPY R7 RI DIV OSP RI MOV R6 R6 JEQ $+004 NEG RI M OV RI *R10+ MOV TGI R3 MPY R7 R3 DIV OTQ R3 MOV R3 *R1 0+ MOV STP *R9+ READ SPD & TG INC R8 CI R8 00100 JCT EXT MOV *R11+R1 CLR R 6 MOV RI RI JOT $+006 I NC R 6 ABS RI MPY OSP RI D1 V R7 RI MOV KG R6 t> LLP Rl MOV hi 5P2 v V ii OV *R 11 + R3 MPY OTQ R3 DIV R7 R3 MOV R3 IQ2 * R T WP * EXT LWPI 02000 MOM BSS 00004 WSP OSS 00032 TnK BSS 00002 AST bSS 00002 SAD bSS 00002 RAD BSS 00002 SP1 BSS 00002 LSP BSS 00002 DSP BSS 00002 Hi BSS 00002 OTQ BSS 00002 STP BSS 00002 SP2 BSS 00002 Tu2 BSS 00002 • END DOS?IP V6A > - 305 - I * IDT : CGMSTEPF * * STAT 02900 Lu'PI WSP LI RI1 01000 * * R4=M=(CM1 X TGiD/1000 + CC1 if MOV RI R4 MPY CM 1 R4 DIV nil R4 CI R5 00500 JLT $+004 INC R4 A CC1 R4 if if R 10=M(£PD2-SPD1 )/1000 jf MOV R2 R5 S R0 R5 CLR R9 MOV •R5 R5 JOT $+006 INC R9 A13S R5 MOV R5 R8 MPY R4 R5 DIV RI1 R5 CI R6 00500 JLT $+004 . INC R5 MOV R9 R9 JEQ $+034 NEG R5 MOV R5 RI0 if * R4=M X KST X(TQ2-TQ1)/1000000 if MPY KST RA DIV RI 1 R4 CI R5 00500 JLT $+304 INC R4 S RI R3 CLR R9 MOV R3 R3 JuT $+006 ' . IJ M'Y t IV nil CI FT 5 JL1 $+004 I NC R4 MOV R9 R9 JEQ $+004 UEG R4 A R10 R4 ADJUST GAIN CONST FOR STEPS CI R8 00050 JGT $+008 LI R2 00500 JMP $+006 LI R2 0075-0 CLR R3 MOV R4 R4 JGT $+006 INC R3 AGS R4 MPY R2 R4 DIV Rll R4 CI R5 00500 JLT $+004 INC R4 MOV R3 R3 JEQ $+004 NEG R4 MOV R4 *Ri 3 FT VP WSP BSS 00J32 KST DATA 00002 02333 CM 1 DATA 00002 00114 CC1 DATA 00002 00093 .END i DCSPIP V6A > - 307 - I / * IDT : CUTOFFPT ^ * STAT 048(50 LWPI WSP LI R8 00020 LI R7 01000 MOV TQ1 R10 MOV TQ2 RS * * MEASURE SPEED * MOV LKF R1 LI R2 00001 MOV R2 *R1 3LWP LKF MOV R0 Rll * * COMPUTE CORRECTION FOR * TQ1 AT 1500 RPM * LI R0 01500 MOV R0 R1 CI R10 03005 JLT $+032 S Rll R1 CLR R6 MOV R1 R1 JGT $+006 INC R6 ABS R1 MPY R8 R1 DIV R7 R1 MOV R6 R6 JEQ $+004 NEC R1 A R1 R10 MOV R10 R10 JOT $+004 CLR R10 * * COMPUTE THE CORRECTION * FOR TQ2 AT 1530 RPM * CI R9 00005 JLT $+034 S SP2 R0 CLR RG MOV R3 R0 JOT $+306 INC RG AbS R3 H V h'i :\0 i'i C V r.C RO - 308 - JEG + iL U 't NEC R0 A R0 K9 MOV R 9 R9 JOT $+004 CLR R9 * * COMPUTE CUTOFF PT * S R10 R9 MOV R9 Rl MOV Rl Rl JOT $+004 CLR Rl CI Rl0 00030 JGT CI2 * CUTOFF PT FROM CURVE 1 CI Rl 00010 JOT $+00 8 LI R0 00005 JMP EXT A CI Rl CLR R0 DI V Ml R0 JMP SYM *. CUTOFF PT FROM CURVE 2 CI Rl 00010 JOT $+008 LI R0 00003 JMP EXT A C2 Rl ; CLR R0 DI V M2 R0 ' * SYMMETRICAL ROUNDING * SYM CI • Rl 02005 JLT $+004 I f.'C F:0 EXT A T/M R0 MOV R0 *R13 RTWP WSP ' BSS 1.1" ;;- L>> 7O 0c. TIM BSS 22002 TQ1 BSS 02022 TQ2 BSS 20002 5P2 BSS 00202 Ml BSS 00002 CI BSS S0O22 BSS 00002 C2 BSS U u o' kJ £ LKF BSS 00002 • END DOSPIP V6A - 309 - I ^* IDT : P-I-D-r x STAT 02288 LWPI .WSP LI R6 00100 LI R7 00600 LI R8 01000 MOV Rl R9 MOV CK2 CK3 MOV CK1 CK2 MOV CK CK1 MOV RO CK * E12 = KI (RK-CK) X MOV R9 R0 S CK R0 CLR R4 r.CV RO R0 JOT $+012 INC R4• ABS R0 LI R5 00*00 JMP $+006 LJ R5 00200 MOV R0 Rl * * CHECK FOR CONTROL BAND * ADJUSTMENT C R0 CB JGT $+008 MPY KI Rl JMP $+008 MPY R5 Rl DI V R8 Rl MOV Rl R2 MOV R4 R4 JEQ $+00 4 NEG R2 MOV R2 R1 0 X X R2 - KP (CKl-CK) X MOV CK 1 Rl S CK Rl CLR R3 MOV Rl Rl JGT $-1004 INC R3 CHECK FOR CONTROL LAND - 310 - I AI JL 01 ML NT C R0 CB JOT MPY R6 RL JMP $+01 6 CHECK WHETHER THE KI I KP COMPONENTS HAS SAME SIGN C R4 R3 JEQ $+004 CLR RL MPY KP RL' DIV R8 RL MOV RL R2 MOV R3 R3 JEQ $+004 NEC R2 R1J=(KI(RK-CK) + KP(CK1-CK))/1000 C R0 CB JGT $+036 A RL0 R2 CLR R4 MOV R2 R2 JgT $+006 INC R4 ABS R2 CLR RL DIV R8 RL SYMMETRICAL ROUNDING CI R2 00500 JLT $+004 INC RL MOV R4 R4 JEQ $+004 NEG RL MOV RL RL J JMP $+00 6 A RL 0 R2 MOV R2 RLL R0 - KD((CK-CK3)+3*(CK1-CK2)) /600 MOV KD R4 C R0 CB JGT $+00 6 LI R4 00000 MOV CK R0 S CK3 R0 MOV CK 1 RL C CK2 RL CLR R5 MOV RL RL JGT $+006 INC R5 ABS RL LI R3 00003 MPY R3 RL JLL. I- < ».' 4 G RE - 311 A R2 h 0 CLR R5 MGV R0 R0 JGT $+006 I NC R5 ABS RO MPY R4 RO DI V R7 R0 MOV R5 R5 JEQ $+004 MEG R0 A R11 R0 MOV R0 *R1 3 RTWP USP BSS 00032 CK BSS 00002 OKI BSS 00002 CK2 BSS 00002 CK3 BSS 00002 KP DATA iJo i»r* DOSPIP V6A - 312 - I IDT : DACSET M 02000 LWPI WSP MOV R0 TQ MOV RI SPD MOV PT R9 LI R8 01O00 RCRCTG X 100G)/TN MOV BTM R2 r'p Y RE RU biv R2 RJ SRA R2 1 C RI' R2 JLT S+004 INC R0 C R0 R9 JCT LIN COMPUTE EXC1 FROM NON-LINEAR PART OF CURVE FOR 500 RPM. LI R3 'Al MOV R3 R4 LI R5 E01 BRANCH TO CURVFIT ROUTINE MOV *R5 + *R3+ MOV *R5+ *R3+ MOV *R5 + *R3+ MOV *R5 *R 3 J MOV R0 RI MOV LKN R2 MOV RO *R2 DLWP LKN MOV R0 RI 2 COMPUTE EXC2 FROM NON-LINEAR PARI OF CURVE FuR 4000 RPM. LI R5 El 1 BRANCH TO CURVFIT ROUTINE MOV *R5+ * R 4 + MOV + R5 + *R4 + : i;V * -.5 • >\ i - 313 - I i) 0 v h 1 x R2 LLl.'P LKN MOV RJ Rl JMP COM COMPUTE EXC1 FROM LINEAR PART OF CURVE FOR 528 RPM MOV RG Rl MPY DM1 Rl DI V R8 Rl CI R2 00500 JLT $+004 INC Rl A DC1 Rl MOV Rl RIB COMPUTE EXC2 FROM LINEAR PART OF CURVE FOR 4200 RPM M OV R3 Rl MPY DM2 Rl DIV R8 Rl CI R2 02503 JLT $+004 INC Rl A DC2 RJ MOV Rl Rl 1 h0=EXCI + (SPD-ISP)(EXC2-LXC1)/(TSP-ISP) MOV SPD R0 S ISP [\ IF COMPUTED EXC < 2 ,SET EXC =0 OR IF COMPUTED EXC >1202 , SET EXC =1000 MV. MOV R2 R2 JGT $+006 CLR R2 JMP $+012 CI R2 01001 JLT $+006 LI R2 01000 r j f • lir . < '• O J J32 - 314 -e t . . • o Ai lj.. . . r/1./ o c L).;: DPS 0 D 0^2 To oSS t'j 00 iv 2 LP!) cSS 000 02 . " Q PT DATA t J O | M £ 00 150 ISP DATA 00002 00500- TSP DATA 00002 04000 o DIM DATA utivoc.!-><>•> '•• 004 15 DM 1 DATA 00002 00489 DC 1 DATA 00002 00120 DM2 DATA 00002 00278 DC2 DATA 00002 00085 E01 DATA 00008 00*004 00434 65 124 00138 El 1 DATA 00008 00002 00239 65338 00062 .END DOSPIP V6A > - 315 - I / * IDT : SETBEC * B1* 0 ECU 00010 STAT 03580 LWPI wSP LI RIP 00096 LI R10 01000 MPY DAC R0 DIV R10 R0 * * SYMMETRICAL.ROUNDING * CI R1 00500 JLT $+004 INC R0 * * LOAD CRU REGISTER LDCR R0 10 * * START DAC CONVERSION SBZ B10 SBO' B10 SBZ B10 RTv/P WSP BSS 00032 DAC DATA 00002 01023 .END DOSPIP V6A - 316 - I IDT : SETuOV BUI EQl! 00001 EQU 00002 * STAT 03100 UP I WSP LI Rl 2 00032 MOV R0 R0. JEQ EXT JLT RED * * INCREASE SPEED * SBZ B01 LP1 SBC B01 SBZ B01 INC STP DEC R0 JMP TST * * REDLCE SPEDED RED SBZ B02 LP2 SBO B02 SBZ B32 DEC SIP INC R0 * * CHECK FOR INT. FLAG * TST MOV IFL IFL JNE EXT * * CHECK FOR TRANSIENT TE ^ MOV TRF TRF JEG SKP MOV TIM Rl CI Rl 00010 JG7 EXT * * CHECK FOR ZERO STEP * SKP MOV R0 R0 JEG EXT * * 5 MILLISEC DELAY * CLR Rl INC Rl CI Rl 00600 JNE $-006 MOV R0 R0 JOT LP1 JMP LP2 + LXI RTWP - 317 • .; < »i.' io 2 LIP j SB C \) iv 2 lr'L i.SS 000L2 T h Y dSS i x o TIM . LND DCSP1P VGA > - 318 - I / * IDT : RDTQ * B10 EQU 00010 Bll EQU 00011 * * * TQ : ((ADC READING) X 26)/100 + CAD * SI AT 05450 LwPI WSP LI R12 00096 CLR R4 CLR R3 LP CLR R2 >c * START ADC CONVERSION sk SBZ Bll SB 0 Bll SBZ 311 * WAIT FOR ADC CONVERSION 3K TO BE COMPLETED TB . B10 JEQ $-002 3* * READ ADC VALUES 3k STCR R2 10 A R2 R3 3* 3k TAKE 20 ADC READINGS 3k INC R4 CI R4 00020 JEQ AVR 891 MICRGSEC DELAY CLR R5 INC R5 CI R5 0005TS JNE $-036 Ji\P LP FIND THE AVERAGE I) IV U fir: - 319 • E Y/.tfETR I CAL LCUMJI NO * CI R3 00012 JLT $+004 I NC R2 LI R4 00100 KPY ADC R2 DIV R4 R2 * * SYMMETRICAL ROUNDING * CT R3 00050 JLT $+004 INC R2 A CAD R2 * * RETURN AT R0 OF CALLING PROG * MOV R2 *RI 3 RTWP wSP '3SS 00032 ADC DATA 00002 00026 CAD DATA 00002 00000 .END DOSPIP V6A - 32o - * IDT : DECIMAL STAT 23760 LWPI WSP CLR R11 LI R6 03010 LI Rl 15616 XGP Rl 14 MOV R0 R0 JLT $+306 JEQ $+05 6 JMP $+016 LI Rl 11520 XCP Rl 14 CI R0 32768 JEQ $+050 NEC R0 LI R8 10000 MOV R0 Rl CLR R0 CLR R7 DIV R8 R0 * * CHECKING FOR LEADING ZERO MOV R0 RO JNE $+006 MOV R1 1 Rl 1 JEQ $+012 AI RO 02048 SLA R3 8 XOP R0 12 INC Rl 1 DIV R6 R7 MOV R7 KG JNE $-028 Rl WP LI Rl 12288 XOP Rl 14 RTWP XOP MSW 14 RTWP 13 EC- 00032 USE 00002 .END - 321 - I * IDT ; INTERUPT B01 ECU 00381 B02 ECU 00002 ii03 EQU 00003 204 EG'U 00204 x X X LOWER GOV. CONTROL LEVER INT. x x SET IFL & STP * STAT 02600 LWPI WSP INC IFL LI R12 00032 MOV HLS R3 CLR Rl CLR STP SBZ B01 SBO B01 SBZ B01 INC STP INC Rl C Rl R3 Jct EXT CLR R2 INC R2 CI R2 00600 JNE $-006 JMP $-024 * * UPPER GOV. CONTROL LEVER INT. * SET IFL & STP x LWPI WSP INC IFL LI R12 20032 MOV BUS R3 CLn Rl - 322 - I • i . , : C SIP 1 :.c hi c R1 JCT EXT CLR R2 INC R2 CI R2 JNE $-006 JMP $-024 * LOW OIL PRESSURE INT. * LWPI WSP XOP MSR 14 XOP LCR 14. JMP $+020 if * HIGH OIL TEMPERATURE INT. if LWPI WSP XOP MSS 14 XOP LCR 14 JMP $+010 * * HIGH WATER TEMPERATURE INT. if LWPI WSP XOP MST 14 XOP LCR 14 XOP PiSV 14 XOP LCR 14 * * BRANCH TO SETALARM ROUTINE if BLWP LKP RTWP if * CLEAR INTERRUPT FLAGS if EXT SBZ B03 SBZ B04 SBO B04 SBZ B04 SBO 303 RTWP WSP BSS 00032 I FI- BSS 00002 ST? BSS 00302 HUS BSS 00302 HLS BSS 03002 LCR BSS 00002 MSR BSS 00032 MSS BSS 00002 MST BSS 00002 MSV BSS 00002 LKP BSS 00002 .END DOSPIP V6A > - 324 - I * IDT : CURVFIT STAT O3S00 LWPI w'SP LI R7 00210 LI RE 00100 . LL R9 01000 * * Rli=(Q X A2)/100 MOV R2 R1 MGV A2 R5 CLR R6 MOV R5 R5 J&T S+E06 INC R6 ABS R5 MP Y R5 R1 DIV R3 R1 CI R2 00050 JLT $+004 INC R1 MOV R 6 R6 JEQ $+004 NEC R1 MOV R1 HI 1 * * R10=(Q X Q X A3)/10000 * MOV A3 R5 CLR R6 MOV R5 R5 J6T $+00 6 INC R6 ABS R5 MOV R0 R1 MPY R0 R1 CI R0 00O7 MOV A4 R5 CLR R6 MOV R5 R5 JGT $+026 INC R6 ADS R5 MOV1 R0 Rl v J." V i i R0 R1 CI R0 JC? $+252 DIV R7 Rl CI R2 00005 JLT $+004 INC Rl MP Y R0 Rl j DIV R7 Rl ! CI R2 00005 JLT $+024 INC Rl MPY R5 Rl DIV R8- Rl CI R2 00050 JLT i+024 INC Rl MOV Rl R2 CLR Rl DIV R8 R( CI R2 02050 JLT $+040 INC Rl JMP $+036 DIV R8 Rl CI R2 00052 JLT $+204 INC Rl MPY R2 Rl DIV R8 Rl CI R2 20050 JLT $+224 INC Rl MPY R5 Rl DIV R8 Rl ol.l 1 3 4 j ;.c K1 ,\cv EG R6 JEW S+0 04 NEC Rl A Rl 3 Rl A R1 1 Rl A Al Rl MOV Rl *R13 RTWP WSP ESS 02332 Al BSS 03032 A2 BSS 30002 A 3 BSS 00332 A4 ESS 30022 .END DUSPIP V6A - 327 - I * IDT : RDSPD * SPD = (1502002)/(SPD• BUFF. COUNT) * STAT 03300 LWPI WSP LI R12 00032 * CLR R5 CLR R4 * RD CLR R3 CLR R2 CLR Rl * READ SPEED BUFFER * STCR RT 12 STCR R2 12 i STCR R3 12 j C RJ R2 JEQ $+006 A R3 R4 JMP $+004 A Rl R4 INC R5 C R5 R0 JEQ AVR * * 0.5 SEC DELAY * CLR R6 CHK INC R 6 CI R6 00003 JEQ RD CLR R7 INC R7 CI R7 14423 JNE $-006 JMP CHK * * BET THE AVERAGE OF SPD. BUFF CNT. * AVK CLR R 3 DIV R5 R3 LI R 6 01500 LI R& 01000 : Is ; U V hC ' ii I 3 b.1* P - 328 bis 00 .END DOSPIP VGA > - 329- - * IDT : DECBIN * ~-~~~---~-~- ,: ~. 1 A T ~j 3 6 5 0 LWPI WSP LI F\8 k10210 ST CLR f\7 CLR R5 CLR F\10 XCJP fi.~~ 11 I:~ C i\ l ~ CI R4 11520 J:~E CHK Ri.J X GP RlJ 11 I~C f\10 CI fi4 32512 JNE CHK CI R 10 003i:J2 Ji-1 E. $+0 3 6 iYiOV R7 R7 J:~ t. ST CLR R4 DIV RB R4 ~lOV R4 R5 itD CHK CI R4 12288 JL EXT (;J R4 14592 JH EXT SLA R4 4 ShL R4 12 r•:PY h8 R' MDV R6 R5 A R4 R5 J~·~p RD l:.XT l"i ()\I R7 R7 JEQ ~+k:'J('J4 f~1 EG R5 MOV R5 :,:f\13 ~ T11JP uss • f·. tJ D uG~:P I P V6A - 330 - I ill PALS I LUC P A £ £ 1 13 OCT 197 7 TMS9 900 ASSEMBLER VERSION 2.0 LINE ADHESS OBJECT CODE SOURCE STATEMENT I 2 * IDT : S-Y-S-M-A-P-I 3 * 4 * 5 * 6 * 7 * SYSTEM VARIABLES 6 * 9 * 10 * 11 STAT 07658 12 * 13 * AST,SAD & RAD USED BY TRANS 14 * 15 IDEA 1 7B0 AST DATA 00002 06064 16 1 DE C 1 620 SAD DATA 00002 05664 17 IDEE 1490 RAD DATA 00002 05264 18 * 19 * . CK,CK1,CK2 &CK3 USED BY PID 20 * 21 1DF0 0000 CK BSS 00002 22 1DF2 0000 CK 1 BSS 00002 23 1DF4 0000 CK2 BSS 00002 24 1DF6 0000 CK3 BSS 00002 25 * 26 * M1,C1,M2 & C2 USED BY CUTOFFPT 27 * 28 1DF8 000 A Ml DATA 00002 00010 29 1DFA 0023 Cl DATA 00002 00035 30 1DFC 000 A M2 DATA 00002 00010 31 1DFE 00 f 0 C2 DATA 00002 00014 32 * 33 * DTQ - INIT DELAY BEFORE TCCGNTRL 34 * ACTIVATED 35 * 36 1E00 0000 DTQ BSS 00002 37 * 38 * CB - CONTROL BAND FOR PID 39 * 40 1E02 0005 CB DATA 00002 00005 41 * 42 * PID - PID FLAG 43 * 44 1E04 0000 PID BSS 00002 45 * 46 * ST - USED BY TQCONTRL 47 * 48 1E06 0000 ST BSS 00002 49 * 50 * SPI - MEASURED ENGINE SPD 51 * 52 1E08 0000 SPI BSS 00002 53 * 54 * TQI - MEASURED TORQUE 55 * 54 ib on 0000 tqi BSS cb0(t>0Z - 331 - 1 ; '2 - r.r M-1 r i . ; . 'J Oi 1 E0C 0000 SP2 BIS 3 61 * 62 X TQ2 - REQUIRED 1 CPOL'F. 63 x 64 1E0E 0000 TQ2 L»SS 00002 65 * 66 * MAC - MAX. ACC OR DEC OF ENGINE 67 * 68 1 E13 03 E 8 MAC DATA 00002 01000 69 * 70 * TIM - TIME COUNTER 71 * 72 1E12 0000 • TIM BSS 00002 73 * 74 * IFL - GOV. CONTR LEVER INT. FLL 75 * 76 1 E1 4 0000 IFL BSS 00002 77 * 78 X LSP - IDLE SPEED OF ENGINE. 79 X 80 1 El 6 0000 LSP BSS 00002 81 * 82 * MSP - MAX. SPEED OF ENGINE 83 * 64 i EI 8 0000 MSP BSS 00002 85 * 86 * SKP - SKIP FLAG FOR MAXBRAK 87 * 88 I Ei A 0000 SKP BSS 00002 89 * 90 X INT - CONTAINS VP $ PC OF INTERB 91 X SERVICE ROUTINES. 92 * 93 1E1C 0 ACA INT DATA 00024 02762 94 1 El E 0AC8 02696 95 1E20 0AC A 02762 96 1E22 0A96 02710 97 1E24 0 ACA 02762 9b 1E26 0AA4 02724 99 * 1E28 0 ACA 02762 100 1E2A 0A2S 02 6C0 101 1E2C 0 ACA 02 762 102 1E2E 0A5 A 02650 103 1E30 0 63C 01596 104 1E32 04B6 01206 105 * 106 * MOD - TYPE OF TEST 107 * . 108 1E34 0000 MOD BSS 00002 109 * 110 * NSP - NEW SET SPD FLAG 111 * 112 1E3 6 0000 NSP BSS 00002 113 * 114 X NTQ - NEW SET TQ FLAG 115 X 116 1E38 0000 NTQ BSS 00002 117 * 118 * ESP - ERROR COUNTER FOR SPEED 119 * 120 1E3A 0000 ESP BSS 00002 121 * ' ' »V /tit ;.. ' * 124 1 L.3C - 332 - ETC DfS 12 ^ * 126 * DF.L - DLL AY CGUNTFE FOR RITFT 12 7 * 12b 1E3E 0000 DEL BSS 00002 12 9 + 130 * TRF - FIRST SET PT FLAG FOR TRS 13 1 * 132 1F.40 0000 TRF BSS 00002 133 - * 134 * STP - GOV. LEVER POSN. 135 * 136 1E42 0000 STP BSS 00002 • 13 7 138 * UK - COMPUTED SET PT BY PID 139 * 140 1E44 0000 UK BSS 00002 141 * • 142 * UFL - UNLOAD FLAG 143 * 14 4 1E46 0000 UFL BSS 00002 145 * 146 * CPT - CUTOFF BAND 14 7 * 14b 1E4S 0000 CPT BSS 00002 14S * 150 * CUT - CUTOFF POINT FOR TGCCNTRL 151 * 152 1E4A 0000 CUT BSS 00002 153 * 154 * OTQ & OSP USED BY TRANS 155 * 156 1E4C 00DC OTQ DATA 00002 00220 157 1E4E 36A4 OSP DATA 00002 01702 158 ^ 159 * TRS - TRANSIENT SCHEDULING 160 * TIME (NOT USED) 1 61 * 162 1E50 0000 TRS BSS 00002 1 63 * 164 * ADC I CAD CALIBRATION CONSTS FOE 1 65 * 166 1E52 001A ADC DATA 00002 00026 167 1E54 0000 CAD DATA 00202 00000 J 6b * 169 * DAC - DAC CALIBRATION 170 * 171 1E56 03FF DAC DATA 00002 01023 172 * 173 * CM 1, CC 1 £ KST USED BY COM STEP 174 * 175 1E5b 0072 CM1 DATA 00002 00114 176 1E5A 025 D CC1 DATA 00002 00093 177 1E5C 091D KST DATA 00C02 02333 17b * 179 .END NO ERRORS SIZE =0072 - 333 - I END PAL L1 LND R AL COu 13 OCT 1977 TMS9900 ASSEMBLER VERSION 2.2 NE a ADRESS OBJECT CODE SOURCE STATEMENT 1 2 * IDT : S-Y-S-M-A-P- 2 3 * 4 * 5 - - - - - 6 7 * SYSTEM VARIABLES 8 * 9 * 12 * 1 1 STAT 07774 J 2 * 13 • TQ & SPD FOR DACSET ROUTINE 14 * 15 1E5E 2202 TQ BSS 02222 16 1 E62 2222 SPD BSS 20022 17 * 18 PT - PT OF INFLEXION FOR EXC CL'F. 19 * 22 1E62 2296 PT DATA 20222 02152 21 * 22 * ISP - LOWEST SPD FOR EXC CURVE 23 * 24 1E64 21F4 ISP DATA 20202 00500 25 * 26 * TSP - UPPER SPD FOR EXC CURVE 27 * 28 1E66 0FA0 TSP DATA 00202 04000 29 * . 32 * BTM - MAX. BRAKE TG 31 * 32 IE 68 019F BTM DATA 02002 22415 33 . * 34 * BSP - SPD AT WHICH MAX BRAKE TG 35 * 36 1 EGA 08FC BSP DATA 02202 02303 37 * 38 * DM1 & DCl - FOR 520 RPM LINEARE 39 * 42 1E6C 2 1 E 9 DM1 DATA 20302 20489 41 1E6E 206E DCl DATA 00022 00110 42 * 43 * DM2 & DC2 - FOR 4030 RPM LINEARE 44 * 45 1 E7u 21 16 DM2 DATA 32002 02278 46 1E72 204b DC2 DATA 00002 00075 4 7 * 48 * E01 - CGNSTS FOR 530 RPM NON-LIE 49 * 52 1E74 222 6 E21 DATA 00008 00006 51 1E76 21 63 203 63 52 1E78 FE3E 6521 4 53 1E7A 2 2 63 02107 54 * 55 * EH - CONSTS FOR 4022 RPM NON-LE 56 * . . t 00 A 7 334 - + t 1 + i 5 3 H. + .: El- 54 CjA: : CO IF. 82 00 23 02 CI * G2 * Al , A2, A3 b AA FOR CURVF]1 C3 * OA 1 E84 0 0 0 0 Al BSS 00002 65 1E86 0000 A2 BSS 00002 66 IE 88 0000 A3 •BSS • 00002 67 1 E8A 0000 A 4 BSS 00002 68 * 69 * BRl - FIRS T PART OF BRAKE 70 * 71 1E8C 0001 BRl DATA 00008 ' 00001 72 IEEE 00 Eb 00235 73 1E90 FF2D 65323 7 a 1E92 004D 00077 75 * 76 * BR2 - SECOND PART OF BRAKE 77 * 78 1E94 0121 BR2 DATA 00008 00289 79 1E96 FED4 65236 80 1E98 0082 00130 81 1E9A FFEC 65 5 1 6 82 * 83 * ENG - FOR ENGINE MAX. TC CURVE 84 * 85 1E9C 0078 ENG DATA 00008 00120 86 1E9E 0090 00144 87 1EA0 FFD2 65490 £8 1EA2 0000 00000 89 * 90 * KP - PROPORTIONAL GAIN CONST 91 * 92 1EA4 01F4 KP DATA 00002 00500 S3 * 94 * KD - DERIVATIVE GAIN CONST. 95 * 96 1EA6 0032 KD DATA 00002 00050 97 * 98 * KI - INTEGRAL GAIN CONST. 99 * 130 1EAE 0190 KI DATA 00002 00400 101 * 102 * HLS - HYST OF LOWER GOV. SWITCH 103 * 104 1EAA 0006 HLS DATA 00002 00006 105 * 106 * HUS - HYST OF UPPER GOV. SWITCH 107 * 108 1EAC 0006 HUS DATA 00002 00006 109 * 110 .END NO ERRORS SIZE = 004E - 335 - I r..» j fa: -El t r PA OCT 1977 TMS9922 ASSEMBLER VERSION 2.0 13 LINE /< ADRESS OBJECT CODE SOURCE STATEMENT 1 2 * IDT : S-Y-S-M-A-P-3 3 * a * 5 * 6 * 7 f* LINKERS FOR SUBROUTINES 8 9 * 10 * STAT 07854 11 * 12 13 * LKA - DECBIN 14 * 15 1EAE 0E9A LKA DATA 00004 03738 1 6 1EB8 0E42 03650 17 * 18 * LKB - CONTROL 19 * 20 1EB2 044E LKB DATA 00004 01102 21 1EB4 0320 00800 22 * 23 * LKC - DACSET 24 * 25 1EB6 08A4 LKC DATA 00004 02212 26 1 EBB 07D0 02000 27 * 28 * LKD - CGMSTEP 29 * 30 1EBA 0BF2 LKD DATA 00084 03258 31 1EBC 0B54 02900 32 * 33 * LKE - SETGOV 34 * 35 *1EBE 0C74 LKE DATA 00004 03188 36 1EC0 0C1C 03108 37 * 38 * LKF - RDSPD 39 * 43 1EC2 0D3 6 LKF DATA 80004 03382 41 IEC4 0CE4 03382 42 * 43 * LKG - MAX3RAK 44 * 45 1EC6 12BA' LKG DATA 0O004 04282 46 1EC8 1268 04222 4 7 * 48 * LKH - MAXENG 4S * 50 1ECA 1132 LKH DATA 88024 04402 51 1ECC 10FE 04350 52 * 53 * LKI - SPCONTRL 54 * 55 1ECE 0774 LKI DATA 00004 21908 56 1 EDO 86A4 01 720 57 * 58 * LKJ - PRINT r ( . i. it I. I. it 4 111*1 • *. i u 1 LI» 4 1 1 r r - 336 - 0/. t-c: dy. 4 63 LKK - EETBEC 64 4 6:> 1 EDO 0L2U LKK DAI A '00004 00 61 6 66 1ED8 0DFC 035 80 67 * 68 LKL - RDTQ 69 70 1 EDA 0DD0 LKL DATA 00004 03536 71 1EDC 0D7 A 03450 72 3k 73 3k LKM - PID - 74 3k 75 1EDE 09FA LKM DATA 00004 02554 76 1EE0 08F0 02288 77 3k 78 3k LKN - CURVFIT 79 3k 80 1EE2 1 03 C LKN DATA 00004 04156 81 1EE4 0F3C * 03900 82 83 3k LKG - DECIMAL 84 3k 85 1EE6 0F1 A LKO DATA 00004 03866 86 I EES 3EC0 03776 87 3k 88 3k LKP - SFTALARM 89 3k 90 1EEA 1 1C2 LKP DATA 00004 04546 91 1 EEC 1 1 62 * 04450 92 * 93 3k LKQ - TRANS 94 95 IEEE 1452 LKQ DATA 00004 05202 96 1EF0 13C4 05060 97 Jk 98 sk 99 3k 100 3k SYSTEM MESSAGES 101 3k 102 3k 103 3k. 104 3k 105 1EF2 0000 MSA BSS 0005 6 106 3k 107 1F2A 0000 MSB BSS 0002 6 108 3k 109 1F44 0000 MSC BSS 00020 110 3k 1 1 1 1F58 0000 MSD BSS 00020 112 3k 113 1F6C 0000 MSE BSS 00020 114 3k 115 1FS0 0000 MSF BSS 00048 11 6 3k 0000 MSG BSS 00040 117 1FBG * - 118 1FD8 0000 MSH BSS 119 * 00026 * 120 121 1FF2 0000 MSI BSS 0001 6 122 3k 12 '3 20S2 0 0 0 C MS J BSS 0004 6 * -124 3k • t. \J A ~ 337 - '27 23 44 03 23 MS L DfS 2 0 22 6 .22 x i 29 2 0 5 E 0000 MSM BSS 0 0- 03 £ I 7 • J U X i 3 1 20 64 0000 MS N BSS 0003 8 i 32 * 153 20AA 0000 MS 0 BSS 00012 134 X 135 20B6 3000 MPP BSS 00014 136 X 137 20C4 0000 MSQ BSS 00006 138 * 139 20CA 0000 MSR BSS 0002 6 ' 140 X 141 20E4 000 0 MSS BSS 00026 142 * 143 20FE 0000 MST BSS 00026 144 * 145 2118 0000 MSU BSS 00028 146 * . 147 2134 0000 MSV BSS 0001 8 148 * 149 2146 0000 MSW BSS 00008 150 * 151 214E 0000 MSX BSS 00034 152 * 153 2170 0000 MSY BSS 00030 154 * 155 21 8E 0003 MSZ BSS 00024 156 X 157 21 A6 0000 LCR BSS 00010 158 * 159 X LKR - CUTGFFPT . 1 60 X 1 61 21B0 1382 LKR DATA 00004 04994 1 62 21B2 12C0 04800 1 63 * 0000 MGG 1 64 21B4 * BSS 00028 165 1 66 IDE 0000 SPC BSS 00004 167 1 68 .END NO ERRORS SIZE -0324 - 338 - fv:u • Mlf'HlLf ^ x • Jt «• t « r- t '' * -t- -e- .y >f, y y ... .. ^ .« Y -t " * ^ -r * 1 •* •* * "» * * * •* * * • »»••. • f « « • • j. a * x. f -f- * ML A **+ ENGINE CONTROL SYSTEM VERS J ON ? . N 01 JAN 12 >- * * MSB DATE V (MM/DD/YY) * MSG ENGINE ID 7 : * MSD IDLE SPEED ? - * * MSE MAX. SPEED ? - * * MSF DOES BRAKE TQ MAP ENVELOPES ENGINE ? (Y/N) * MSG 1. CHECK GOV. CONTROL LEVER PCSN.. * MSll 2. START THE ENGINE. * * MSI 3. WARM UP. * * MSJ TYPE OF TEST ? (DEFAULT «-£TDY C'R T - TRANS) * * MSK SPEED ? (RPM) * MSL 1 ORQUE ? (10 X MKP) Jfc * MSM UNACCEPTABLE SPEED. TRY AGAIN ! * * MSN UNACCEPTABLE TORQUE. TRY AGAIN ! * * MSG SPEED * * MSP 1GROUL * * . MSG *** * MSR LOW OIL PRESS. INT. * MSS HIGH OIL TEMP. INT. * * MST HIGH WATER TEMP. INT. * * MSU PRESS A KEY WHEN READY. * MSV SHUT DOWN !!! MSW 327 68 * * MSX *** STEADY STATE TEST *** * MSY *** TRANSIENT TEST *** MSZ GOV. LEVER POSITION LCR BA0D MGG /.SPEED NTORGUL SPC - 339 • APPENDIX 5 Specification of Control and Data-logging System CONTENTS' Page A.5.1 Engine 340 A.5.2 Eddy-Current Dynamometer 340 A.5.3 Brake Excitation Unit 340 A.5.4 Stepping Motor 341 A.5.5 Optimal Incremental Shaft Encoder 343 A.5.6 Control System 343 A.5.7 Data-logging System 343 A.5.8 On-line Data Acquisition Unit 344 (32 Channels) A.5.9 Off-line Data Acquisition Unit 344 (8 Channels) - 340 - APPENDIX 5 §.Eecification of Control and Data Log~ System A.S.l Engine Perkins 4.236 bore 3.875 IN (98. 43 rom) stroke 5. 0 IN (127.0 rom) Cubic Capacity :236 IN3 (3.86 litres) Compression ratio : 16.1 Firing order : 1, 3, 4, 2 power rating 80 bhp at 2800 rpm maximum torque .193 lb. ft (26.68 mKp) at 1400 rpm Fuel pump C.A.V distributor type with hydraulic governor A.5.2 Eddy-Current Dynamometer VIBRO-METER : 3WB 15 Nominal torque 41.5 mKp at 2300 rpm 2 Rotor inertia 0. 54 Kpm A.5.3 Brake Excitation Unit VIBRO-METER : BEC 45/12 SPEZ Output voltage 0 - 45 V Output current 0 - 12 A t. . ..• . . ·i - 341 - I Time constant for load variations : 1.2 - 12 A 100 ms or 12 - 6 A 0 - 12 A 500 ms or 12 -1.2 A . Stability for : (1) Line voltage : 0.2%or50mV approx. 100 mA. variations of + 10% (2) Load variations: 0.2% or 50 mV 100 mA at 45V. between 1.2 - 12A . Ripple max. 100 mV eff. max. 250 mA eff, A.5.4 Stepping Motor SIGMA : 20 - 2235D200 - E 3.7B ,V o Step angle : 1.8 3% ± Step error Max. : Steps per revolution 200 Uni-polar Max. steps per sec 600 Rotor inertia : 2 2 1.3 OZ-IN (0.24 Kg-Cm ) Holding torque 100 OZ-IN (7.2 Kg-Cm) (energised) - 342 - Mass storage ; (1) Dual Hard Disk : RK 05 Fixed disk : 2.5 Mbytes Removable disk : 2.5 Mbytes Transfer rate 60 Kwords/sec max. (2) Magnetic Tape : RACAL T7000 Packing density:556 charc/inch . Speed : 37.5 inch/sec No of Tracks : 7 Parity : even Peripherals : (1) Printer digital decwriter 11' LA36 300 bits per sec. max. (serial) (2) VDU Data media 7 AKA 3XXXX 9600 bits per sec (serial) Real Time Clock DT 2769 Modes of operation (a) Single Interval (b) Repeated Interval (c) External Event Timing (d) External Event Timing from zero base DMAC memory to memory 220 K words/sec - 343 - I A.5.5 Optical Incremental Shaft Encoder FERRANTI 28 H No. of tracks 3 Track 1 1 pulse per revolution Track 2 and 3 : 720 pulses/rev. per track at 90° to each., other A.5.6 Control System Processor : TMS 9900 (16 bit) Memory : 8 Kbytes static RAM Mass Storage : ITT Studio Recorder 65 (Domestic type cassette player) Peripheral : Teletype Software Support : (1) TIBUG (2) Line-by-Line Assembler (3) Cross-Compiler for Assembly Language . ADC : ANALOG DEVICES AD571 (10 bit) Successive Approximation Conversion time 25 us Accuracy + 1 LSB DAC ANALOG DEVICES DAC10H (10 bit) Settling time 25 us to h LSB A.5.7 Data-logging System Processor DEC LSI - 11/2 (16 bit) Memory 65 Kbytes dynamic RAM - 344 - . Software Support (1) Operating system RT 11 V03B (2) Fortran V.2.1 (3) Extended Arithmetic Element (4) Floating Point Arithmetic A.5.8 On-Line Data Acquisition Unit (32 Channels) Multiplexer : 4 X ANALOG DEVICES MOSES - 8 Switching time : 100 ns Resistance closed:500 ohms Resistance open : 100 Mohms Sample-and-Hold ANALOG DEVICES SHA-2A Settling time 0.5 us to 0.01% accuracy * aperature delay 10 ns droop rate 100 uV/uS max ADC ANALOG DEVICES ADC-10QU (10 bit) conversion time 8 us accuracy + h LSB A.5.9 Off-Line Data Acquisition Unit (8 Channels) . Multiplexer : ANALOG DEVICES MPX - 8A Settling time to 0.01% accuracy : 1 us max On Resistance : 1000 ohms Off Resistance : 1000 M.ohms . Sample-and-Hold : ANALOG DEVICES SHA - 2A Settling time : 0.5*us to 0.01% accuracy - 345 - Aperature delay 10 ns droop rate 100 uV/us max + . ADC ANALOG DEVICES ADC 1103-002 (10 bit) Conversion time 1.2 us max accuracy + h LSB The time elapsing between the command to hold and the actual opening of the hold switch. When making repetitive conversions, a small time interval must be allowed between the completion of one conversion and the beginning of the next. This results in a maximum through- put rate of 667 kHz. ERRATA Page Paragraph Line Original Correction 25 2 5 Miltiplexing Multiplexing 38 2 1 Nees Need 54 2 4 (PRSI) (PRST) 98 4 3 od of 142 1 1 help help to FIGURE C 0 RRECTION In Fig.5.9 (page 167), the speed 4000 rpm should be taken as 500 rpm and 500 rpm as 4000 rpm respectively. ADDENDUM 1. Page 102, Eq. (4.1) It should be noted that in Eq. (4.1); T = f(DL) d for eddy-current dynamometer at a constant excitation voltage. 2. Page 117, Paragraph 1, Line 14 The main disadvantage of Velocity Algorithm lies in the need to use an integrating type actuator in the control system, which in some cases leads to instability. PAGINATION ERROR Page 234 should be taken as page 233 and 234.