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VT8602 Data Sheet

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VT8602 Data Sheet Apollo PLE133T Chipset VT8601T Single-Chip PCI North Bridge with 133 / 100 / 66 MHz Front Side Bus for VIA C3 and Intel Celeron, Pentium III, and Pentium III-M (Tualatin) CPUs, Integrated AGP 2D / 3D Graphics Accelerator and Advanced Memory Controller supporting PC133 / PC100 SDRAM for Desktop PC Systems Revision 1.04 August 26, 2002 VIA TECHNOLOGIES, INC. Copyright Notice: Copyright © 2001, 2002 VIA Technologies Incorporated. Printed in the United States. ALL RIGHTS RESERVED. No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual or otherwise without the prior written permission of VIA Technologies Incorporated. VT82C586B, VT82C596B, VT82C686A, VT82C686B, VT82C598, VT82C598MVP, VT8501, VT82C691, VT82C692, VT82C693, VT82C693A, VT82C694, VT82C694A, VT82C694X, VT8601, VT8601A, VT8601T, Mobile South, Super South, Apollo MVP3, Apollo MVP4, Apollo Pro, Apollo ProPlus, Apollo Pro133, Apollo Pro133A, Apollo PM601, and Apollo PLE133T may only be used to identify products of VIA Technologies. VIA C3TM is a registered trademark of VIA Technologies, Inc. PS/2TM is a registered trademark of International Business Machines Corp. Celeron, PentiumTM , Pentium-IITM, Pentium-IIITM, MMXTM, and Intel are registered trademarks of Intel Corp. TM TM TM AMD6K86 , AMD-K6 , and AMD-K6-2 are registered trademarks of Advanced Micro Devices Corp. Windows 95TM, Windows 98TM, and Plug and PlayTM are registered trademarks of Microsoft Corp. PCITM is a registered trademark of the PCI Special Interest Group. All trademarks are the properties of their respective owners. Disclaimer Notice: No license is granted, implied or otherwise, under any patent or patent rights of VIA Technologies. VIA Technologies makes no warranties, implied or otherwise, in regard to this document and to the products described in this document. The information provided by this document is believed to be accurate and reliable to the publication date of this document. However, VIA Technologies assumes no responsibility for any errors in this document. Furthermore, VIA Technologies assumes no responsibility for the use or misuse of the information in this document and for any patent infringements that may arise from the use of this document. The information and product specifications within this document are subject to change at any time, without notice and without obligation to notify any person of such change. Offices: USA Office: Taipei Office: 940 Mission Court 8th Floor, No. 533 Fremont, CA 94539 Chung-Cheng Road, Hsin-Tien USA Taipei, Taiwan ROC Tel: (510) 683-3300 Tel: (886-2) 2218-5452 Fax: (510) 683-3301 or 687-4654 Fax: (886-2) 2218-5453 Web: http://www.viatech.com Web: http://www.via.com.tw Technologies, Inc. We Connect Apollo PLE133T Chipset – VT8601T North Bridge REVISION HISTORY Document Release Date Revision Initials 1.0 1/7/02 Initial external release (same as release 0.5 with confidential watermark removed) DH 1.01 4/22/02 Updated VIA USA street address & corrected VIA TW phone numbers on legal page DH Updated legal page formatting and removed obsolete FTP server address & BBS # Added missing pin F20 (VTT) in alphabetical pin list Corrected document formatting to change pin lists from figures to tables. Fixed minor document formatting errors & inconsistencies in pin description tables Changed page header logo to “VIA We Connect” for consistency with other products 1.02 7/22/02 Fixed Device 0 Rx50[7] DH 1.03 8/23/02 Changed part number to VT8601T AT Corrected Device 1 Bus 0 Registers Offset 3-2 Device ID to 8601 Added power consumption tables to the Electrical Specification Updated the Mechanical Specification 1.04 8/26/02 Fixed high level system diagram AT Revision 1.04 August 26, 2002 -i- Revision History Technologies, Inc. We Connect Apollo PLE133T Chipset – VT8601T North Bridge TABLE OF CONTENTS REVISION HISTORY....................................................................................................................................................................... I TABLE OF CONTENTS..................................................................................................................................................................II LIST OF FIGURES......................................................................................................................................................................... IV LIST OF TABLES........................................................................................................................................................................... IV PRODUCT FEATURES....................................................................................................................................................................1 SYSTEM OVERVIEW......................................................................................................................................................................6 APOLLO PLE133T CHIPSET OVERVIEW ......................................................................................................................................7 APOLLO PLE133T GRAPHICS CONTROLLER OVERVIEW ...........................................................................................................8 Capability Overview ...............................................................................................................................................................8 System Capabilities.................................................................................................................................................................9 High Performance 64-bit 2D GUI..........................................................................................................................................9 TM Highly Integrated RAMDAC & Clock Synthesizer.........................................................................................................9 Full Feature High Performance 3D Engine ..........................................................................................................................9 Video Processor.....................................................................................................................................................................10 Video Capture and DVD ......................................................................................................................................................10 Versatile Frame Buffer Interface ........................................................................................................................................10 Hi-Res and Hi-Ref Display Support ....................................................................................................................................10 CRT Power Management (VESA DPMS) ..........................................................................................................................11 Digital Flat Panel Monitor Interface ...................................................................................................................................11 Video Capture Interface.......................................................................................................................................................11 Complete Hardware Compatibility .....................................................................................................................................11 PINOUTS ..........................................................................................................................................................................................12 PIN LISTS....................................................................................................................................................................................13 PIN DESCRIPTIONS.......................................................................................................................................................................15 REGISTERS .....................................................................................................................................................................................23 REGISTER OVERVIEW..................................................................................................................................................................23 REGISTER SUMMARY TABLES .....................................................................................................................................................23 MISCELLANEOUS I/O...................................................................................................................................................................33 CONFIGURATION SPACE I/O........................................................................................................................................................33 REGISTER DESCRIPTIONS............................................................................................................................................................34 Device 0 Bus 0 Header Registers - Host Bridge..................................................................................................................34 Device 0 Bus 0 Host Bridge Registers..................................................................................................................................36
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