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General Disclaimer One Or More of the Following Statements May Affect General Disclaimer One or more of the Following Statements may affect this Document This document has been reproduced from the best copy furnished by the organizational source. It is being released in the interest of making available as much information as possible. This document may contain data, which exceeds the sheet parameters. It was furnished in this condition by the organizational source and is the best copy available. This document may contain tone-on-tone or color graphs, charts and/or pictures, which have been reproduced in black and white. This document is paginated as submitted by the original source. Portions of this document are not fully legible due to the historical nature of some of the material. However, it is the best reproduction available from the original submission. Produced by the NASA Center for Aerospace Information (CASI) CAsZ:^^LE o (ACCESSION NUMBER) (THRU)) f W (PAGES) (C- DF, a (NASA CR OR TMX OR AD NUMBER) (CATEGORY) IIITERMETRIC:S Final Report Engineering Study for A Mass Memory System For Advanced Spacecrafts By: Alex L. Kosmala, John P. Green, and Fred H. Martin August 1970 Prepared under Addition $1 to Contract NAS 9-9763 by INTERMETRICS, INC. 380 Green Street Cambridge, Massachusetts 02139 spin Foreword This document is the final report of an engineering study of mass memory systems for advanced manned spacecrafts. The work was performed as an extension of a Multiprocessor Computer Systems study, which was previously reported. This effort was sponsored by the National Aeronautics and Space Administration's Manned Spacecraft Center, Houston, Texas under contract NAS 9-9763. It was performed by Intermetrics, Inc., Cambridge, Massachusetts under the technical direction of Alex L. Kosmala. The study program covered the period from December 1, 1969 through July 1, 1970. The Technical Monitor for the Manned Spacecraft Center was Mr. James P. Ledet. The publication of this report does not constitute approval by the NASA of the findings or the conclusions contained therein. It is published for the exchange and stimulation of ideas. i Table of Contents Page Chapter 1. Objective and Summary of Study 1 1.1 Introduction 1 1.2 Technology Review 2 1.3 Memory Requirements 4 1.4 Recommendations 5 1.5 Final Word 5 Chapter 2. Review of Memory Technologies 7 2.1 Introduction 7 2.2 Ferrite Cores 9 2.3 Planar Films 28 2.4 Plated Wire 44 2.5 Block Oriented Magnetic Memory Techniques 61 2.6 Semiconductor Techniques 76 } 2.7 Beam Accessed Memory Technologies 115 2.8 Cryogenic Memory Technology 143 Chapter 3. Mass Memory Requirements 148 3.1 Multiprocessor Design Introduction 148 3.2 Memory Performance Requirements 154 3.3 Memory Physical Requirements 160 3.4 Environmental and Operational Requirements 166 Chapter 4. Evaluation and Recommendations 179 4.1 General Evaluation Criteria 179 4.2 Evaluation Strategy 182 4.3 Comparison of Memory Technologies 183 4.4 Comparison of Technologies for M1 183 4.5 Comparison of Technologies for M2 188 4.6 Comparison of Technologies for M3 193 4.7 Summary of Recommendations 200 ii List of Figures Figure Page Chapter 2. 2.2.1 Ferrite Hysteresis Loop 10 2.2.2 Ferrite Core Array 10 2.2.3 Checkerboard Wiring Pattern 12 2.2.4 3-D Ferrite Core Memory Organization 14 2.2.5 2-D Ferrite Core Memory Organization 16 2.2.6 Transition from 2-D to 2k-D Organization 18 2.2.7 2^-D Ferrite Core Memory Organization 19 2.3.1 Thin Film Hysteresis Loop 29 2.3.2 Thin Film Switching Astroid 29 2.3.3 Effect of Creep and Skew 32 2.3.4 Split Film Memory Element 37 2.3.5 Mated Film Memory Element 38 2.3.6 Coupled Film Memory Element 39 2.3.7 Post and Film Technique 41 2.4.1 Plated Wire Memory Element 45 2.4.2 Write, Read Pulse Sequence 47 2.4.3 Plated Wire Manufacturing Process 51 2.4.4 Plated Wire Tunnel Structure 54 2.4.5 Plated Wire Woven Array 55 2.5.1 Propagation of Domain in Magnetic Wire 63 2.5.2 Construction of Dynabit Element 64 2.5.3 Propagation of Magnetic "Bubble" Domain 67 2.5.4 Sonically Scanned Film Memory Schematic 71 2.5.5 Hysteresis Loop Behavior under Strain 72 2.5.6 Rotation of Easy Axis Under Strain 73 iii Fiaure Page 2.6.1 Basic Construction of MOS Transistor 80 2.6.2 Source-to-drain Conductance Characteristics for P-Channel MOS Transistor 81 2.6.3 Sequence of Processina Steps for CMOS 85 Integrated Circuit 2.6.4 Principle of Charge-Coupled Devi::e 87 2.6.5 Construction of P-Channel MHOS Transistor 89 2.6.6 Conductivity of Silicon Oxide and Nitride 91 as a Function of Electric Field 2.6.7 MNOS Threshold Voltaqe Characteristic 95 2.6.8 Bipolar Memory Cell 95 2.6.9 MOS Inverter Circuit 97 2.6.10 Static MOS Memory Cell 98 2.6.11 Dynamic MOS Memory Cell 100 2.6.12 CMOS Inverter and Transmission Gate 100 2.6.13 CMOS Memory Cell 101 2.6.14 Connections to 1,024 Bit Array 104 2.6.15 Memory Cost Versus Chip Complexity 106 2.6.16 Cost Prediction for Semiconductor Memories 112 2.7.1 Elements of an Optical Memory System 117 2.7.2 Read-Only Holographic Memory System 118 g 2.7.3 Mechanical Beam Deflection System 130 2.7.4 Acoustooptic Deflection System 131 2.8.1 Superconducting Memory Element 144 2.8.2 Writing a '1 ' into Superconducting Loop 145 Chapter 3. 3.1 Intermetrics Multiprocessor Series 149 3.2 Normalized Word Rate (W) vs M21M1 Access 155 Time Ratio (R) iv List of Tables Table Page Chapter 2. =i 2.2.1 Core Memory Electronics Requirements 20 2.3.1 Characteristics of Some Thin Film Memories 42 2.4.1 Characteristics of Some Plated Wire 59 Memory Systems 2.6.1 Current IC Performance Characteristics 102 - 2.7.1 Characteristics of Recording Media 127 Chapter 3. 3.1 M2 Access Time (t2 ) as Function of M1 Access Time ( t1 ) for 1 MIPS 156 3.2 t2 as a Function of t1 for 10 MIPS 159 3.3 1975 Memory Requirements 164 3.4 1980 Memory Requirements 165 3.5 Inner Zone Charged Particle Distributions 168 3.6 Outer Zone Charged Particle Distributions 169 3.7 Effect of Shielding in Synchronous Orbit 170 = 3.8 Absorbed Radiation from Inner Zone Particles 172 3.9 Absorbed Radiation from Outer Zone Particles 172 "E v Chapter 1 Objective and Summary of Study 1.1 Introduction Designs for the next generation of manned space vehicles are currently being formulated. They involve advanced computer systems performing comprehensive tasks of guidance, control, navigation, monitoring, data reduction, and communication. The typical aerospace computer that was employed for each of these roles in the past was of modest performance capability and possessed a limited storage facility which was considered to be just sufficient for each function. However, it is expected that the new generation of on-board computing systems will demand the on-line availability of vastly increased storage resources. The chief characteristics of future spar."e missions that will contribute to the need for massive on-hoard storage facilities are: a) The variety and complexity of the systems and the activities which the computing system is expected to ser ,.-ice. Examples of these are vehicle control, life support, inventory management, scientific experiments, communications with the crew, with other spacecraft and the 4round, etc. b) The vast amounts of data that are ex;ected to be generated on-board must be reduced and store?. Estimates of the bulk of data generated by the systems aboard an orbiting space base have been as high as 10 11 bits per day [1], c) The long duration of the planned missions of the future will require the computing system to be capable of performing leading roles in a large variety of missions, and of providing sri^port to numerous and varied programs of scientific exr1oration. These tasks will involve a vast amount o f supporting software which must be available on-board. These aspects have been discussed in the Final Report to the first part of this contract. A computer system was proposed to enable these tasks to be accomp lished. A feature of the design was its ability to be gradually improved and enlarged in an orderly fashion to satisfy the increasing computational demands of a developing space program. The 1 ' f design,iefined the necessity for a hierarchy of memory systems to sp°:n the conflicting requirements of nanosecond access times and billion bit capacities; it did not Seem very likely tr.at these requirements could be met by one memory system based in a single technology, at least in the foreseeable future. It was the purpose of the study summarized by this report to: a) determine the characteristics required of each category of memory in the necessary hierarchy to enable it to be implemented by specific technologies; b) determine from a detailed search and review which of the existing, or , proposed, memory technologies would be the most suitable for implementation of each category; c) perform these tasks in order to determine the feasibility of operational memory systems for advanced manned space vehicles for two distinct and separately considered time periods, namely 1975 and 1980. This report is presented basically in three parts: a) the review of memory technologies; b) the derivation of requirements for the various categories of memory; c) a comparison of technologies for each category, resulting in recommendations for 1975 and 1980.
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