The Space Congress® Proceedings 1973 (10th) Technology Today and Tomorrow

Apr 1st, 8:00 AM

Airborne Computer Technology

W. T. Chow IBM Electronics Systems Center, Owego, New York

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Scholarly Commons Citation Chow, W. T., "Airborne Computer Technology" (1973). The Space Congress® Proceedings. 2. https://commons.erau.edu/space-congress-proceedings/proceedings-1973-10th/session-4/2

This Event is brought to you for free and open access by the Conferences at Scholarly Commons. It has been accepted for inclusion in The Space Congress® Proceedings by an authorized administrator of Scholarly Commons. For more information, please contact [email protected]. AIRBORNE COMPUTER TECHNOLOGY

W. T. Chow IBM Electronics Systems Center, Owego, New York

ABSTRACT Figure 1 shows the growth of the computer operating speed through the years. This growth is an indication The development of airborne digital computer has been of the persistent increase in the computing capacity of greatly influenced by rapid technological advances. This the airborne computer. It is made possible by a com­ paper provides an overview of the present status and the bination of the following efforts: direction of further evolution. It discusses the changes that are taking place in the areas of hardware, software 1) Use of faster memories a number of ap­ and computer organization; and suggests 2) Use of faster logic circuits proaches towards a broadened usage of airborne com­ puter to take advantage of its increasing capability and 3) Use of parallel arithmetic operations decreasing cost. 4) Use of overlap and indexing techniques.

This increased speed allows the airborne computer to INTRODUCTION perform broader types of functions, to be shared by larger number of tasks,and to be used in a more flex­ been in existence for The airborne digital computer has ible manner. A contemporary computer can perform short time, however, less than twenty years. In this 200, 000 to 800, 000 operations per second. With this been used in the much has been accomplished. It has capability, a single computer or a single system of com­ moon. It is at the con­ guidance of our space flight to the puters, can perform all the processing functions re­ based intercontin­ trol of our land based and submarine quired on an aircraft, including that for flight control. ental ballistic missiles. It performs the navigation, fire warfare compu­ control, weapon delivery and electronic Figures 2 and 3 show, respectively, the trends of weight is also appearing now tations in our military aircraft. It and power consumption of an airborne computer. To­ in our commercial airliners. gether, weight and power represent the f1burden" sus­ tained for the use of a computer. Both have been re­ of a typical air­ During this time, the computing speed duced through the use of circuits with higher level of in­ two orders of magni­ borne computer has increased by tegration, memories with higher efficiency, and better one order of magni­ tude, and the storage by more than packaging and interconnection techniques, A typical con­ reduction in its weight, tude. This is accompanied by a temporary computer, with 8000 words of internal mem­ and, at the same size, power consumption and cost, ory, weighs between 15 and 50 pounds and requires be­ and flexibility. time, an improvement in its reliability tween 50 and 250 watts of power, although these numbers is continuing. This trend of dynamic progress can be considerably lower or higher for designs to meet specific requirements. This paper will provide an overview of the present status of airborne computer technology and the direction of its will address the ad­ further development. Discussion A TYPICAL GENERAL PURPOSE AIRBORNE of hardware, vances that are being made in the areas COMPUTER software and computer organization. A number of ap­ com­ proaches towards the broadened usage of airborne AP-101 developed by the Federal Systems Division of In­ capability and puters, to take advantage of its increasing ternational Business Machines Corporation is a typical decreasing cost will be suggested. contemporary general purpose airborne computer. As shown in Figure 4, it measures 7. 62 inches x 10.12 in­ ches x 19.56 inches and fits a standard aircraft trans­ TREND OF DEVELOPMENT port rack (ATR) case. It can be used to perform the computational tasks for navigation, guidance, weapon in development of the airborne computer is The trend delivery and data management onboard an airplane, or the three charts appearing with the fig­ exemplified by similar tasks on a large space vehicle. ures at the end of this paper.

4-19 thousands of The functional characteristics of AP-101 can be sum­ LSI circuits containing several/gates per chip will be marized as in Figure 5, its physical characteristics as used in airborne computers of the late 1970 f s. This in Figure 6, trend is illustrated in Figure 10. The impact on the design and application of airborne A TYPICAL SUBSYSTEM PROCESSOR computer due to the wide use of LSI circuits can be ex­ pected to be even greater than that caused by the intro­ SP-l f a smaller computer belonging to the same family duction of 1C. The potential benefits to the computer due as AP-101, is designed to serve the subsystem applica­ to the use of LSI are: tions. It can perform the processing functions required for the midcourse guidance of a missile, the stabiliza­ 1) Smaller size and weight tion and control of a drone, the navigation of an aircraft, — Expectation: 10 mil2 per gate, in late 1970 f s or the attitude control and stabilization of a spacecraft. As shown in Figure 7, it measures 4.1 inches x 10.1 2) Higher speed inches x 13. 6 inches. — Shorter distances, less capacitance

The functional and physical characteristics of SP-1 are 3) Lower power summarized in Figures 8 and 9. SP-1 can also be sup­ — Less capacitance to drive plied without structure and power supply, to be integra­ ted into the subsystem it serves. The physical param­ 4) Greater reliability eters of the basic assemblies are also shown in Figure — Simpler processing (less manual and 9. more automated) — Fewer external connections EVOLUTION OF CIRCUIT TECHNOLOGY 5) Lower cost

Subminiature vacuum tubes, discrete semiconductor — More automated fabrication and assembly components and hybrid circuits were used in the early — Expectation: 1£ per gate, in late 1970 T s airborne digital computers. The preference quickly shifted to integrated circuits when these were developed Summarized below are some and then improved. Throughout the mid-1960 f s, as the of the special efforts that are being undertaken so yield of integrated circuits increased, the use of bipolar that LSI's of increasing level of complexity can silicon integrated circuits became almost universal. be fully utilized: This, together with memory improvements, brought about a general increase in computing speed and a reduc­ 1) Computer aided design (CAD) for chip layout, tion in weight and power consumption. With reduced placement and simulation. hardware penalty and improved reliability, parallel 2) Chip layout to minimize external wiring and arithmetic operations became generally used in com­ maximize chip standardization. puters designed during this period. Word length became more standardized. Floating point number representa­ 3) Discretionary wiring technique to increase chip tion began to appear. The number of instructions in a utilization — to use a standardized chip for dif­ basic instruction set started to grow faster. At the same ferent functions, and to tolerate the existence time, the cost of airborne computers became lower. of chip imperfections. 4) Incorporation of built-in test circuits. The march towards higher density circuits regained mo­ mentum in the late 1960's when medium scale integra­ 5) Packaging techniques to provide sufficient cool­ tion (MSI) and large scale integration (LSI) circuits be­ ing to the chips. came available. * A typical contemporary computer, 6) Approaches to increase the yield of acceptable such as AP-101, uses MSI circuits with up to thirty gates chips. per chip. As the yield of LSI circuits increase, the in­ terconnecting and packaging technology improve and the designers learn to use LSI circuits more effectively, the In conjunction with the evolution towards higher levels of level of circuit integration used in an airborne computer circuit integration, there is also a trend towards the in­ is expected to continue to grow. There are already com­ creased usage of metal oxide semiconductor (MOS) de­ puters built with LSI circuits containing several hundred vices, which utilize field effect to enhance the flow of gates per chip. If the present rate of progress continues, current in a semiconductor. In comparison with bipolar

*The dividing lines between 1C, MSI and LSI are not uniformly defined. Generally, a single chip containing up to ten gate circuits is referred to as an 1C, one containing ten to hundred gate circuits as MSI, and one containing more than one hundred gate circuits as LSI.

4-20 cores are contained devices, a MOS device has the following general char­ is 8 mils ID, 14 mils OD. 147,456 into 8,192 half words. acteristics: in each memory module, organized up to 65,536 half words 1) Smaller size. The chip area required for a AP-101 can be provided with capability of MOS gate is one-fifth to one-tenth that of a of internal memory with an addressing characteristics of the bipolar gate. 524,288 halfwords. The design core memory are as follows: 2) Higher input impedance. While a bipolar device is current controlled, a MOS device is voltage 1) Storage Capacity: 32,768, 36-bit words (including controlled. It has no fanout limitation, and per­ 2 parity bits and 2 storage protect bits per word) mits the use of simpler circuits. 2) Module Size: 8,192, 18-bit half words (includ­ 3) Lower power consumption. ing 1 parity bit and 1 storage protect bit per half word) 4) Simpler process. Fewer diffusion steps. Fewer photomask steps. Expectation of higher 3) Access Time: 450 nanoseconds yield and lower cost. 4) Cycle Time: 900 nanoseconds

5) Slower speed. Due to stray circuit capacitance 5) Power: 110 watts operating, 35 watts standby discharging of and the necessary charging and 6) Weight: 18. 65 pounds this capacitance. This disadvantage is being overcome by device design to reduce the capaci­ 7) Size: 508 cubic inches tance and circuit design to take advantage of the smaller geometry. AP-101 design also provides for an interchangeable pro­ cured NDRO plated wire memory, with the following In the development of MOS technology, the early efforts characteristics. were mostly directed towards P-channel MOS (P-MOS) words (in­ devices because they were easier to produce. N-channel 1) Storage Capacity: 32,768, 36-bit protect bits MOS (N-MOS) devices are capable of higher switching cluding 2 parity bits and 2 storage speed and smaller size since they depend on the mobility per word) N-MOS is rela­ of electrons rather than holes. However, 2) Module Size: 8,192, 18-bit half words (includ­ manufacturing tively less utilized because more stringent ing 1 parity bit and 1 storage protect bit per The current controls are needed for its production. half word) emphasis is on complementary MOS (CMOS) which com­ bines P-channel and N-channel devices on the same sub­ 3) Access Time*. 400 nanoseconds and requir­ strate. Although somewhat larger in size 4) Cycle Time: 1.0 microsecond write, 0.5 micro­ are ing more processing than P-MOS, CMOS devices second read capable of higher speed, have higher noise immunity and watts standby consume much less power. It is expected that the several 5) Power: 43 watts operating, 25 the variations to different approaches to MOS as well as 6) Weight: 18. 5 pounds each of these approaches will all be further explored and utilized. However, CMOS or one of its refinements will 7) Size: 405 cu. in. likely become the dominant circuit technology in the late memory has ap­ 1970's. With the advent of LSI, semiconductor peared in airborne computers. This usage is expected characteristics of EVOLUTION OF MEMORY TECHNOLOGY to increase due to the many attractive the semiconductor memory. The principal ones are Most of the early airborne computers used electromech­ listed below: anical memories: drums or discs. This gave way to de­ vices which contain no moving parts, do not require main­ 1) High speed tenance and are not restricted to serial access. Many types of these devices have been used, including thin film, 2} High density wired array and multiaperture memories. However, 3) Low power consumption until recently, the preference gravitated towards ferrite common to that for processor logic coincident — current cores and plated wires. The cores 4) Technology provide fast, high density, random access, large size circuits memories at a few cents per bit. The plated wires pro­ 5) Possibility of combining logic and storage func­ vide nondestructive readout (NDRO) capability. A typi­ tions on the same chip cal contemporary computer offers either, or an optional output capability., resulting in good choice, of these two memories. Figure 11 shows a sec­ 6) Continuous ratio. tion of the core memory used in AP-101. The core size signal-to-noise

4-21 Development work in semiconductor memory is currently represent a larger market force. However, its wide being undertaken in several different technological ap­ usage can be expected by the late 1970's. CMOS with its proaches. The salient features of the main approaches good combination of high density, high speed and very are summarized in the following: low power consumption can emerge as the dominant high speed read-write memory. MNOS or a variation: MAOS 1) Technology based on bipolar junction transistor (Metal Alumina Oxide Silicon), with an even higher den­ sity, an even lower power dissipation but a substantially a) Flip flop commonly used as the storage lower writing speed, may become the choice for read element mostly memory or electrically alterable read only mem­ b) High switching speed ory. c)' Larger size, higher power consumption Semiconductor memory is not the only technology cur­ 2) Technology based on MOS field effect transistor rently under development. A number of other technol­ ogies are being worked on. These include the following a) Fewer devices needed to form a storage mass memory approaches: element b) Smaller size, lower power consumption 1) Magnetic bubble domain memory c) Simpler processing, lower cost a) Utilization of cylindrical domain formed in d) Slower switching speed (for devices now an orthoferrite or garnet plate under the available) influence of a transversely applied magne­ tic field as storage element. 3) Charge coupled devices b) High storage density — greater than 10 6 a) Derived from MOS technology. Very simple bits per square inch. storage element structure c) Large capacity capability — with low vol­ b) Operates as a dynamic shift register ume, weight and power consumption. One c) Capable of high bit rates, 10 megabits per conceptual design of a 10^-bit mass storage second or more system yields a volume of 520 cu. in., weight of 27. 4 pounds and power consump­ d) Data must be circulated and regenerated tion of 22.2 watts. These numbers can fur­ 4) MNOS (Metal Nitride Oxide Silicon) transistor ther decrease. non-volatile. a) Storage element can be formed with only d) NDRO, one device, by utilizing its hysteresis oper­ e) Capability to perform logical functions — ating characteristics on-chip decoding, signal processing. b) High density. Potential of one million bits f) Basically serial in operation. per square inch or more g) Potential solid state replacement for tapes, c) Non-volatile. Potential of long retention discs, drums. / time of one year or more d) Long write time (for devices now available) 2) Optical beam accessed memory e) Similar to MOS, can utilize processes de­ a) Use of optical material as storage medium, veloped for MOS and laser beam as means for reading or writing Work is also being carried out in a number of other var­ b) Potential of very high density — 107 bits iations. per square inch or more

Considerable further effort is still required: to improve c) Potential utilization of holographic tech­ and assure the yield of the chips; to perfect the mounting, niques to improve signal to noise ratio and bonding and interconnection of the chips; to effectively reduce the penalty of imperfect alignment and efficiently package the memory elements and sup­ 3) Ferroacoustic memory porting circuitry; and to quantize and characterize their reliability and environmental capabilities. At the same a) Use of magneto-restrictive magnetic film time, a non-volatile semiconductor memory with fast on glass or wire substrate as storage read-write capability, which can survive a power down medium. Writing accomplished by coinci­ condition is still much desired and not yet available. dent application of acoustic wave along the The pace at which semiconductor memory will be used substrate and current pulse through a write- in airborne computers will depend to a large extent on sense conductor. Reading by sensing the its success and growth in commercial applications which voltage pulse induced by the acoustic wave.

4-22 former used for simpler b) Synchronous high data rate serial operation. adopted, with the applications and the latter for more elabor­ c) NDRO, non-volatile. ate applications. easier use EVOLUTION IN COMPUTER DESIGN 3) Trend towards a) All current airborne computers are pro­ In addition to the evolution in hardware, there are also a vided with assemblers and diagnostic pro­ number of evolving trends in airborne computer design. grams. Increasingly, they are also being These developments are stimulated by user requirements, provided with compilers and simulators — availability of newer technology and the accumulated ex­ operable on commercial computers. perience of the designers. These developments are not of software by computers in a necessarily without controversy. The direction and rates b) Sharing of evolution are not always uniformly persistent. How­ family. ever, the general trends are clearly discernible. c) Use of higher order language (HOL) to re­ duce software effort and provide better con­ 1) Trend towards increased processing capability trol. a) General use of parallel rather than serial d) Floating point provision increasingly avail­ operation able to ease programming and program val­ b) Use of overlap operations idation. c) Use of sophisticated indexing and address­ 4) Trend towards greater flexibility in computer ing techniques organization to take advantage of new hardware and software concepts d) Increasing memory size to accommodate increasing utilization of computer. A cur­ a) Judicious use of Read Only Memory, Read rent airborne computer typically offers a Mostly Memory, Block Oriented Random basic capacity of at least 4,000 words. Access Memory and Mass Memory to op­ 32, 000 words or more are not uncommon. timize computer design. e) Richer instruction repertoire to increase b) Use of multiprocessor and multicomputer the performance of a computer. A current configurations to satisfy a system require­ computer has a basic instruction set of from ment. 30 to over 100. c) Use of parallel processor for the process­ f) Microprogramming increasingly provided ing of radar and acoustic signals, the cor­ to accommodate functional improvements, relation of multisensors, and pattern recog­ design changes and different operational nition. modes. d) Greater emphasis on the design of optimized 2) Trend towards general purpose capability input/output subsystem, power supply and interconnections . a) Development of "family" of airborne com­ puters, providing wide spectrum of capa­ Integration of logic and memory functions bility and using common basic design. This e) where advantageous. approach facilitates accommodation of in­ dividual requirement without sacrificing 5) The trend towards greater application of process learning which benefits reliability, fault tolerant computer design is stimulated by cost and efficient use of computer. the desire to: b) Use of computer modules such as CPU mod­ a) Increase the computer reliability ules, memory modules, power supply mod­ its operating life ules , from which new members of the b) Increase "family" can be constructed. c) Assure proper operation during a critical c) Affiliation of airborne computers with com­ time period mercial computers to take advantage of d) Avoid maintenance during a given time span commonality in components and software. In such a case, the instruction set of the e) Provide graceful degradation airborne computer is generally a subset of f) Avoid single point failures. the commercial computer's. this feature is decreasing d) Standardization of word lengths. 16- and The penalty for incorporating 32-bit lengths are increasingly being as the computer state-of-art advances.

4-23 The early fault tolerant computers made use of masking into coordinates, scales and formats re­ approaches such as component redundancy, modular quired for computation. redundancy and computer redundancy. More recent de­ e) Use of nonlinear and non-explicit sensors signs also make use of error detecting — error correct­ ing codes and self-repair ing approaches. In the latter, f) Use of multisensors with multispectral a computer is partitioned into a number of functional coverage, and use of computer to process modules, each provided with one or more unpowered and correlate their outputs. of spares. A control unit is used to detect the presence 3) Increased usage of an independent I/O proces­ a fault and carry out the recovery operation. A trans­ sor, to simplify programming of main compu­ ient fault is corrected by repetition of the computation. tations, to provide better performance or to A permanent fault is corrected by the replacement of the improve dynamic response. faulty module with a spare. The control unit, being of computer to aid and enhance the hard core of the system, is protected by redun­ 4) Increased usage stabilization dancy, majority voting and spares. system control and a) Use of simple control mechanisms with The optimum fault tolerant configuration for a specific computer providing the necessary transfer application can be determined only through a pertinent functions and coordinate transformations. tradeoff, and can be a combination of several approaches. use of electromechani­ However, with pre-planning, standard modules and cir­ b) Minimization of the cuits can be designed and then utilized to make up dif­ cal mechanisms. ferent configurations to satisfy different applications. c) Freedom to use dynamically unstable con­ This concept is illustrated in Figure 12. By varying the figurations, with versatile digital filtering numbers of the functional units and the fault detecting, in the computer providing the stabilizing code translating and power switching circuits in the con­ transfer functions. trol unit, different fault tolerant configurations can be of computer to monitor the realized. 5) Increased usage overall system performance BROADENED USAGE OF AIRBORNE COMPUTER a) Use of computer to monitor the perform­ ance of other equipment on the vehicle. With the increasing capability and decreasing size, power consumption and cost of the future airborne computer, its b) Use of computer to assess the probability broadened utilization can be anticipated. Listed below of mission success. are several illustrations. The degree to which any such c) Storage of data for post flight analysis. approach can be beneficial to a given application, of alter­ course, should be determined by specific tradeoffs. d) Use of computer to suggest attractive nate targets/missions, based on current 1) Increased usage of computing approaches that inputs and its estimation of the probability will result in better system performance and/ of success of the original mission. programming. or more effective e) Storage of data for maintenance analysis. a) Use of rigorous rather than expansion equa­ 6) Increased usage of computer to enhance the tions for greater flexibility to accommodate overall system performance changes and refinements. a) Computer controlled flight for RPV and b) Use of individually optimized equations for manned aircraft. each type of weapon or sensor in vehicles equipped with multiple weapons or sensors. b) Computer derived information base regard­ ing own position, weather, target, environ­ c) Use of more powerful estimation methods. ment, etc., generated from preset data, d) Use of table lookups, or table lookups in sensor input, and real-time data link com­ combination with interpolations. munication with ground stations, satellites, other aircraft. 2) Increased usage of computer to aid or enhance the sensors c) Computer organized situation displays. a) Digital processing of sensor data d) Computer controlled weapon delivery and electronic warfare. b) Digital control of sensors e) Computer controlled evasive and emergency c) Computer compensation for individual maneuvers . sensors and/or installations f) Automated reporting and record keeping. d) Use of simple sensors with computer per­ forming the transformation of sensor data g) Computer integrated avionics system.

4-24 Pounds I

500 4 Kops I

1.000-1

~ 100-|

Figure 1. Trend of Airborne Computer Operating Speed Figure 2. Trend of Airborne Computer Weight (Normalized to 8K Memory)

Watts 1,000-1

Figure 3. Trend of Airborne Computer Power Consumption (Normalized to 8K Memory)

4-25 Figure 4. AP-101 General Purpose Airborne Computer

Type: General-purpose, parallel, micro­ programmed Organization: Binary, fractional. Fixed and float­ ing point Word Length: 32 bits, full word; 16 bits, half word. Storage Type: 900 nanosec. core with storage pro­ tection. Can be provided with plated Dimensions: 7.62 inches x 10.12 inches x 19.56 wire memory inches (Standard ATR) Storage Size: Up to 65,536 half words internal, ad­ Volume: 1508 cu. in. 524,288 half words dressing to Weight: 48 pounds (with 65,536 half words Throughput: 550 KOPS storage) Average Execu- 1. 65 /is add, 5.45 /is multiply, 8.65 Power: 340 watts (with 65,536 half words tion Times: /is divide storage) Instruction Set: 117 Built-in Test: Greater than detection of failures

Figure 5. Functional Design Characteristics of AP-101 Figure 6. Physical Characteristics of AP-101

4-26 Figure 7. SP-1 Airborne Subsystem Processor

Type: General-purpose, stored program, parallel Including Power Without Power Organization: Binary, fractional, fixed point Supply and Struc­ Supply and Struc­ Word Length: 16 bits, instructions; 16 and 32 bits, ture, With 4000 ture, With 4000 data Words Memory Words Memory

Storage Type: 1.33 /is core Dimensions: 4. 1 inches x 10. 1 3.6 inches x 8.8 Storage Size: 4, 000 to 16,000 16-bit words inches x 13. 6 inches x 3. 1 inches inches Throughput: 350 KOPS Volume: 560 cubic inches 100 cubic inches Average Execu- 2. 7 /is add, 5. 7 /is multiply, 8. 0 /is tion Times: divide Weight: 18. 1 pounds 3. 6 pounds Instruction Set: 41 Power: 72 watts 52 watts

Figure 8. Functional Design Characteristics of SP-1 Figure 9. Physical Characteristics of SP-1

4-27 Discrete Components

Figure 10. Trend of Circuit Density Used in Airborne Computer

Input

Modules

Signal Interconnection •

Power __ Interconnection

Output^ • Power

Figure 11. Core Memory Array Figure 12. Fault Tolerant Computer

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