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DRAM EMAIL GIM Teams!!!/Teaming Issues •Memories in Verilog •Memories on the FPGA
Memories & More •Overview of Memories •External Memories •SRAM (async, sync) •Flash •DRAM EMAIL GIM teams!!!/teaming Issues •Memories in Verilog •Memories on the FPGA 10/18/18 6.111 Fall 2018 1 Memories: a practical primer • The good news: huge selection of technologies • Small & faster vs. large & slower • Every year capacities go up and prices go down • Almost cost competitive with hard disks: high density, fast flash memories • Non-volatile, read/write, no moving parts! (robust, efficient) • The bad news: perennial system bottleneck • Latencies (access time) haven’t kept pace with cycle times • Separate technology from logic, so must communicate between silicon, so physical limitations (# of pins, R’s and C’s and L’s) limit bandwidths • New hopes: capacitive interconnect, 3D IC’s • Likely the limiting factor in cost & performance of many digital systems: designers spend a lot of time figuring out how to keep memories running at peak bandwidth • “It’s the memory - just add more faster memory” 10/18/18 6.111 Fall 2018 2 How do we Electrically Remember Things? • We can convey/transfer information with voltages that change over time • How can we store information in an electrically accessible manner? • Store in either: • Electric Field • Magnetic Field 10/18/18 6.111 Fall 2018 3 Mostly focus on rewritable • Punched Cards have existed as electromechanical program storage since ~1800s • We’re mostly concerned with rewritable storage mechanisms today (cards were true Computer program in punched card format ROMs) https://en.wiKipedia.org/wiKi/Computer_programming_in_the_ -
Plated Wire Memory Usage on the UNIVAC Minuteman Weapon System Computer ©2008 by Larry D
P.O. Box 131748 Roseville, MN 55113 Plated Wire Memory Usage on the UNIVAC Minuteman Weapon System Computer ©2008 by Larry D. Bolton, Clinton D. Crosby, and James A. Howe Larry Bolton was a component engineer assigned to the Minuteman program from 1969 to 1975. In support of the Minuteman program, we purchased a plated wire element and a raw tunnel structure. These were used by UNIVAC St. Paul to build the plated wire memory assembly. Larry Bolton’s function on the Minuteman program was to monitor suppliers to ensure that the program received plated wire and tunnel structure materials that met the specification requirements. Clint Crosby was an Applied Research engineer assigned to the Minuteman program and was part of a plated wire element analysis group from 1969 to 1980. Clint was involved with plated wire testing, plated wire manufacturing support at Bristol, and Minuteman memory module fabrication support at St. Paul. Jim Howe was the lead engineer for the three generations of plated wire memories for the Minuteman WSC computer (the EDM, ADM, and production versions), and was the lead engineer for a company-sponsored wide-margin plated wire memory design that was done as a backup to the three Minuteman memories. Unfortunately, even though it was a great success, it wasn't needed (customer political implications). PLATED WIRE PROGRAM UNIVAC Commercial in Philadelphia, PA, had developed a continuous chemical plating process to put a Ni- Fe magnetic plating over a 5 mil beryllium-copper substrate wire. Manufacturing was located at Univac Commercial in Bristol, Tennessee. The finished product was used in the 9000 series and initial 1110 commercial computers as well as on the Minuteman program. -
31 January 1971 J. Jurison Program Manager Distribution of This Report
31 January 1971 J. Jurison Program Manager Distribution of this report is provided in the interest of information exchange and should not be construed as an endorsement by NASA of the material presented. Prepared Under Contract for c70-171 /301 FOR E W OR%) This final report covers the work performed by Autonetics Division of North American Rockwell Coyporation under a study contract entitled Reconfigurable GSrC computer Study for Space Station Use. The report is submitted to the National Aeronautice and Space Administration Manned Spacecraft Center under the requirements of Contract N The study program covered the period from December 29, 1969 through January 31, 1971. The NASA. Technical Monitor was Mr. E. S. Chevers. The final report consists of seven (7) volumes: Volume I Technical Summary Volume II Final Technical Report Volume IU Appendix I. Model- Specification Volume TV Appendix 2. IOP - VCS Detailed Design Volume V Appendix 3. System Analysis and Trade-offs Volume VI Appendix 4. Software and Simulation Description and Results Volume VI1 Appendix 5. D-200 Computer Family Appendix 6. System Error Analysis Appendix 7. Reliability Derivation for Candidate Computers Appendix 8. Power Converter Design Data Appendix 9. Data Transmission Medium Design PPENDIX 5 1. 208 Building Blocks . e . e e a a . e e e . e e , . a e 5-1 Page- 1.0 Introduction and Summary e , , . ., . e e e e e , e . a 6-1 2.0 Error Analysis and Mechanization Equa*'blons e. * e *. , , . *.. 6-3 3.0 Computer Program e.. -... a *. a a . e. 6-8 4.0 Results a e.I). -
Metal Ultrasonic Delay Lines
Research Paper 2453 rOOmOI of R~eo"h of The NO tiO ~;;:if ~;=asoni;l~~i~;~~~:: Russell W . Mebs, John H. Darr, and John D. Grimsley A study was made of the applicability of a number of metals and a lloys for therm all y stable ultrasonic delay lin es. A preliminary iavestigation was made of different types of pressure holders and ad hesi ves for use in crystal t ransducer attachments and of the iafluence of specimen length on attenuation for valious m etals and alloy. The effect of cold-work, annealing, and specimen cross section on attenuation was a lso determined for a representati ve isoelastic alloy. Measurements of temperature variation of signal attenuation, distort ion, a nd delay t im e on a number of assembled delay lines indicated t hat an isoelastic a lloy employing over cured epoxy-resin crystal attachments gave best over-all t ransmission characteristics. No correlation was obtainable between strength and SOLl nd-transmission characteristics with varioLls cemented joints. 1. Introduction variations in pulse attenuation and distortion with acceleration or change of temperature. The ultrasonic delay line has come into wide use Only a general survey will be given of the basic in recent years with the development of radar, com theory of ultrasonic transmission as related to delay ~uters , and other electronic devices [1 , 2, 3, 4V It lines of 50 tLsec or less. More comprehensive 's a means for delaying a signal for a predetermined treatments have been given elsewhere [2, 4, and 5]. ~hort period to be accurately reproduced for use at _tn appropriate later instant. -
2129710142200313CSE312 Amir Adel Salah.Pdf
استمارة جقييم الزسائل البحثيت ملقزر دراس ي اوﻻ : بياهاث جمل بمعزفت الطالب اسم الطالبـــــــــــ :أم ري عادل صﻻح عبد العظيم كلية : الهندســــه القسم: الحاسبات و النظم الفرقة/المستوى : الثالثة الشعبة : اسم المقرر :بنية الحاسب كود المقرر : CSE312 استاذ المقرر : د.طارق مراد جمعة ر ال رييد اﻻلكيون [email protected] : للطالب عنوان الرسالة البحثية : Modern Computers Memory ثاهيا: بياهاث جمل بمعزفت لجىت املمتحىيين هل الزسالت البحثيت املقدمت متشابت جشئيا او كليا ☐ وعم ☐ ﻻ فى حالت الاجابت بىعم ﻻ يتم جقييم املشزوع البحثى ويعتبر غير مجاس جقييم املشزوع البحثى م عىاصز التقييم الوسن التقييم اليسبى 1 الشكل العام للزسالت البحثيت 2 جحقق املتطلباث العلميت املطلوبت 3 يذكز املزاجع واملصادر العلميت 4 الصياغت اللغويت واسلوب الكتابت جيد هتيجت التقييم النهائى 100/ ☐ هاجح ☐ راسب جوقيع لجىت التقييم 1. .2 .3 .4 .5 جزفق هذه الاستمارة كغﻻف للمشزوع البحثى بعد استكمال البياهاث بمعزفت الطالب وعلى ان ﻻ جشيد عً صفحت واحدة Computers Memory Introduction At the beginning of the age of technology , A new term name called Memory has appeared .The memory is the most important thing in Computer . it is the main item which is responsible for data storage. The memories were designed by different ways and through multiple stages. At the beginning of memory manufacturing, the memory was produced by vacuum tubes from 1946 to 1959 .Vacuum tubes were basic components which was used to make the first generation of memories . Also the vacuum tubes used to make circuitry of CPU (Central Processing unit).In this generation ,the basic programming language was machine code which used in computers used vacuum tubes in the memory. -
SŁOWNIK POLSKO-ANGIELSKI ELEKTRONIKI I INFORMATYKI V.03.2010 (C) 2010 Jerzy Kazojć - Wszelkie Prawa Zastrzeżone Słownik Zawiera 18351 Słówek
OTWARTY SŁOWNIK POLSKO-ANGIELSKI ELEKTRONIKI I INFORMATYKI V.03.2010 (c) 2010 Jerzy Kazojć - wszelkie prawa zastrzeżone Słownik zawiera 18351 słówek. Niniejszy słownik objęty jest licencją Creative Commons Uznanie autorstwa - na tych samych warunkach 3.0 Polska. Aby zobaczyć kopię niniejszej licencji przejdź na stronę http://creativecommons.org/licenses/by-sa/3.0/pl/ lub napisz do Creative Commons, 171 Second Street, Suite 300, San Francisco, California 94105, USA. Licencja UTWÓR (ZDEFINIOWANY PONIŻEJ) PODLEGA NINIEJSZEJ LICENCJI PUBLICZNEJ CREATIVE COMMONS ("CCPL" LUB "LICENCJA"). UTWÓR PODLEGA OCHRONIE PRAWA AUTORSKIEGO LUB INNYCH STOSOWNYCH PRZEPISÓW PRAWA. KORZYSTANIE Z UTWORU W SPOSÓB INNY NIŻ DOZWOLONY NA PODSTAWIE NINIEJSZEJ LICENCJI LUB PRZEPISÓW PRAWA JEST ZABRONIONE. WYKONANIE JAKIEGOKOLWIEK UPRAWNIENIA DO UTWORU OKREŚLONEGO W NINIEJSZEJ LICENCJI OZNACZA PRZYJĘCIE I ZGODĘ NA ZWIĄZANIE POSTANOWIENIAMI NINIEJSZEJ LICENCJI. 1. Definicje a."Utwór zależny" oznacza opracowanie Utworu lub Utworu i innych istniejących wcześniej utworów lub przedmiotów praw pokrewnych, z wyłączeniem materiałów stanowiących Zbiór. Dla uniknięcia wątpliwości, jeżeli Utwór jest utworem muzycznym, artystycznym wykonaniem lub fonogramem, synchronizacja Utworu w czasie z obrazem ruchomym ("synchronizacja") stanowi Utwór Zależny w rozumieniu niniejszej Licencji. b."Zbiór" oznacza zbiór, antologię, wybór lub bazę danych spełniającą cechy utworu, nawet jeżeli zawierają nie chronione materiały, o ile przyjęty w nich dobór, układ lub zestawienie ma twórczy charakter. -
Present and Future State of the Art in Guidance Computer Memories
https://ntrs.nasa.gov/search.jsp?R=19670030990 2020-03-24T00:05:48+00:00Z View metadata, citation and similar papers at core.ac.uk brought to you by CORE provided by NASA Technical Reports Server J' . t. NASA TECHNICAL NOTE --NASA --__TN D-4224 PSI d N N P n 4 c/) 4 z PRESENT AND FUTURE STATE OF THE ART IN GUIDANCE COMPUTER MEMORIES by Robert C. Ricci Electronics Research Center Cambridge, M ass, NATIONAL AERONAUTICS AND SPACE ADMINISTRATION WASHINGTON, D. C. NOVEMBER 1967 .-- TECH LIBRARY KAFB. NM 0330893----- NASA TN D-4224 PRESENT AND FUTURE STATE OF THE ART IN GUIDANCE COMPUTER MEMORIES By Robert C. Ricci Electronics Research Center Cambridge, Mass. NATIONAL AERONAUT ICs AND SPACE ADMINISTRATION For sale by the Clearinghouse for Federal Scientific and Technical Information Springfield, Virginia 22151 - CFSTI price $3.00 PRESENT AND FUTURE STATE OF THE ART IN GUIDANCE COMPUTER MEMORIES by Robert C. Ricci Electronics Research Center ABSTRACT A survey of the present and anticipated state of the art for 1970-1972 in guidance computer main memories is presented. The selection of memory components for use in advanced guidance computer applications motivates the work reported. Non-destruc- tive read-out (NDRO) vs. destructive read-out (DRO) type memory techniques and tech- nologies are discussed, with particular reference to six types of advanced solid-state memory devices: magnetic cores, plated wire, planar-magnetic thin films, etched- permalloy toroids, monolithic ferrites, and integrated-circuit memories. Present characteristics of these devices are compared, and a summary of anticipated charac- teristics of memory devices for 1970-1972 is detailed. -
Random Access Memory (Ram)
www.studymafia.org A Seminar report On RANDOM ACCESS MEMORY (RAM) Submitted in partial fulfillment of the requirement for the award of degree of Bachelor of Technology in Computer Science SUBMITTED TO: SUBMITTED BY: www.studymafia.org www.studymafia.org www.studymafia.org Acknowledgement I would like to thank respected Mr…….. and Mr. ……..for giving me such a wonderful opportunity to expand my knowledge for my own branch and giving me guidelines to present a seminar report. It helped me a lot to realize of what we study for. Secondly, I would like to thank my parents who patiently helped me as i went through my work and helped to modify and eliminate some of the irrelevant or un-necessary stuffs. Thirdly, I would like to thank my friends who helped me to make my work more organized and well-stacked till the end. Next, I would thank Microsoft for developing such a wonderful tool like MS Word. It helped my work a lot to remain error-free. Last but clearly not the least, I would thank The Almighty for giving me strength to complete my report on time. www.studymafia.org Preface I have made this report file on the topic RANDOM ACCESS MEMORY (RAM); I have tried my best to elucidate all the relevant detail to the topic to be included in the report. While in the beginning I have tried to give a general view about this topic. My efforts and wholehearted co-corporation of each and everyone has ended on a successful note. I express my sincere gratitude to …………..who assisting me throughout the preparation of this topic. -
History Timeline by Jeff Drobman (C) 2015 === 1889 - Punch Cards - Herman Hollerith (Of IBM Forerunner) Invented "IBM" Punch Cards to Be Used for the 1890 Census
Computer Memory History Timeline by Jeff Drobman (C) 2015 === 1889 - Punch cards - Herman Hollerith (of IBM forerunner) invented "IBM" punch cards to be used for the 1890 census. 1932 - Drum memory 1947 - Delay line memory 1949 - Magnetic CORE memory 1950 - Magnetic TAPE memory 1955 - Magnetic DISK memory - IBM RAMAC was first one 1957 - Plated wire memory 1962 - Thin film memory 1968 (ca) - Paper tape - Had beginnings dating back to 1846, but became widely used with teletype machines such as the Teletype Model 33 ASR, which were adopted early on by minicomputers as a primitive terminal. 1970 - Bubble memory 1970 - DRAM - Invented by Intel, first device was the 1101, organized as 256x1, followed by the 4x larger (1024x1) 1103(A) -- regarded as the world's first commercial DRAM (intro in October 1970). 1971 - Bipolar SRAM - Fairchild 256x1 (note IBM made a 16-bit SRAM in late 1960s. AMD made a second source of a 64x1 SRAM by Fairchild in 1971.) 1971 - EPROM - Invented by Dov Frohman of Intel as the i1702, a 2K-bit (256x8) EPROM. 1971 - "Floppy" disks -- First were 8-inch, hence very flexible ("floppy"). The 8" became commercially available in 1971. 1973 (ca) - Magnetic TAPE CASSETTE memory 1976 - Shugart Associates introduced the first 5¼-inch floppy (flexible) disk drive 1977 - EEPROM - invented by Eli Harari at Hughes - a BYTE erasable device 1979 - CMOS SRAM (static RAM, 4T/6T cell, implemented as a latch) - first introduced by HP then its spinoff as Integrated Device Technology. I believe first devices were 1K (1024x1), and later organized as x4 then x8. -
The Graphic Display of Computer Memory Data
University of Windsor Scholarship at UWindsor Electronic Theses and Dissertations Theses, Dissertations, and Major Papers 7-21-1969 The graphic display of computer memory data. Satish P. Agrawal University of Windsor Follow this and additional works at: https://scholar.uwindsor.ca/etd Recommended Citation Agrawal, Satish P., "The graphic display of computer memory data." (1969). Electronic Theses and Dissertations. 6548. https://scholar.uwindsor.ca/etd/6548 This online database contains the full-text of PhD dissertations and Masters’ theses of University of Windsor students from 1954 forward. These documents are made available for personal study and research purposes only, in accordance with the Canadian Copyright Act and the Creative Commons license—CC BY-NC-ND (Attribution, Non-Commercial, No Derivative Works). Under this license, works must always be attributed to the copyright holder (original author), cannot be used for any commercial purposes, and may not be altered. Any other use would require the permission of the copyright holder. Students may inquire about withdrawing their dissertation and/or thesis from this database. For additional inquiries, please contact the repository administrator via email ([email protected]) or by telephone at 519-253-3000ext. 3208. INFORMATION TO USERS This manuscript has been reproduced from the microfilm master. UMI films the text directly from the original or copy submitted. Thus, some thesis and dissertation copies are in typewriter face, while others may be from any type of computer printer. The quality of this reproduction is dependent upon the quality of the copy submitted. Broken or indistinct print, colored or poor quality illustrations and photographs, print bleedthrough, substandard margins, and improper alignment can adversely affect reproduction. -
CS 152 Computer Architecture and Engineering Lecture 6
CS 152 Computer Architecture and Engineering Lecture 6 - Memory Dr. George Michelogiannakis EECS, University of California at Berkeley CRD, Lawrence Berkeley National Laboratory http://inst.eecs.berkeley.edu/~cs152 2/8/2016 CS152, Spring 2016 CS152 Administritivia . PS 1 due on Wednesday’s class . Lab 1 also due at the same time . Hand paper reports or email . PS 2 will be released on Wendesday . Lab 2 Wednesday or Thursday . Quiz next week Wednesday (17th) . Discussion section on Thursday to cover lab 2 and PS 1 2/8/2016 CS152, Spring 2016 2 Question of the Day . Can a cache worsen performance, latency, bandwidth compared to a system with DRAM and no caches? 2/8/2016 CS152, Spring 2016 3 Last time in Lecture 5 . Control hazards (branches, interrupts) are most difficult to handle as they change which instruction should be executed next . Branch delay slots make control hazard visible to software, but not portable to more advanced µarchs . Speculation commonly used to reduce effect of control hazards (predict sequential fetch, predict no exceptions, branch prediction) . Precise exceptions: stop cleanly on one instruction, all previous instructions completed, no following instructions have changed architectural state . To implement precise exceptions in pipeline, shift faulting instructions down pipeline to “commit” point, where exceptions are handled in program order 2/8/2016 CS152, Spring 2016 4 Early Read-Only Memory Technologies Punched cards, From early 1700s through Jaquard Loom, Punched paper tape, Babbage, and then IBM instruction -
Sperry Rand Third-Generation Computers
UNISYS: HISTORY: • 1873 E. Remington & Sons introduces first commercially viable typewriter. • 1886 American Arithmometer Co. founded to manufacture and sell first commercially viable adding and listing machine, invented by William Seward Burroughs. • 1905 American Arithmometer renamed Burroughs Adding Machine Co. • 1909 Remington Typewriter Co. introduces first "noiseless" typewriter. • 1910 Sperry Gyroscope Co. founded to manufacture and sell navigational equipment. • 1911 Burroughs introduces first adding-subtracting machine. • 1923 Burroughs introduces direct multiplication billing machine. • 1925 Burroughs introduces first portable adding machine, weighing 20 pounds. Remington Typewriter introduces America's first electric typewriter. • 1927 Remington Typewriter and Rand Kardex merge to form Remington Rand. • 1928 Burroughs ships its one millionth adding machine. • 1930 Working closely with Lt. James Doolittle, Sperry Gyroscope engineers developed the artificial horizon and the aircraft directional gyro – which quickly found their way aboard airmail planes and the aircraft of the fledgling commercial airlines. TWA was the first commercial buyer of these two products. • 1933 Sperry Corp. formed. • 1946 ENIAC, the world's first large-scale, general-purpose digital computer, developed at the University of Pennsylvania by J. Presper Eckert and John Mauchly. • 1949 Remington Rand produces 409, the worlds first business computer. The 409 was later sold as the Univac 60 and 120 and was the first computer used by the Internal Revenue Service and the first computer installed in Japan. • 1950 Remington Rand acquires Eckert-Mauchly Computer Corp. 1951 Remington Rand delivers UNIVAC computer to the U.S. Census Bureau. • 1952 UNIVAC makes history by predicting the election of Dwight D. Eisenhower as U.S. president before polls close.