DOCSLIB.ORG

Floating-Point IP Cores User Guide

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Floating-Point IP Cores User Guide Floating-Point IP Cores User Guide Subscribe UG-01058 101 Innovation Drive 2015.07.30 San Jose, CA 95134 Send Feedback www.altera.com TOC-2 Contents About Floating-Point IP Cores........................................................................... 1-1 List of Floating-Point IP Cores.................................................................................................................. 1-1 Installing and Licensing IP Cores..............................................................................................................1-2 Design Flow.................................................................................................................................................. 1-2 IP Catalog and Parameter Editor...................................................................................................1-3 Specifying IP Core Parameters and Options................................................................................1-5 Specifying IP Core Parameters and Options (Legacy Parameter Editors)...............................1-9 Upgrading IP Cores...................................................................................................................................1-10 Migrating IP Cores to a Different Device...................................................................................1-13 Floating-Point IP Cores General Features..............................................................................................1-14 IEEE-754 Standard for Floating-Point Arithmetic............................................................................... 1-15 Floating-Point Formats.................................................................................................................1-15 Special Case Numbers................................................................................................................... 1-16 Rounding.........................................................................................................................................1-16 Non-IEEE-754 Standard Format.............................................................................................................1-17 Floating-Points IP Cores Output Latency..............................................................................................1-17 Floating-Point IP Cores Design Example Files......................................................................................1-18 VHDL Component Declaration.............................................................................................................. 1-19 VHDL LIBRARY-USE Declaration.........................................................................................................1-20 ALTERA_FP_MATRIX_INV IP Core................................................................2-1 ALTERA_FP_MATRIX_INV Features.................................................................................................... 2-1 ALTERA_FP_MATRIX_INV Output Latency....................................................................................... 2-1 ALTERA_FP_MATRIX_INV Resource Utilization and Performance................................................2-1 ALTERA_FP_MATRIX_INV Functional Description.......................................................................... 2-2 Cholesky Decomposition Function...............................................................................................2-3 Triangular Matrix Inversion...........................................................................................................2-5 Matrix Multiplication......................................................................................................................2-5 Matrix Inversion Operation........................................................................................................... 2-5 ALTERA_FP_MATRIX_INV Design Example: Matrix Inverse of Single-Precision Format Numbers.................................................................................................................................................. 2-6 ALTERA_FP_MATRIX_INV Design Example: Understanding the Simulation Results..... 2-7 Sample Matrix Data.....................................................................................................................................2-8 ALTERA_FP_MATRIX_INV Signals.....................................................................................................2-10 ALTERA_FP_MATRIX_INV Parameters............................................................................................. 2-11 ALTERA_FP_MATRIX_MULT IP Core............................................................3-1 ALTERA_FP_MATRIX_MULT Features................................................................................................3-1 ALTERA_FP_MATRIX_MULT Output Latency................................................................................... 3-1 ALTERA_FP_MATRIX_MULT Resource Utilization and Performance........................................... 3-1 ALTERA_FP_MATRIX_MULT Functional Description......................................................................3-2 Altera Corporation TOC-3 ALTERA_FP_MATRIX_MULT Signals.................................................................................................. 3-3 ALTERA_FP_MATRIX_MULT Parameters...........................................................................................3-5 ALTERA_FP_ACC_CUSTOM IP Core..............................................................4-1 ALTERA_FP_ACC_CUSTOM Features..................................................................................................4-1 ALTERA_FP_ACC_CUSTOM Output Latency.....................................................................................4-1 ALTERA_FP_ACC_CUSTOM Resource Utilization and Performance............................................. 4-1 ALTERA_FP_ACC_CUSTOM Signals.................................................................................................... 4-3 ALTERA_FP_ACC_CUSTOM Parameters.............................................................................................4-4 ALTFP_ADD_SUB IP Core................................................................................ 5-1 ALTFP_ADD_SUB Features......................................................................................................................5-1 ALTFP_ADD_SUB Output Latency......................................................................................................... 5-1 ALTFP_ADD_SUB Truth Table................................................................................................................5-1 ALTFP_ADD_SUB Resource Utilization and Performance................................................................. 5-2 ALTFP_ADD_SUB Design Example: Addition of Double-Precision Format Numbers..................5-3 ALTFP_ADD_SUM Design Example: Understanding the Simulation Results......................5-3 ALTFP_ADD_SUB Signals........................................................................................................................ 5-4 ALTFP_ADD_SUB Parameters.................................................................................................................5-6 ALTFP_DIV IP Core...........................................................................................6-1 ALTFP_DIV Features..................................................................................................................................6-1 ALTFP_DIV Output Latency.....................................................................................................................6-1 ALTFP_DIV Truth Table........................................................................................................................... 6-2 ALTFP_DIV Resource Utilization and Performance.............................................................................6-3 ALTFP_DIV Design Example: Division of Single-Precision.................................................................6-4 ALTFP_DIV Design Example: Understanding the Simulation Results...................................6-4 ALTFP_DIV Signals.................................................................................................................................... 6-6 ALTFP_DIV Parameters.............................................................................................................................6-7 ALTFP_MULT IP Core....................................................................................... 7-1 ALTFP_MULT IP Core Features...............................................................................................................7-1 ALTFP_MULT Output Latency................................................................................................................ 7-1 ALTFP_MULT Truth Table.......................................................................................................................7-1 ALTFP_MULT Resource Utilization and Performance.........................................................................7-2 ALTFP_MULT Design Example: Multiplication of Double-Precision Format Numbers................7-3 ALTFP_MULT Design Example: Understanding the Simulation Waveform........................ 7-3 Parameters.....................................................................................................................................................7-4 ALTFP_MULT Signals................................................................................................................................7-5
Load more

Recommended publications
  • Bibliography
    Bibliography [1] M. Abramowitz, I.A. Stegun, Handbook of Mathematical Functions with Formulas, Graphs and Mathematical Tables. Applied Math. Series 55 (National Bureau of Standards, Washington, D.C., 1964) [2] R.C. Agarwal, J.C. Cooley, F.G. Gustavson, J.B. Shearer, G. Slishman, B. Tuckerman, New scalar and vector elementary functions for the IBM system/370. IBM J. Res. Dev. 30(2), 126–144 (1986) [3] H.M. Ahmed, Efficient elementary function generation with multipliers, in Proceedings of the 9th IEEE Symposium on Computer Arithmetic (1989), pp. 52–59 [4] H.M. Ahmed, J.M. Delosme, M. Morf, Highly concurrent computing structures for matrix arithmetic and signal processing. Computer 15(1), 65–82 (1982) [5] H. Alt, Comparison of arithmetic functions with respect to Boolean circuits, in Proceedings of the 16th ACM STOC (1984), pp. 466–470 [6] American National Standards Institute and Institute of Electrical and Electronic Engineers. IEEE Standard for Binary Floating-Point Arithmetic. ANSI/IEEE Standard 754–1985 (1985) [7] C. Ancourt, F. Irigoin, Scanning polyhedra with do loops, in Proceedings of the 3rd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP’91), Apr 1991 (ACM Press, New York, NY, 1991), pp. 39–50 [8] I.J. Anderson, A distillation algorithm for floating-point summation. SIAM J. Sci. Comput. 20(5), 1797–1806 (1999) [9] M. Andrews, T. Mraz, Unified elementary function generator. Microprocess. Microsyst. 2(5), 270–274 (1978) [10] E. Antelo, J.D. Bruguera, J. Villalba, E. Zapata, Redundant CORDIC rotator based on parallel prediction, in Proceedings of the 12th IEEE Symposium on Computer Arithmetic, July 1995, pp.
    [Show full text]
  • Instruction Set Reference, A-M
    Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 2A: Instruction Set Reference, A-M NOTE: The Intel 64 and IA-32 Architectures Software Developer's Manual consists of five volumes: Basic Architecture, Order Number 253665; Instruction Set Reference A-M, Order Number 253666; Instruction Set Reference N-Z, Order Number 253667; System Programming Guide, Part 1, Order Number 253668; System Programming Guide, Part 2, Order Number 253669. Refer to all five volumes when evaluating your design needs. Order Number: 253666-023US May 2007 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANT- ED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. INTEL PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS. Intel may make changes to specifications and product descriptions at any time, without notice. Developers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Improper use of reserved or undefined features or instructions may cause unpredictable be- havior or failure in developer's software code when running on an Intel processor. Intel reserves these fea- tures or instructions for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from their unauthorized use.
    [Show full text]
  • Numerical Computing
    Numerical computing How computers store real numbers and the problems that result Overview • Integers • Reals, floats, doubles etc • Arithmetical operations and rounding errors • We write: x = sqrt(2.0) – but how is this stored? L02 Numerical Computing 2 Mathematics vs Computers • Mathematics is an ideal world – integers can be as large as you want – real numbers can be as large or as small as you want – can represent every number exactly: 1, -3, 1/3, 1036237, 10-232322, √2, π, .... • Numbers range from - ∞ to +∞ – there is also infinite numbers in any interval • This not true on a computer – numbers have a limited range (integers and real numbers) – limited precision (real numbers) L02 Numerical Computing 3 Integers • We like to use base 10 – we only write the 10 characters 0,1,2,3,4,5,6,7,8,9 – use position to represent each power of 10 2 1 0 125 = 1 * 10 + 2 * 10 + 5 * 10 = 1*100 + 2*10 + 5*1 = 125 – represent positive or negative using a leading “+” or “-” • Computers are binary machines – can only store ones and zeros – minimum storage unit is 8 bits = 1 byte • Use base 2 1111101=1*26 +1*25 +1*24 +1*23 +1*22 +0*21 +1*20 =1*64 +1*32 +1*16 +1*8 +1*4 +0*2 +1*1 =125 L02 Numerical Computing 4 Storage and Range • Assume we reserve 1 byte (8 bits) for integers – minimum value 0 – maximum value 28 – 1 = 255 – if result is out of range we will overflow and get wrong answer! • Standard storage is 4 bytes = 32 bits – minimum value 0 – maximum value 232 – 1 = 4294967291 = 4 billion = 4G • Is this a problem? – question: what is a 32-bit operating
    [Show full text]
  • Floating-Point (FP) Numbers
    Floating-point (FP) numbers Computers need to deal with real numbers • Fractional numbers (e.g., 3.1416) • Very small numbers (e.g., 0.000001) • Very larger numbers (e.g., 2.7596 ×10 9) Components in a binary FP number • (-1) sign ×significand (a.k.a. mantissa )×2exponent • More bits in significand gives higher accuracy • More bits in exponent gives wider range A case for FP representation standard • Portability issues • Improved implementations ⇒ IEEE-754 CS/CoE0447: Computer Organization and Assembly Language University of Pittsburgh 12 Representing “floats” with binary We can add a “point” in binary notation: • 101.1010b • integral part is simply 5d • fractional part is 1 ×2-1 + 1×2-3 = 0.5 + 0.125 = 0.625 • thus, 101.1010b is 5.625d Normal form : shift “point” so there’s only a leading 1 • 101.1010b = 1.011010 × 22, shift to the left by 2 positions • 0.0001101 = 1.101 × 2-4, shift to the right by 4 positions • typically, we use the normal form (much like scientific notation) Just like integers, we have a choice of representation • IEEE 754 is our focus (there are other choices, though) CS/CoE0447: Computer Organization and Assembly Language University of Pittsburgh 13 1 Format choice issues Example floating-point numbers (base-10) • 1.4 ×10 -2 • -20.0 = -2.00 ×10 1 What components do we have? (-1) sign ×significand (a.k.a. mantissa )×2exponent Sign Significand Exponent Representing sign is easy (0=positive, 1=negative) Significand is unsigned (sign-magnitude) Exponent is a signed integer. What method do we use? CS/CoE0447:
    [Show full text]
  • Cross-Platform Issues with Floating-Point Arithmetics in C++
    Cross-Platform Issues With Floating-Point Arithmetics in C++ Günter Obiltschnig, Applied Informatics Software Engineering GmbH [email protected] ACCU Conference 2006 Abstract. The C++ standard does not specify a binary representation for the floating-point types float, double and long double. Although not required by the standard, the implementation of floating point arithmetic used by most C++ compilers conforms to a standard, IEEE 754-1985, at least for types float and double. This is directly related to the fact that the floating point units of modern CPUs also support this standard. The IEEE 754 standard specifies the binary format for floating point numbers, as well as the semantics for floating point operations. Nevertheless, the degree to which the various compilers implement all the features of IEEE 754 varies. This creates various pitfalls for anyone writing portable floating-point code in C++. These issues, and ways how to work around them, are the topic of this paper. 1 Introduction As with integer types, the C++ standard does not specify a storage size and binary representation for floating-point types. The standard specifies three floating point types: float, double and long double. Type double must provide at least as much precision as float, and long double must provide at least as much precision as double. Furthermore, the set of values of the type float must be a subset of the values of type double and the set of values of the type double must be a subset of the values of type long double. 2 IEEE 754 Floating Point Representation Although not required by the standard, the implementation of floating point arithmetic used by most C++ compilers conforms to a standard, IEEE 754-1985 [1], at least for types float and double1.
    [Show full text]
  • Floating-Point IP Cores User Guide
    Floating-Point IP Cores User Guide Last updated for Quartus Prime Design Suite: 16.1 Subscribe UG-01058 101 Innovation Drive 2016.12.09 San Jose, CA 95134 Send Feedback www.altera.com TOC-2 Contents About Floating-Point IP Cores........................................................................... 1-1 List of Floating-Point IP Cores...................................................................................................................1-1 Installing and Licensing IP Cores.............................................................................................................. 1-2 Design Flow.................................................................................................................................................. 1-3 IP Catalog and Parameter Editor................................................................................................... 1-3 Generating IP Cores (Quartus Prime Pro Edition).....................................................................1-6 Generating IP Cores (Quartus Prime Standard Edition)......................................................... 1-11 Upgrading IP Cores................................................................................................................................... 1-12 Migrating IP Cores to a Different Device................................................................................... 1-14 Floating-Point IP Cores General Features..............................................................................................1-16
    [Show full text]
  • 80387 Programmers Reference Manual 1987
    inter LITERATURE SALES ORDER FORM NAME: _________________________________________________ COMPANY: _______________________________________________ ADDRESS: _________________________________________________ CITY: _________________ STATE: ____ ZIP: _____ COUNTRY: _______________________________ PHONE NO.:('- __.....!- ___________________________ ORDER NO. TITLE QTY. PRICE TOTAL __ X ___ = _____ __ X ___ = _____ __ X ___ = _____ __ X ____ = _____ __ X ___ = _____ __ X ___ = _____ __ X ___ = _____ __ X ___ = _____ __ X ___ = _____ ___ X ___ = ______ Subtotal _____ Must Add Your Local Sales Tax ______ Must add appropriate postage to subtotal ------------!» Postage ______ (10% U.S. and Canada, 20% all other) Total _____ Pay by Visa, MasterCard, American Express, Check, Money Order, or company purchase order payable to Intel Literature Sales. Allow 2-4 weeks for delivery. o Visa 0 MasterCard 0 American Express Expiration Date _____ Account No. _______________________________ Signature: ______________________________ Mail To: Intel Literature Sales International Customers outside the U.S. and Canada P.O. Box 58130 should contact their local Intel Sales Office or Distributor Santa Clara, CA listed in the back of most Intel literature. 95052-8130 Call Toll Free: (800) 548-4725 for phone orders Prices good unli112/31/87. Source HB 80387 PROGRAMMER'S REFERENCE MANUAL 1987 Intel Corporation makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in this document nor does it make a commitment to update the information contained herein. Intel retains the right to make changes to these specifications at any time, without notice. Contact your local sales office to obtain the latest specifications before placing your order.
    [Show full text]
  • Floating Point - Wikipedia, the Free Encyclopedia Page 1 of 12 Floating Point
    Floating point - Wikipedia, the free encyclopedia Page 1 of 12 Floating point From Wikipedia, the free encyclopedia Floating-point is a numeral-interpretation system in which a string of digits (or bits) represents a real number. A system of arithmetic is defined that allows these representations to be manipulated with results that are similar to the arithmetic operations over real numbers. The representation uses an explicit designation of where the radix point (decimal point, or, more commonly in computers, binary point) is to be placed relative to that string. The designated location of the radix point is permitted to be far to the left or right of the digit string, allowing for the representation of very small or very large numbers. Floating-point could be thought of as a computer realization of scientific notation. The large dynamic range of floating-point numbers frees the programmer from explicitly encoding number representations for their particular application. For this reason computation with floating-point numbers plays a very important role in an enormous variety of applications in science, engineering, and industry, particularly in meteorology, simulation, and mechanical design. The ability to perform floating point operations is an important measure of performance for computers intended for such applications. It is measured in "MegaFLOPS" (million FLoating-point Operations Per Second), or Gigaflops, etc. World-class supercomputer installations are generally rated in Teraflops. Contents 1 Overview 1.1 Nomenclature 1.2 Alternative
    [Show full text]
  • University of Warwick Institutional Repository
    CORE Metadata, citation and similar papers at core.ac.uk Provided by Warwick Research Archives Portal Repository University of Warwick institutional repository: http://go.warwick.ac.uk/wrap A Thesis Submitted for the Degree of PhD at the University of Warwick http://go.warwick.ac.uk/wrap/3713 This thesis is made available online and is protected by original copyright. Please scroll down to view the document itself. Please refer to the repository record for this item for information to help you to cite it. Our policy information is available from the repository home page. Addressing Concerns in Performance Prediction: The Impact of Data Dependencies and Denormal Arithmetic in Scientific Codes by Brian Patrick Foley A thesis submitted to the University of Warwick in partial fulfilment of the requirements for admission to the degree of Doctor of Philosophy Department of Computer Science September 2009 Abstract To meet the increasing computational requirements of the scientific community, the use of parallel programming has become commonplace, and in recent years distributed applications running on clusters of computers have become the norm. Both parallel and distributed applications face the problem of predictive uncertainty and variations in runtime. Modern scientific applications have varying I/O, cache, and memory profiles that have significant and difficult to predict effects on their runtimes. Data-dependent sensitivities such as the costs of denormal floating point calculations introduce more variations in runtime, further hindering predictability. Applications with unpredictable performance or which have highly variable run- times can cause several problems. If the runtime of an application is unknown or varies widely, workflow schedulers cannot efficiently allocate them to compute nodes, leading to the under-utilisation of expensive resources.
    [Show full text]
  • Intel Architecture Software Developer's Manual
    Intel Architecture Software Developer’s Manual Volume 2: Instruction Set Reference NOTE: The Intel Architecture Software Developer’s Manual consists of three volumes: Basic Architecture, Order Number 243190; Instruction Set Reference, Order Number 243191; and the System Programming Guide, Order Number 243192. Please refer to all three volumes when evaluating your design needs. 1999 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Intel’s Intel Architecture processors (e.g., Pentium®, Pentium® II, Pentium® III, and Pentium® Pro processors) may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
    [Show full text]
  • C/C++ Language Extensions for Cell Broadband Engine Architecture
    C/C++ Language Extensions for Cell Broadband Engine Architecture Version 2.6 CBEA JSRE Series Cell Broadband Engine Architecture Joint Software Reference Environment Series August 25, 2008 ® © Copyright International Business Machines Corporation, Sony Computer Entertainment Incorporated, Toshiba Corporation 2002 - 2008 All Rights Reserved Printed in the United States of America August 2008 The following are trademarks of International Business Machines Corporation in the United States, or other countries, or both. IBM PowerPC IBM Logo PowerPC Architecture ibm.com Cell Broadband Engine is a trademark of Sony Computer Entertainment, Inc. Other company, product and service names may be trademarks or service marks of others. All information contained in this document is subject to change without notice. The products described in this document are NOT intended for use in applications such as implantation, life support, or other hazardous uses where malfunction could result in death, bodily injury or catastrophic property damage. The information contained in this document does not affect or change IBM product specifications or warranties. Nothing in this document shall operate as an express or implied license or indemnity under the intellectual property rights of IBM or third parties. All information contained in this document was obtained in specific environments, and is presented as an illustration. The results obtained in other operating environments may vary. THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED ON AN “AS IS” BASIS. In no event will IBM be liable for damages arising directly or indirectly from any use of the information contained in this document. IBM Systems and Technology Group 2070 Route 52, Bldg.
    [Show full text]
  • Sage 9.4 Reference Manual: Fixed and Arbitrary Precision Numerical Fields Release 9.4
    Sage 9.4 Reference Manual: Fixed and Arbitrary Precision Numerical Fields Release 9.4 The Sage Development Team Aug 24, 2021 CONTENTS 1 Floating-Point Arithmetic 1 1.1 Arbitrary Precision Real Numbers....................................1 1.2 Arbitrary Precision Floating Point Complex Numbers......................... 43 1.3 Arbitrary Precision Complex Numbers using GNU MPC........................ 65 1.4 Double Precision Real Numbers..................................... 79 1.5 Double Precision Complex Numbers.................................. 100 2 Interval Arithmetic 119 2.1 Arbitrary Precision Real Intervals.................................... 119 2.2 Real intervals with a fixed absolute precision.............................. 160 2.3 Field of Arbitrary Precision Complex Intervals............................. 166 2.4 Arbitrary Precision Complex Intervals.................................. 171 2.5 Arbitrary precision real balls using Arb................................. 184 2.6 Arbitrary precision complex balls using Arb.............................. 210 3 Exact Real Arithmetic 247 3.1 Lazy real and complex numbers..................................... 247 4 Indices and Tables 257 Python Module Index 259 Index 261 i ii CHAPTER ONE FLOATING-POINT ARITHMETIC Sage supports arbitrary precision real (RealField) and complex fields (ComplexField). Sage also provides two opti- mized fixed precision fields for numerical computation, the real double (RealDoubleField) and complex double fields (ComplexDoubleField). Real and complex double elements are
    [Show full text]