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Reference Manual Reference Manual REFERENCE MANUAL REFERENCE MANUAL ® Registered trademark of the Sperry Rand Corporation © 1960, 1962 • SPERRY RAND CORPORATION PREFACE The purpose of this manual is to provide a comprehensive source of information concerning the UNIVAC III System: its basic units, their performance, the performance of the system as a whole, and the in­ struction list. The manual is addressed to those who have a good general knowledge of electronic com­ puters and therefore can appreciate the significance of the uniquely powerful features of the system without detailed explanations or examples of the use of instructions or programming aids. Descriptions of software packages are available in separate publications. This manual consists of seven principal sections: a general description, five sections which describe the nature and use of each of the basic units, and appendices containing information on such subjects as modulo-3 checking and timing of multiplication and division. Each section is designed to convey essential information to the informed reader in complete but concise form. iii The system may be provided with either 9 or 15 lines of numeric data per minute or 700 128-character For years the goal of designers of electronic data­ HIGH·SPEED PROCESSING-4-microsecond mem­ lines of alphanumeric data per minute. processing equipment has been to achieve a system ory cycle. The system executes most instructions in index registers which automatically modify the the units of which could operate not only simul­ only 8 microseconds. In 12 milliseconds the UNIVAC operand address as part of the basic instruction DEPENDABILITY - The circuitry of the UNIVAC III taneously but also at their full rated speeds. III system can add 1000 12-digit numbers. Multi­ execution cycle-no additional time need be allo­ System is based on that proved in use in the famous plication and division are performed at correspond­ cated to operate the registers. Now, with the UNIVAC III System, this goal has been UNIVAC LARC, one of the fastest, most reliable attained. This system is capable of performing ingly high speeds. SYSTEMS MODULARITY-The UNIVAC III System computers ever built. The UNIVAC III System also calculations and data manipulations and operating contains many automatic self-checking features VERSATILE COMMAND STRUCTURE-The in­ can be smoothly and efficiently expanded by adding its peripherals at full speed, under the control of which ensure dependable operation. several concurrently running programs. structions of the UNIVAC III System can address up to four 8192-word core-storage modules to provide data directly or can indirectly address operands of storage for up to 32,768 words; up to 32 UNISERVO Briefly summarized here are some of the principal up to four 6-digit words, thus saving many program­ IlIA magnetic-tape units; and an extensive and A COMPREHENSIVE AND EFFICIENT PROGRAM· characteristics of the system which account for its ming steps and much time on operations such as versatile array of peripherals. MING SYSTEM-Every l]"NIVAC III System is pro­ unusual merit in general data-processing applications. sorting and table referencing. vided with an assembly system with macroinstruc­ SIMULTANEOUS OPERATIONS-As many as 13 tion facilities, routine generators, and the ability to HIGH-SPEED MAGNETIC TAPES-Numeric read­ Using multiword operands and field selection, in­ utilize program libraries-an executive monitoring write speed, 200,000 digits per second-alphanumeric structions operate directly upon fields which may on-line input-output operations can proceed in paral­ lel with each other and with operations of the Central system which controls simultaneous full-speed opera­ read-write speed, 133,000 characters per second. A range in size from a single bit, digit, or character tion of peripherals and concurrently running pro­ 3600-foot reel of tape can be rewound in 125 seconds. to 96 bits, 24 digits, or 16 characters, eliminating the Processor under the control of several concurrently running programs. grams-a powerful sort/merge generator-utility, Scatter-read and gather-write operations permit need for isolation of packed fields or separately proc­ service, and program-testing routines-an extensive direct transfer of magnetic-tape data to and from essing each word of multiword fields. The effect of HIGH.SPEED PERIPHERALS-High-Speed Reader COBOL compiler; and a FORTRAN compiler which nonadjacent areas of magnetic-core storage. This this is a large economy in programming and oper­ has great speed and is compatible with most other obviates the need for many data-transfers and thus ating time otherwise required for shifting, extracting, -700 cards a minute; Card-Punch Unit-300 cards FOR TRAN systems. saves large amounts of time and storage space. and data transfers. a minute; High-Speed Printer-922 128-character v IV CONTENTS GEN ERAL DESCRI PTION Central Processor I-I Input-Output Equipment 1-4 II CENTRAL PROCESSOR UNIVAC III Word 2-1 Programming Features 2-4 Automatic Program Interrupt 2-6 Control Unit 2-10 UNIVAC III Instruction List 2·13 Operator's Console 2-38 III TAPE SYSTEM Physical Characteristics 3-2 Operating Characteristics 3-3 Function Specifications 3-6 Interrupt Indicators 3-10 Execution of Function Specifications 3-12 Control Features 3-13 IV HIGH-SPEED READER Operating Characteristics 4-2 Function Specifications 4-7 Interrupt Indicators 4-9 Control Featu res 4-11 V CARD-PUNCH UNIT Operating Characteristics 5-2 Function Specifications 5-8 Interrupt Indicators 5-9 Control Features 5-9 VI HIGH-SPEED PRINTER Physical Characteristics 6-1 Operating Characteristics 6-2 Function Specifications 6-4 Interrupt Indicators 6-4 Control Features. 6-6 Vll APPENDICES A. Modulo-3 Checking B. Execution Time of Multiplication C. Execution Time of Division D. Decimal Operations on Non-Numeric Data E. Reading Nonstandard 80-Column Card Codes With Translation F. High-Speed Printer Timing G. Input-Output Equipment Specifications H. Fixed Memory Locations I. Instructions and Functions Specifications INDEX ix Vlll GENERAL DESCRIPTIDN A typical basic UNIVAC III System comprises a Central At the user's option, the processor may have either Processor with magnetic-core storage, a UNISERVO 9 or 15 index registers. It also may have an address­ IlIA tape system, a High-Speed Reader, a Card­ able clock. Punch Unit, and a High-Speed Printer. The basic system may be expanded to include up to 32 UNI­ MAGNETIC-CORE STORAGE SERVO IlIA tape units, a UNISERVO IlA tape system, The UNIVAC III magnetic-core storage consists of and a variety of peripheral units, as shown in ferrite cores arranged in horizontal planes 64 cores figure 1-1. wide by 64 long. Twenty-seven of these planes form a stack with a storage capacity of 4096 words; and two stacks form a memory module, which is the • CENTRAL PROCESSOR primary storage unit of the system. Each memory The UNIVAC III Central Processor consists of an module has a storage capacity of 8192 words. One, expandable magnetic-core storage, arithmetic and two, or three modules may be added, to increase the control units, and an operator's console and type­ core-storage capacity of the system to 16,384, writer. 24,576, or 32,768 words. GENERAL DESCRIPTION Central Processor The primary unit of information in the UNIVAC III Address Modification System is a fixed-length word consisting of 27 bits. Operand addresses are indexed automatically as part Twenty-four of these bits represent an instruction, of the UNIVAC III instruction cycle. As an instruction a control word, or data in alphanumeric, decimal, or is being set up for execution, the contents of one of binary format. The twenty-fifth bit represents the the index registers are used to modify the effective sign in a data word, and control information in an operand address by means of an adder separate from instruction or control word. The remaining two bits that of the arithmetic unit. By overlapping the index­ are used to check the accuracy of information trans­ ing step with other phases of the instruction cycle, fers and arithmetic operations. The memory cycle­ and by using the special adder, address modification selecting, reading, and regenerating the 27 bits of a is made a part of the basic instruction cycle and re­ word in core storage-is four microseconds. quires no additional time. Addresses also may be modified in the UNIVAC III ARITHMETIC UNIT System by means of indirect addressing. With in­ direct addressing, an instruction can specify the The arithmetic unit of the Central Processor per­ location in which the address of the operand is stored, forms the calculations and data manipulation called instead of specifying the operand address directly. for by the instructions. It contains an adder for This capability is valuable in sort-merge procedures, decimal and binary arithmetic operations, four one­ the manipulation of variable lines of coding, table­ word arithmetic registers, and additional circuitry handling routines, and other program functions that which provides a wide range of data-handling require flexible and efficient techniques of variable abilities. addressing. Data is processed in the arithmetic unit bit-parallel, Automatic Program Interrupt digit-serial. Because the digit rate through the arith­ metic unit is less than 0.5 microsecond per digit, the An important function of the control unit is to detect execution time for most instructions is only 8 micro­ special conditions in the system which require pro­ seconds: 4 microseconds to access the instruction, grammed or operator action outside of the program and 4 to access and process the operand. in progress. When any of these conditions is detected, the program in progress is interrupted automatically. The four arithmetic registers may be used in nearly To provide for subsequent re-entry into the inter­ all data-manipulation instructions to process oper­ rupted program, the point at which interrupt occurs ands of from one to four words in length.
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