United States Patent (10) Patent No.: US 7,190,052 B2 Lindgren (45) Date of Patent: Mar
US0071900.52B2 (12) United States Patent (10) Patent No.: US 7,190,052 B2 Lindgren (45) Date of Patent: Mar. 13, 2007 (54) SEMICONDUCTOR DEVICES WITH OXIDE 5,516,721 A 5/1996 Galli et al. COATINGS SELECTIVELY POSITONED 5,683,946 A 1 1/1997 Lu et al. OVER EXPOSED FEATURES INCLUDING 5,776,829 A 7/1998 Homma et al. SEMCONDUCTOR MATERAL 6,022,814 A 2/2000 Mikoshiba et al. 6,045,877 A 4/2000 Gleason et al. (75) Inventor: Joseph T. Lindgren, Boise, ID (US) 6,174,8246,130,116 AB1 10/20001/2001 MichaelSmith et etal. al. 6, 197,110 B1 3/2001 Lee et al. (73) Assignee: Micron Technology, Inc., Boise, ID 6,251,753 B1 6/2001 Yeh et al. (US) (*) Notice: Subject to any disclaimer, the term of this (Continued) patent is extended or adjusted under 35 OTHER PUBLICATIONS U.S.C. 154(b) by 0 days. Schreiber, S.J. et al., “Low Temperature Deposition of Microcrystal line Silicon For Thin Film Transistors,' CUED Electronic Devices (21) Appl. No.: 10/454.256 and Materials Group, http://www2.eng.cam.ac.uk/~www-edm/ (22) Filed: Jun. 3, 2003 projects/lowtempdepf1.htm, prior to Sep. 2000, 2 pages. e as (Continued) (65) Prior Publication Data Primary Examiner T. N. Quach US 2004/OO33682 A1 Feb. 19, 2004 (74) Attorney, Agent, or Firm TraskBritt Related U.S. Application Data (57) ABSTRACT (62) Division of application No. 10/218.268, filed on Aug. 13, 2002, now Pat. No. 6,593,221. A semiconductor device structure includes a passivation layer through which only non-silicon-comprising structures (51) Int.
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