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Pentium® Pro Processor with 1 Mb L2 Cache at 200 Mhz E PENTIUM® PRO PROCESSOR WITH 1 MB L2 CACHE AT 200 MHZ Large integrated cache for Separate dedicated external system multiprocessing systems bus, and dedicated internal full-speed Binary compatible with applications cache bus running on previous members of the 8 KB/8 KB separate data and Intel microprocessor family instruction, nonblocking, level one Optimized for 32-bit applications cache running on advanced 32-bit operating Data integrity and reliability features systems include ECC, Fault Analysis/Recovery, Dynamic Execution microarchitecture and Functional Redundancy Checking Single package includes Pentium® Pro Fits Intel Pentium Pro processor processor CPU, cache and system bus 387-Pin Socket 8 interface Meets All AC timings and levels of Pentium Pro processor Scaleable up to four processors and 50% lighter package vs. ceramic 4 GB memory Scratch resistant anodized aluminum heat spreader Designed for LIF and ZIF sockets The Pentium® Pro processor with 1 MB L2 cache is designed for high-end 4 way multiprocessor capable server systems. The Pentium Pro processor with 1 MB L2 cache delivers more performance than previous generation processors through an innovation called Dynamic Execution. This is the next step beyond the superscalar architecture implemented in the Pentium processor. This makes possible the advanced 3D visualization and interactive capabilities required by today’s high-end commercial and technical applications and tomorrow’s emerging applications. The Pentium Pro processor with 1 MB L2 cache also includes advanced data integrity, reliability, and serviceability features for mission critical applications. Information in this document is provided solely to enable use of Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel's Terms and Conditions of Sale for such products. Information contained herein supersedes previously published specifications on these devices from Intel. © INTEL CORPORATION 1995 January 1998 Order Number: 243570-001 1/30/98 6:34 PM 24357001.doc INTEL CONFIDENTIAL (until publication date) E PENTIUM® PRO PROCESSOR WITH 1 MB L2 CACHE AT 200 MHZ Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The Pentium® Pro processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-4725 or by visiting Intel’s website at http://www.intel.com Copyright © Intel Corporation 1996, 1997. * Third-party brands and names are the property of their respective owners. 2 1/30/98 6:34 PM 24357001.doc INTEL CONFIDENTIAL (until publication date) E PENTIUM® PRO PROCESSOR WITH 1 MB L2 CACHE AT 200 MHZ CONTENTS PAGE PAGE 5.1.2. MEASURING CASE 1.0. INTRODUCTION ............................................... 7 TEMPERATURE ..................................32 1.1. Terminology.................................................... 7 5.1.3. THERMAL RESISTANCE.....................33 1.2. References..................................................... 7 5.2. Thermal Analysis..........................................34 2.0. ELECTRICAL SPECIFICATIONS .................... 8 5.2.1. TYPICAL PASSIVE HEAT SINK DESIGNS..............................................34 2.1. The Pentium® Pro Processor Bus 5.2.2. TABLES AND CURVES FOR and VREF ...................................................... 8 PASSIVE HEAT SINKS VS. AIR 2.2. Power Management: Stop Grant and Auto FLOW RATES ......................................36 HALT.............................................................. 9 5.2.3. FAN HEAT SINK DESIGNS .................37 2.3. Power and Ground Pins................................. 9 5.2.4. EFFECT OF THERMAL GREASE AND 2.4. Decoupling Recommendations ...................... 9 PEDESTAL SIZE ON THERMAL 2.4.1. GTL+ DECOUPLING............................ 10 PERFORMANCE..................................37 2.4.2. PHASE LOCK LOOP (PLL) DECOUPLING...................................... 10 6.0. MECHANICAL SPECIFICATIONS.................38 2.5. BCLK Clock Input Guidelines....................... 10 6.1. Pinout ...........................................................42 2.5.1. SETTING THE CORE CLOCK TO 6.2. Introduction of Flatness................................55 BUS CLOCK RATIO............................. 11 6.3. Critical Zone and Pedestal Area ..................55 2.6. Voltage Identification.................................... 13 6.3.1. BACKPLATE PRESSURE 2.7. JTAG Connection......................................... 13 SPECIFICATION..................................57 2.8. Signal Groups .............................................. 13 6.4. Heat Sink Design Recommendations ..........57 2.8.1. ASYNCHRONOUS VS. 6.4.1. FAN HEAT SINK...................................57 SYNCHRONOUS................................. 14 6.5. Lid Strength Specification.............................58 2.9. PWRGOOD.................................................. 14 6.6. Coplanarity Specification..............................58 2.10. THERMTRIP# ............................................ 16 6.7. Predicted Storage Failure Rates..................59 2.11. Unused Pins............................................... 16 A.0. ALPHABETICAL LISTING OF SIGNALS .....60 2.12. Maximum Ratings ...................................... 16 A.1. A[35:3]# (I/O) ...............................................60 2.13. DC Specifications....................................... 17 A.2. A20M# (I) .....................................................60 2.14. GTL+ Bus Specifications ........................... 20 A.3. ADS# (I/O) ...................................................61 2.15. AC Specifications....................................... 20 A.4. AERR# (I/O).................................................62 3.0. GTL+ INTERFACE SPECIFICATION............. 30 A.5. AP[1:0]# (I/O)...............................................62 A.6. ASZ[1:0]# (I/O).............................................62 4.0. 3.3 V TOLERANT SIGNAL QUALITY SPECIFICATIONS .......................................... 30 A.7. ATTR[7:0]# (I/O) ..........................................63 4.1. Overshoot/Undershoot Guidelines............... 30 A.8. BCLK (I) .......................................................63 4.2. Ringback Specification................................. 31 A.9. BE[7:0]# (I/O)...............................................63 4.3. Settling Limit Guideline................................. 32 A.10. BERR# (I/O)...............................................63 A.11. BINIT# (I/O) ...............................................64 5.0. THERMAL SPECIFICATIONS........................ 32 A.12. BNR# (I/O).................................................64 5.1. Thermal Parameters .................................... 32 A.13. BP[3:2]# (I/O).............................................65 5.1.1. AMBIENT TEMPERATURE.................. 32 A.14. BPM[1:0]# (I/O)..........................................65 3 1/30/98 6:34 PM 24357001.doc INTEL CONFIDENTIAL (until publication date) E PENTIUM® PRO PROCESSOR WITH 1 MB L2 CACHE AT 200 MHZ A.15. BPRI# (I).................................................... 65 FIGURES A.16. BR0#(I/O), BR[3:1]# (I).............................. 65 Figure 1. Pentium® Pro Processor with 1 MB A.17. BREQ[3:0]# (I/O) ....................................... 66 L2 Cache Block Diagram......................8 A.18. D[63:0]# (I/O)............................................. 66 Figure 2. GTL+ Bus Topology...............................8 A.19. DBSY# (I/O)............................................... 66 Figure 3. Transient Types ...................................10 A.20. DEFER# (I) ................................................ 67 Figure 4. Timing Diagram of Clock Ratio Signals ................................................12 A.21. DEN# (I/0).................................................. 67 Figure 5. Example Schematic for Clock Ratio A.22. DEP[7:0]# (I/O) .......................................... 67 Pin Sharing .........................................12 A.23. DID[7:0]# (I/O) ........................................... 68 Figure 6. PWRGOOD Relationship at A.24. DRDY# (I/O)
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