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A Wide-Band RF Front-End with Linear Active Notch Filter for Mobile RMO2B-5 A Wide-Band RF Front-End with Linear Active Notch Filter for Mobile TV Applications Seung Hwan Jung, Kang Hyuk Lee, Young Jae Lee1, Hyun Kyu Yu1, Yun Seong Eo Radio Frequency Circuits and Systems Laboratory Kwangwoon University, Seoul Korea 1Electronics and Telecommunications Research Institute (ETRI), Daejeon Korea Abstract — This paper presents a wide-band RF front-end inductor has a poor linearity and cannot withstand the with linear active notch filter covering both T-DMB and strong GSM interferer even with the external GSM band DVB-H. A single to differential converter with the low amplitude/phase error and 6dB step RF VGA using the rejection SAW filter. To overcome these drawbacks, a capacitor are implemented. Also, highly linear and Q- newly proposed linear Q-enhanced active notch filter is enhanced tunable active inductor is proposed. The linear presented in this paper. In order to obtain a high linearity active notch filter rejects GSM band up to 23dB and achieves of the active inductor, the MGTR (Multiple Gated 20dB linearity improvement. The RF front-end is fabricated Transistor) topology is adopted to the gyrator’s trans- on 90nm CMOS technology and consumes 29.7mW. conductor cell and push-pull type negative resistor circuit is also used, which maintain the constant inductance and Index Terms — Wide-band LNA, Single to differential converter, High linear active inductor, Notch filter, CMOS. quality factor in spite of very strong GSM input interferer. I. INTRODUCTION II. THE PROPOSED ARCHITECTURE Nowadays, the mobile TV markets such as Terrestrial- Fig. 1 illustrates the proposed wide-band RF front-end Digital Multimedia Broadcasting (T-DMB) in Korea and with linear active notch filter. The RF front-end consists Digital Broadcasting Handheld (DVB-H) in Europe have of the wide-band noise canceling LNA, the low been growing rapidly in the aid of explosive interest in amplitude/phase error single to differential (S/D) watching TV with very small handheld device. Up to date, converter, the 6dB step RF VGA, and the linear active the conventional CMOS receiver chips are realized in the notch filter. The Integrated S/D converter acts as an off- direct conversion or the low IF receiver architectures and chip transformer with 3bit gain control of 2dB step. each band occupies a separated narrow band RF receiver Additionally, the RF buffer which is not shown in Fig. 1 is chain [1]. Contrary to the previous works, a single chain also included for the measurement. wide-band RF front-end applicable to digital RF receiver architecture is designed in this work for the dual mobile TV bands. Recently, to handle wide-band RF input signal, many literatures have been addressing to the noise canceling LNA [2]. In the digital RF receiver, the gain control range (more than 100dB) of receiver should be covered only in RF front-end and ADC stage due to the absence of very large gain control BBA. In our digital RF receiver, the allocated dynamic range of ADC is 43dB, which corresponds to about 7bits, therefore, the required gain dynamic range of RF front-end is more than 57dB. In order to achieve large Fig. 1. Block diagram of the RF front-end. dynamic range and accurate gain step, the RF VGA is realized using capacitor divider and switched gm stage. Apart from the dynamic range issue, the strong in-band or III. THE DESIGN OF RF FRONT-END out-band interference may come into the receiver front- A. Wide-band noise canceling LNA end due to wide-band characteristics. Therefore, a tunable RF notch filter with the active inductor is adopted to reject Fig. 2 shows the schematic of the designed wide-band the strong interferer such as the undesired GSM signal CMOS noise canceling LNA and how to achieve noise around 900MHz. However, the conventional active cancellation, simultaneously. 978-1-4244-6241-4/978-1-4244-6242-1/ 978-1-4244-6243-8/10/$26.00 © 2010 IEEE 135 2010 IEEE Radio Frequency Integrated Circuits Symposium VDD VDD Lext Signal (Added) RL2 RL1 M3 Noise (Cancelled) M2 Input M1 : CS1 stage M1 M2 : CG stage Lg M3 : CS3 stage (Auxiliary amp.) Fig. 2. Schematic of the noise canceling LNA Fig. 3. Wide-band single to differential converter Similar to a previously reported the noise canceling As shown in Fig. 3, the capacitor CD compensates LNA [2], the input signal (solid line) goes through two parasitic capacitance between drain and source of M5. paths of common-gate (CG) and common-source (CS) Therefore, the input small signal can be divided equally amplifier, and is combined constructively at the output. through the parasitic capacitances (Cgs) of M1 and M2 at Whereas, the channel thermal noise occurring at CG stage high frequency region and amplitude/phase imbalance would be subtracted at the output node, since the output caused parasitic mismatches can be minimized. In the noise signal through two paths (dotted line) is out of phase wide-band circuit design, the parasitic drain-gate feedback to each other. The noise factor of designed LNA can be capacitance is the most significant limitation such as a obtained as follows with the assumption of low frequency second CS differential stage. This parasitic capacitance operation. can be reduced significantly by inserting feedback capacitor, CF through M3’s gate to M4’s drain vice versa γγ2 =+4gdo2 (gR-g m1 s m3 R L2 ) +4(g do1 +g do3 ) [3]. In second stage, the frequency response will be F1 2 . (1) G(gRsm1s +g m3L2 R ) enlarged since the zero pole of output impedance can be boosted as large as CF and the S/D converter has wide- where γ is a coefficient of channel current noise, gdo1 and band property from low frequency region to 1GHz with g are drain-source conductance of M1 and M3 at zero do3 the aid of adjusting CF properly. V , R and R are load resistor of CG and CS stage and DS L1 L2 C. RF VGA with capacitor divider Gs is the source admittance. If we set gm1Rs = gm3RL2 for noise cancellation, (1) can be minimized simultaneously R-2R ladder attenuation is a well known circuit with wide-band input matching property. topology to implement the RF VGA. However, R-2R In order to obtain a broad-band response, the shunt ladder has drawbacks such as noise degradation due to the peaked load is employed for the output load using a resistors [4]. In this paper, the designed RF VGA using resistor RL1 and an off-chip inductor. Only with the help of capacitor divider consists of six differential trans- resistor load, the gain cannot be sufficient to meet the conductance stages and capacitive voltage divider instead receiver NF requirement in spite of resistor’s wide-band of resistive one. A capacitor divider which substitutes 2C- characteristic. Finally, in order to obtain low gain mode, C ladder of RF VGA provides 6dB gain control per one there is an additional through path switched by MOS Gm stage switching. Total 30dB gain range is achieved transistor between input and output of LNA, which is not with six identical Gm stages and only one Gm stage is shown in Fig. 2. enabled at a time. The resistive load is used to provide flat B. Wide-band Single to differential converter frequency response from 170MHz to 860MHz (T-DMB and DVB-H band). A digital control section decodes a 6bit The proposed S/D converter consists of two amplifier gain control from 12dB to -18dB with 6dB gain step. stage. The first stage converts a single ended signal to differential one and the following fully differential stage D. Linear Q-enhanced active notch filter with feedback capacitor, CF, improve frequency response In order to reject the strong interferer such as GSM of S/D converter. Also, 3 bit gain control with 2dB step is band, the RF front-end requires a linear LC notch filter. included at the second stage load, RL with switched The LC notch filter which can be applicable to GSM band resistor array. should be implemented around 900MHz and the 136 inductance of inductor should be as large as hundreds nH to obtain a reasonable rejection property. It is difficult to realize hundreds nH inductance as on-chip inductor, therefore, an active inductor which can obtain high inductance and quality factor is needed. Generally, the active inductor is realized as the gyrator-C structure in RF frequency region [6]. The Gm cell of gyrator-C and its small signal equivalent circuit are illustrated in Fig. 4. (a) Fig. 4. Gyrator-C and its small signal circuit The gyrator-C can be represented equivalently by RLC (b) network shown in Fig. 4. The equivalent inductance of the active inductor and other parameters are as follows; Fig. 5. (a) Conventional gm cell [6] (b) Proposed linear Q- enhanced g cell C11 m R=r,po2p CC,L== 2,. R= s (2) ggm1 m2 gg m1 m2r o1 where gm1,2 is trans-conductance of the Gm1,2 cell and Rs is IV. EXPERIMENT RESULTS parasitic resistance of the active inductance. Previously reported active inductors [5], [6] by gyrator- The designed RF front-end was implemented in a C and Q-enhanced negative g circuits have defects that standard 90nm RF CMOS technology. Fig. 6 shows the m chip micro-photograph, which has an active area of the gm and L can be varied drastically as the input signal increases. Thus, a resonant frequency (1/√LC) of the 2270um x 650um including pad frame. notch filter using the active inductor is shifted unexpectedly.
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