(12) Patent Application Publication (10) Pub. No.: US 2004/0069991A1 Dunn Et Al
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US 200400699.91A1 (19) United States (12) Patent Application Publication (10) Pub. No.: US 2004/0069991A1 Dunn et al. (43) Pub. Date: Apr. 15, 2004 (54) PEROVSKITE CUPRATE ELECTRONIC (52) U.S. Cl. ................................................................ 257/75 DEVICE STRUCTURE AND PROCESS (75) Inventors: Gregory Dunn, Arlington Heights, IL (57) ABSTRACT (US); Robert Croswell, Hanover Park, IL (US); Jeffrey Petsinger, Wayne, IL (US) High quality epitaxial layers of monocrystalline materials (26) can be grown overlying monocrystalline Substrates (22) Correspondence Address: Such as large Silicon wafers by forming a compliant Substrate OBLON SPIVAK MCCLELLAND MAIER & for growing the monocrystalline layers. An accommodating NEUSTADT buffer layer (24) comprises a layer of monocrystalline oxide 1755JEFFERSON DAVIS HIGHWAY Spaced apart from a Silicon wafer by an amorphous interface FOURTH FLOOR layer (28) of silicon oxide. The amorphous interface layer ARLINGTON, VA 2.2202 (US) dissipates Strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any (73) Assignee: MOTOROLA, INC., Schaumburg, IL lattice mismatch between the accommodating buffer layer (21) Appl. No.: 10/267,692 and the underlying Silicon Substrate is taken care of by the amorphous interface layer. Some preferred electronic (22) Filed: Oct. 10, 2002 devices are described that use a layer or pattern of a perovskite cuprate (2125, 2305, 2310, 2315,2405) such as Publication Classification YBa-Cu-O, (YBCO) or Y, Pr, Ba-Cu-O, (YPBCO, 0<x<1) over a buffer layer (2120) of lanthanum strontium (51) Int. Cl. .................................................. H01L 29/04 aluminum tantalate (LSAT). Patent Application Publication Apr. 15, 2004 Sheet 1 of 10 US 2004/0069991 A1 At A G 3 Patent Application Publication Apr. 15, 2004 Sheet 2 of 10 US 2004/0069991 A1 42 AfA.G.. 4 LATTICE MISMATCH Patent Application Publication Apr. 15, 2004 Sheet 3 of 10 US 2004/0069991 A1 COUNTS/S 10000 1000 o STO(200) 100 STO(100) CoAs(200) A I Wy"My th s I | byl Af7 G. 27 Patent Application Publication Apr. 15, 2004 Sheet 4 of 10 US 2004/0069991 A1 COUNTS/S ". t y"y Patent Application Publication Apr. 15, 2004 Sheet 5 of 10 US 2004/0069991 A1 AfZ G. Z3 At 7 G. 74 Patent Application Publication Apr. 15, 2004 Sheet 6 of 10 US 2004/0069991 A1 1022 1024 O26 ( 108C ISF D El No. 1104 1106 1106 1104 110 9 AZG. Zaf 1022 1024 1026 2)122 124H 125 1114 K/2zz, N.NY H/ ?t / NY logC III at\ El 1104 1106 1120 1102 1118 1106 1104 110 AZG. Zes 1026 1022 1024 132 124 —? 1EN \'Til I is no is 1104 1106 112O 1102 1118 1106 1104 11O Patent Application Publication Apr. 15, 2004 Sheet 7 of 10 US 2004/0069991 A1 144 148 1022 1O24 O26 132 F/ \- 146 1122 142 1122 124 — E/ENY 110 Odi / IWC is more 1104 1106 12 102 1118 1106 110 9 AZG. Zs 1022 1024 1026 1. 1104 1106 112O 1102 1118 1106 1104 110 Patent Application Publication Apr. 15, 2004 Sheet 8 of 10 US 2004/0069991 A1 22O N N N N Patent Application Publication Apr. 15, 2004 Sheet 9 of 10 US 2004/0069991 A1 221 O - 2205 -2130 - 2125 -2110 2105 22OO AvAG 22 2305 2315 231 O -2110 2105 23OO At ZG 2.3 Patent Application Publication Apr. 15, 2004 Sheet 10 of 10 US 2004/0069991 A1 US 2004/0069991 A1 Apr. 15, 2004 PEROWSKITE CUPRATE ELECTRONIC DEVICE and lattice-matched to Superconducting STRUCTURE AND PROCESS YBa-Cu-O,(YBCO) or Y, Pr, Ba-Cu-O, (YPBCO, 0<x<1). STO or BSTO is not an ideal material to use to FIELD OF THE INVENTION achieve good lattice matching with high temperature Super conducting materials such as YBCO and YPBCO. Lantha 0001. This invention relates generally to electronic struc num aluminate (LAO) is a widely-used material on which to tures and devices and to a method for their fabrication, and grow YBCO layers. Although LAO may be acceptable in more specifically to Semiconductor Structures and devices Some Situations, it presents Several disadvantages. Its lattice and to the fabrication and use of Semiconductor Structures, constant, 3.80A, is 1.7% mismatched to YBCO (3.85 A); the devices, and integrated circuits that include a monocrystal StreSS induced can be a problem for the brittle Superconduc line material layer comprised of Semiconductor material, tor material. LAO is also Susceptible to twinning, which can compound Semiconductor material, and/or other types of corrupt the crystallinity of the overlying YBCO upon cool material Such as metals and non-metals. ing after growth. Finally, LAO is 3.3% lattice-mismatched to STO or BSTO, which makes the epitaxial growth of high BACKGROUND OF THE INVENTION quality tunable Superconductor devices more difficult. 0002. A candidate technology for sub-50 nm channel 0006 Accordingly, a need exists for a semiconductor length transistors is the Mott field-effect transistor, under Structure that provides a thin, high quality monocrystalline investigation at IBM Watson Research Center. U.S. Pat. No. film or layer that is closely lattice matched with cuprates 6,333,543 describes Such a device fabricated on a strontium such as YBCO and YPBCO and can be grown over a large, titatanate (STO) single crystal substrate. A Mott insulator low cost monocrystalline Substrate, and for a proceSS for perovskite oxide such as the cuprates La CuO or Y making Such a structure. In other words, there is a need for x)Prs Ba-Cu-O,(YBCO) is used for p-type channel layers, providing the formation of a monocrystalline SubStrate that and the perovskite cuprate NdCuO is used for n-type is compliant with a high quality monocrystalline cuprate channel layers. A perovskite oxide Such as STO is used as layer So that true two-dimensional growth can be achieved the gate oxide. Under an applied gate field, the Mott insu for the formation of quality Semiconductor, Superconductor, lator becomes conducting. The Mott FET has a basic struc and metal-insulator transition Structures, devices and inte ture and function that is similar to a MOSFET, but the device grated circuits. dimensions are limited only by the methods available for patterning, and Scaling to below 30 nm is possible. BRIEF DESCRIPTION OF THE DRAWINGS 0003) The Mott FET faces two fundamental barriers to practical implementation. First, the use of very high cost 0007. The present invention is illustrated by way of STO substrates, which are available only in very small example and not limitation in the accompanying figures, in diameters (2 inches), imposes a severe limit on manufac which like references indicate Similar elements, and in turability and cost competitiveness. Second, the perfor which: mance of the Mott FET is strongly dependent on the 0008 FIGS. 1, 2, and 3 illustrate schematically, in cross epitaxial quality of the channel layer. The highest degree of Section, device Structures in accordance with various long range order and the lowest density of imperfections is embodiments of the invention; required. Lattice mismatch (>2.5%) when STO is used under 0009 FIG. 4 illustrates graphically the relationship a cuprate such as YBCO will result in strain in the YBCO between maximum attainable film thickneSS and lattice layer, causing defects to form and thus degrading device mismatch between a host crystal and a grown crystalline performance. overlayer; 0004 Planar microstrip high temperature Superconductor circuits Such as resonators, filters, and phase-shifting circuits 0010 FIG. 5 illustrates a high resolution Transmission are related to Mott transistors by benefiting from the use of Electron Micrograph of a structure including a monocrys a high quality epitaxial layer of a cuprate. Such planar talline accommodating buffer layer; microStrip high temperature Superconductor circuits are very 0011 FIG. 6 illustrates an X-ray diffraction spectrum of attractive for high performance, low noise, low insertion loSS a structure including a monocrystalline accommodating communication Systems, because they offer lower conductor buffer layer; losses compared to conventional conductors. Quality factors in the tens of thousands have been reported. Highly Selective 0012 FIG. 7 illustrates a high resolution Transmission bandpass filters with steep skirts, insertion loss under 0.3 dB, Electron Micrograph of a structure including an amorphous and 60 dB out of band rejection (at 5 MHz for a 1.8 GHz oxide layer; center frequency) have been demonstrated and are candidate 0013 FIG. 8 illustrates an X-ray diffraction spectrum of receive filters for base transceiver stations of future mobile a structure including an amorphous oxide layer; communication systems such as UMTS that will face strong interference problems. Combining high temperature Super 0014 FIGS. 9-12 illustrate schematically, in cross-sec conductors with tunable dielectrics (i.e., dielectrics with tion, the formation of a device Structure in accordance with field-dependent permittivity) Such as Strontium titanate another embodiment of the invention; (STO) or barium strontium titanate (BSTO) would allow 0.015 FIGS. 13 and 14 illustrate schematically, in cross high performance, tunable microwave devices. Section, device Structures that can be used in accordance 0005. A manufacturing challenge for high temperature with various embodiments of the invention; Superconductors is the need for an inexpensive, large format, 0016 FIGS. 15-19 include illustrations of cross-sectional Single crystal Substrate that is chemically compatible with Views of a portion of an integrated circuit that includes a US 2004/0069991 A1 Apr. 15, 2004 compound Semiconductor portion, a bipolar portion, and a and the growing accommodating buffer layer by the oxida MOS portion in accordance with what is shown herein; tion of substrate 22 during the growth of layer 24. The 0017 FIG. 20 shows a cross section diagram of the amorphous intermediate layer Serves to relieve Strain that structure of a Mott field effect transistor (FET), in accor might otherwise occur in the monocrystalline accommodat dance with one embodiment of the present invention.