The Applicability of Traditional Protection Methods to Lines Emanating from VSC-HVDC Interconnectors and a Novel Protection Principle

energies

Article The Applicability of Traditional Protection Methods to Lines Emanating from VSC-HVDC Interconnectors and a Novel Protection Principle

Shimin Xue 1,*, Jingyue Yang 1, Yanxia Chen 2, Cunping Wang 2, Zhe Shi 1, Miao Cui 1 and Botong Li 1

1 Key Laboratory of Smart Grid of Ministry of Education, Tianjin University, Tianjin 300072, China; [email protected] (J.Y.); [email protected] (Z.S.); [email protected] (M.C.); [email protected] (B.L.) 2 Beijing Electric Power Corporation, Beijing 100075, China; [email protected] (Y.C.); [email protected] (C.W.) * Correspondence: [email protected]; Tel.: +86-138-2063-4745

Academic Editor: Gabriele Grandi Received: 10 April 2016; Accepted: 17 May 2016; Published: 25 May 2016

Abstract: Voltage source converter (VSC)-based high voltage direct current (VSC-HVDC) interconnectors can realize accurate and fast control of power transmission among AC networks, and provide emergency power support for AC networks. VSC-HVDC interconnectors bring exclusive fault characteristics to AC networks, thus influencing the performance of traditional protections. Since fault characteristics are related to the control schemes of interconnectors, a fault ride-through (FRT) strategy which is applicable to the interconnector operating characteristic of working in four quadrants and capable of eliminating negative-sequence currents under unbalanced fault conditions is proposed first. Then, the additional terms of measured impedances of distance relays caused by fault resistances are derived using a symmetrical component method. Theoretical analysis shows the output currents of interconnectors are controllable after faults, which may cause malfunctions in distance protections installed on lines emanating from interconnectors under the effect of fault resistances. Pilot protection is also inapplicable to lines emanating from interconnectors. Furthermore, a novel pilot protection principle based on the ratio between phase currents and the ratio between negative-sequence currents flowing through both sides is proposed for lines emanating from the interconnectors whose control scheme aims at eliminating negative-sequence currents. The validity of theoretical analysis and the protection principle is verified by PSCAD/EMTDC simulations.

Keywords: VSC-HVDC interconnector; fault ride through (FRT); distance protection; pilot protection; fault resistance

1. Introduction Based on self-turn-off devices such as insulated gate bipolar transistors (IGBTs), voltage source converters (VSCs) are capable of independent control of active and reactive power in four quadrants of the P-Q plane [1–3]. With strong controllability and high reliability, the VSC-based high voltage direct current (VSC-HVDC) technology has broad application prospects in the integration of large-scale renewable sources, interconnection of AC networks, power supply of islands, long-distance power transmission and so on [3,4]. Interconnection of high voltage networks via a VSC-HVDC interconnector can realize power supply among different AC networks without increasing short-circuit currents, which is helpful to make full use of the power supply capacity of each network and enhance the reliability of power systems. Under normal conditions, the interconnector can balance loads in different networks, thus improving the efﬁciency of the system. When an AC network is under abnormal or

Energies 2016, 9, 400; doi:10.3390/en9060400 www.mdpi.com/journal/energies Energies 2016, 9, 400 2 of 27 fault conditions, the interconnector can provide dynamic reactive power and voltage support, thus enhancing the robustness of the power system [5]. After clearance of faults, fast and effective power support can be achieved among different networks to avoid cascading failures in power systems. Based on the advantages above, the demonstration project for interconnection of the Chang-Cheng and Cheng-Shun-Chao 220 kV AC networks via a VSC-HVDC interconnector will be put into operation in 2018. Therefore, it is very important to study on the applicability of traditional protections to lines in AC networks connected with VSC-HVDC interconnectors and the improvements in protection, especially new protection principles for lines emanating from VSC-HVDC interconnectors. When a fault happens in an AC network connected with an interconnector, the interconnector will rapidly take corresponding measures according to the severity of the fault. The output characteristics of the interconnector after a fault are related to the operation state before the fault, fault location, fault type, fault resistance, and the control scheme of the interconnector, which are greatly different from those of traditional voltage sources composed of synchronous generators (SGs). There are studies on fault characteristics and protection of AC lines connected with a line-commutated current source converter (CSC)-based HVDC system [6–10]. However, the trigger angle of the thyristor is the only controllable variable in CSCs, and CSCs can’t realize independent control of reactive and active power. The CSC at the inverter station of a CSC-HVDC system is prone to commutation failures and transient power conversion due to faults in the AC network, and the magnitude and phase angle of the output currents of the CSC are uncontrollable in this situation. During faults, large amounts of inter-harmonic components are injected into the AC network from the CSC-HVDC system, which have an undesirable influence on the performance of relay protections based on the Fourier algorithm [7]. The direct current control method is usually employed in VSCs, and both the magnitude and phase angle of output currents of VSCs are controllable after faults. Compared with CSCs, VSCs can mitigate the harmonics in AC currents, especially if multilevel topologies are used [11]. Therefore, power transmission will not be interrupted unless the voltage of the interconnector AC bus falls to zero, which means VSC-HVDC interconnectors have fault ride-through (FRT) ability. In short, the control scheme and post-fault output characteristics of VSCs differ greatly from those of CSCs. The analysis and conclusions that distance protection, directional comparison pilot protection and differential protection are not applicable in [7–10] cannot be directly applied to the lines emanating from VSC-HVDC interconnectors. The influence of inverter-interfaced distributed generators (IIDGs) on distance protection of the AC lines directly emanating from the inverters is investigated in [12], and solutions are proposed in [13]. However, VSC-HVDC interconnectors and IIDGs are different in terms of the operation range and FRT strategy. Under normal condition, VSC-HVDC interconnectors can work in all four quadrants of the P-Q operating plane, while IIDGs only output active power. When a fault happens in an AC network, IIDGs only output active power or reactive power, but the fault side converter in the VSC-HVDC interconnector may work as a rectifier or an inverter, which makes the range of the angle of additional impedance measured by the distance relay larger than that in [12,13]. Therefore, the fault phase voltage summation-based measured impedance formula proposed for double-phase-to-ground faults, the fault current and measured impedance based pilot protection principle proposed for phase-to-phase faults, and the traditional ground distance protection mentioned in [12,13] are not applicable to AC lines emanating from VSC-HVDC interconnectors. Distance protection and pilot protection are adopted in traditional high voltage AC lines, and therefore the influence of VSC-HVDC interconnectors on these protection systems needs to be further investigated. This paper is composed of seven sections. The model of an AC/DC hybrid system is introduced and the FRT strategy of the VSC-HVDC interconnector is presented in Section2. The applicability of phase-to-phase distance protection, ground distance protection, and pilot protection to lines emanating from the VSC-HVDC interconnector is studied in Sections3–5 respectively. Theoretical analysis shows that these traditional protections are inapplicable to lines emanating from interconnectors, and simulation results validate this analysis. For lines emanating from interconnectors, a novel pilot protection principle based on the ratio between phase currents and the ratio between Energies 2016, 9, 400 3 of 27

Energies 2016, 9, 400 3 of 27 For lines emanating from interconnectors, a novel pilot protection principle based on the ratio between phase currents and the ratio between negative-sequence currents flowing through both negative-sequencesides of the line is currents introduced ﬂowing and through investigated both in sides Section of the 6, line and is simulation introduced results and investigated prove it can in Sectioncorrectly6, recognize and simulation internal results and external prove it faults. can correctly The conclusions recognize of internalthe paper and are external given in faults. Section The 7. conclusions of the paper are given in Section7. 2. Control System of the VSC-HVDC Interconnector 2. Control System of the VSC-HVDC Interconnector 2.1. An AC/DC Hybrid System 2.1. An AC/DC Hybrid System The model of an AC/DC hybrid system is shown in Figure 1, which depicts 115-kV, 50-Hz AC The model of an AC/DC hybrid system is shown in Figure1, which depicts 115-kV, 50-Hz AC networks interconnected via a VSC-HVDC interconnector. The back-to-back modular multilevel networks interconnected via a VSC-HVDC interconnector. The back-to-back modular multilevel converter (MMC) topology [14] is employed in the interconnector. The DC side of the interconnector converter (MMC) topology [14] is employed in the interconnector. The DC side of the interconnector is is rated at ±100 kV. The control mode of MMC-1 is constant DC voltage control and constant reactive rated at ˘100 kV. The control mode of MMC-1 is constant DC voltage control and constant reactive power control, and the control mode of MMC-2 is constant active power control and constant power control, and the control mode of MMC-2 is constant active power control and constant reactive reactive power control. Direct current control method is employed in MMCs of the interconnector. power control. Direct current control method is employed in MMCs of the interconnector. The control The control system of each MMC is composed of two inner positive-sequence current control loops, system of each MMC is composed of two inner positive-sequence current control loops, two inner two inner negative-sequence current control loops [15], two outer power control loops, real-time negative-sequence current control loops [15], two outer power control loops, real-time symmetrical symmetrical components detector based on space vector [16], synchronous d-q frame phase detector components detector based on space vector [16], synchronous d-q frame phase detector [17], carrier [17], carrier phase shifted sinusoidal pulse width modulation (CPS-SPWM) unit with capacitor phasevoltage shifted-balancing sinusoidal control pulse [18 width], and modulation FRT control (CPS-SPWM) unit. In order unit withto prevent capacitor the voltage-balancing performance of controlconverters [18], from and FRTdeteriorating control unit. under In order unbalanced to prevent faults the performancein AC networks of converters and ensure from the deteriorating security of underthe interconnector, unbalanced faults the inner in AC negative networks-sequence and ensure current the controlsecurity loops of the are interconnector, aimed at eliminating the inner negative-sequence current control loops are aimed at eliminating negative-sequence currents, so the negative-sequence currents, so the command references of negative-sequence currents idref− and iqref− i i commandare set as zero references [19,20]. of negative-sequence currents dref´ and qref´ are set as zero [19,20].

Figure 1. Model of an AC/DC hybrid system. Figure 1. Model of an AC/DC hybrid system. 2.2. FRT Control 2.2. FRT Control In order to prevent the voltage of the AC network from dropping further after the outage of In order to prevent the voltage of the AC network from dropping further after the outage of the the VSC-HVDC interconnector and maintain the stability of the power grid, the interconnector VSC-HVDC interconnector and maintain the stability of the power grid, the interconnector should be should be kept running when a fault happens in an AC network and provide fast reactive power kept running when a fault happens in an AC network and provide fast reactive power support for support for the AC network. Meanwhile, the interconnector should output maximum active the AC network. Meanwhile, the interconnector should output maximum active currents within the currents within the rated current limitation, to make full use of the capacity of converter and try to rated current limitation, to make full use of the capacity of converter and try to maintain the balance of maintain the balance of active power in the network. active power in the network. To improve the response speed of the control system, the outer power control loops are To improve the response speed of the control system, the outer power control loops are blocked blocked during the process of FRT, and the calculated command references idref+ and iqref+ are directly during the process of FRT, and the calculated command references i and i are directly applied applied to the inner positive-sequence current control loops. If a faultdref+ happensqref+ in the AC network to the inner positive-sequence current control loops. If a fault happens in the AC network connected connected with MMC-1 in Figure 1, MMC-2 will be shifted to DC voltage control mode during the with MMC-1 in Figure1, MMC-2 will be shifted to DC voltage control mode during the process of FRT process of FRT of MMC-1 to maintain the DC voltage of the interconnector [21]. In this paper, of MMC-1 to maintain the DC voltage of the interconnector [21]. In this paper, current ﬂowing out of current flowing out of the interconnector is specified as positive value. Considering the the interconnector is speciﬁed as positive value. Considering the interconnector can work in all four interconnector can work in all four quadrants before fault, the FRT strategy of the fault side quadrants before fault, the FRT strategy of the fault side converter is proposed as follows: converter is proposed as follows: 1. OnceOnce the the positive positive-sequence-sequence voltage voltage of of the the interconnector interconnector AC b busus drops below 90% of the rated voltage,voltage, the the two two outer outer power control loops of the converter are blocked. 2. TheThe commandcommand reference reference of positive-sequenceof positive-sequence reactive reactive current currentiqref+ is i adaptivelyqref+ is adaptively adjusted according adjusted accordingto the magnitude to the of magnitudepositive-sequence of positive voltage.-sequence Taking a as voltage. the ratio Taki of positive-sequenceng a as the ratio voltage of positiveof the interconnector-sequence voltage AC bus of tothe the interconnector rated phase voltage. AC bus If 0.2to theď a rated< 0.9, phaseiqref+ will voltage. increase If 0.2 linearly ≤ a < 0.9,from iqrefiq0+to will 1.05 increase times the linearly rated currentfrom iq with0 to 1.05 the decrease times the of rateda, where currentiq0 is with the command the decrease reference of a,

Energies 2016, 9, 400 4 of 27

of positive-sequence reactive current before fault and iq0 is regarded as zero when iq0 < 0 before the fault. If a < 0.2, iqref+ will be set as 1.05 times the rated current. iqref+ is given by: ? p1.05ˆ 2IN´iq0q p0.9 ´ aq ` iq0, 0.2 ď a ă 0.9 iqre f` “ ? 0.7 (1) # 1.05 ˆ 2IN, a ă 0.2 ? where IN is the rated AC current expressed in abc frame, and it should be multiplied by 2 to be expressed in the d-q frame. The relationship between iqref+ and a is shown in Figure2. Energies3. If 2016 the, 9 fault, 400 side converter works as an inverter before the fault, the command reference4 of of27 ? 2 2 wherepositive-sequence iq0 is the command active current referenceidref +ofwill positive be set-sequence as 1.05 reactiveˆ 2IN current´ iqre before f` ; otherwisefault and iiqdref0 is+ c regarded as zero when iq?0 < 0 before2 the fault.2 If a < 0.2,` iqref+ will ˘be set´ as 1.05¯ times the rated will be set as ´ 1.05 ˆ 2I ´ i . i is given by: current. iqref+ is given by: N qre f` dref+ c ` ˘ ´ ¯  1.05 2Ii? 2   Nq0  2  0.9a1.05 ˆ 2IN ´ i ,iqre f` , 0.2 id0 aě  0.90 i    q0 qref  i  “ $ c 0.7 (1(2)) dre f` ? ´ ¯ 2 ’ ` ˘ 2 1.05& 2Ia´N ,1.05 ˆ 2IN ´ iqre f` , id0 ă 0.20 c ’ ` ˘ ´ ¯ where IN is the rated AC current expressed’ in abc frame, and it should be multiplied by 2 to be where id0 is the command reference% of positive-sequence active current before the fault. expressed in the d-q frame. The relationship between iqref+ and a is shown in Figure 2.

Figure 2. Command reference of positive-sequence reactive current when a < 0.9. Figure 2. Command reference of positive-sequence reactive current when a < 0.9. 3. If the fault side converter works as an inverter before the fault, the command reference of 2.3. Output Characteristics of the VSC-HVDC Interconnector after a Fault 2 2 positive-sequence active current idref+ will be set as ; otherwise idref+ will be 1.05 2IiN qref   In the analysis of the transient process after a fault happens on traditional AC lines, the effects of the electromechanical transient2 process2 of SGs are neglected, and traditional voltage sources can be set as    . idref+ is given by: 1.05 2IiN  qref   modeled as an ideal voltage source in series with the equivalent impedance. The output currents of traditional voltage sources usually increase signiﬁcantly after faults.  2 2 1.05 2I  i , i  0 However, based on Section 2.2, when a faultN happens qref  in an AC network,d0 the fault side converter  of the interconnector can rapidlyidref   take corresponding measures according to the severity of( the2)  2 2 voltage drop and restrain negative-sequence1.05  currents2I  i under , unbalanced i  0 fault conditions. If a ě 0.9,   N  qref  d0 the converter will maintain the control target the same as that under normal operation; if a < 0.9, wthehere outer id0 is control the command loops will reference be blocked, of positive and command-sequence referencesactive current will before be directly the fault. applied to inner positive-sequence current control loops. Therefore for each AC network under fault conditions, the 2.system3. Output behind Characteristics the fault side of the converter VSC-HVDC transformer Interconnector can be equivalentafter a Fault to a controlled positive-sequence currentIn the source, analysis and theof the output transient currents process of the after equivalent a fault sourcehappens are on related traditional to the operationAC lines, statethe effects of the ofinterconnector the electromechanical before fault, transient fault location, process faultof SGs type, are and neglected, fault resistance. and traditional voltage sources can be modeledAccording as an to ideal the proposedvoltage source FRT in strategy, series with the the magnitude equivalent of impedance. output positive-currents The output currents of the ofinterconnector traditional voltage is limited sources and usually does not increase increase significantly signiﬁcantly after after fault fault,s. while the phase angles of the currentsHowever, may based change on greatly. Section The 2.2, output when positive-currentsa fault happens are in no an larger AC network, than 1.05 IN thewhen faulta < side 0.9 converterafter a fault. of the Since interconnector the interconnector can rapidly can worktake corresponding in all four quadrants measures before according the fault, to the it severity can still ofwork the involtage all four drop quadrants and restrain if a ě negative0.9 after-sequence the fault, currents and the phaseunder angleunbalanced difference fault between conditions output. If a ≥ 0.9, the converter will maintain the control target the same as that under normal operation; if a < 0.9, the outer control loops will be blocked, and command references will be directly applied to inner positive-sequence current control loops. Therefore for each AC network under fault conditions, the system behind the fault side converter transformer can be equivalent to a controlled positive-sequence current source, and the output currents of the equivalent source are related to the operation state of the interconnector before fault, fault location, fault type, and fault resistance. According to the proposed FRT strategy, the magnitude of output positive-currents of the interconnector is limited and does not increase significantly after fault, while the phase angles of the currents may change greatly. The output positive-currents are no larger than 1.05IN when a < 0.9 after a fault. Since the interconnector can work in all four quadrants before the fault, it can still work in all four quadrants if a ≥ 0.9 after the fault, and the phase angle difference between output

Energies 2016, 9, 400 5 of 27 positive-sequence voltage and output positive-current of the interconnector can be any value in the range of 0˝–360˝; if a < 0.9, the interconnector can work in the ﬁrst quadrant and the second quadrant where Q > 0, and the range of the phase angle difference between output positive-sequence voltage and output positive-sequence current is 0˝–180˝. Thus, the change of the phase angle of the output current can be any value in the range of 0˝–360˝ after a fault.

3. Applicability Analysis of Phase-to-Phase Distance Protection Taking phase-to-phase faults that happen at f1 and f2 as example, the applicability of the phase-to-phase distance protection to the line emanating from the VSC-HVDC interconnector is discussed in this section. As shown in Figure1, f1 is on line mn which emanates from the interconnector and f2 is on line ng which is adjacent to line mn. R1–R6 are distance relays, and their locations are also shown in Figure1. Among them, R1 is installed at bus m side of line mn, and R2 is installed at bus n side of line mn.

3.1. Applicability Analysis of R1

When a phase B-to-phase C fault with fault resistance 2Rf happens at f1 on line mn, the impedance measured by the BC element in R1 is:

. . . . UBm ´ UCm IBn ´ ICn ZR1_BC “ . . “ Zf m ` R f 1 ` . . (3) IBm ´ ICm ˜ IBm ´ ICm ¸

∆ZR1_BC

. . looooooooooooomooooooooooooon. . where UB and UC are phase B voltage and phase C voltage, IB and IC are phase B current and phase C current, m and n indicate bus m side and bus n side of line mn, Zf m is the positive-sequence impedance between the relay location and the fault location f1, and ∆ZR1_BC is the additional impedance caused . . by fault resistance. According to Section 2.3, IBm and ICm are output currents of the interconnector, . . and do not increase significantly after fault; IBn and ICn are provided by traditional voltage sources, . . . . IBnÍCn and increase significantly after fault. Therefore . . ą 1, and the influence of IBn ´ ICn on the I Í ˇ Bm Cm ˇ measured impedance Z cannot be ignored.ˇ The angleˇ of the additional impedance ∆Z R1_BC ˇ ˇ R1_BC depends on the phase relationship between currentsˇ flowingˇ through bus m side and currents flowing through bus n side, which can be any value in the range of 0˝–360˝. The concrete analysis is as follow. The fault currents provided by traditional voltage sources contain positive-sequence components and negative-sequence components under phase-to-phase fault, while the fault currents provided by the interconnector only contain positive-sequence components since the negative-sequence components are eliminated. To make it easier to analyze the influence of ∆ZR1_BC on ZR1_BC, the measured impedance can be derived using symmetrical component method and nodal voltage method (refer to Appendix). The measured impedance can be expressed as:

. E Z ` Z ´ Z An Seq` mn f m Z ``pZmn´Z q Z “ Z ` R 1 ` Seq f m (4) R1_BC f m f ´ ¯ ¨ . ˛ ZSeq` ` Zmn ´ Zf m ` R f IAm` ˚ ‹ ´ ¯ ˝ ‚ ∆ZR1_BC

looooooooooooooooooooooooooooooooooooooomooooooooooooooooooooooooooooooooooooooon. where Zmn is the positive-sequence impedance of line mn, EAn and ZSeq` are phase A voltage of the equivalent voltage source and equivalent positive-sequence impedance at the back side of bus n, and . IAm` is the phase A current ﬂowing through R1 which only contains the positive-sequence component. . . EAn is represented by IAn_eq in the following analysis. When the AC system at the ZSeq``pZmn´Zf mq back side of bus n remains unchanged, according to Equation (4), ∆ZR1_BC is related to Zf m, R f , as Energies 2016, 9, 400 6 of 27

and IAm is the phase A current flowing through R1 which only contains the positive-sequence component. E An is represented by I in the following analysis. When the AC system at  An_ eq ZZZSeq  mn fm 

the back side of bus n remains unchanged, according to Equation (4), ZR1_ BC is related to Z fm ,

R f , as well as the magnitude and phase relationship between and . Assuming that the Energies 2016, 9, 400 6 of 27 impedance angle of ZSeq is the same with line mn, the phase angle of is not related to fault

location, which means the phase angle of is a. constant .no matter where the fault happens. well as the magnitude and phase relationship between IAm` and IAn_eq. Assuming that the impedance However, the phase angle of is influenced by the operation. state of the interconnector before angle of ZSeq` is the same with line mn, the phase angle of IAn_eq is not related to fault location, fault and fault conditions including. fault type, fault location, and fault resistance. The which means the phase angle of IAn_eq is a constant no matter where the fault happens. However, the interconnector can. work in all four quadrants after a fault, and the phase angle of can be any phase angle of IAm` is influenced by the operation state of the interconnector before fault and fault conditionsvalue in the including range of fault0°–360°. type, Therefore, fault location, the phase and faultangle resistance. difference The between interconnector and can work can in . ˝ ˝ all four quadrants after a fault, and the phase angle of IAm` can be any value in the range of 0 –360 . also be any value in the range of 0°–360°. The. magnitude. of is related to , and Therefore, the phase angle difference between IAm` and IAn_eq can also be any value in the range of does not increase significantly. after a fault. Based. on the analysis above, is greatly ˝ ˝ 0 –360 . The magnitude of IAn_eq is related to Zf m, and IAm` does not increase significantly after a fault. influenced by the magnitude and phase relationship between and , and the magnitude Based on the analysis above, ∆ZR1_BC is greatly influenced by the magnitude and phase relationship . . betweenand impedanceIAm` and angleIAn _ofeq, and the magnitude are uncertain. and impedanceTaking the anglesimulation of ∆Z Rmodel1_BC are established uncertain. for Taking this . . thepaper simulation as example, model the established ratio of I for this to paperI asis example,larger than the 2, ratio and of theIAn phase_eq to angleIAm` differenceis larger An_ eq Am . . ˇ ˇ ˇ ˇ than 2, and the phase angle difference between IAm` and IAn_eq can be anyˇ valueˇ ˇ in theˇ range of between˝ ˝ and can be any value in the range of 0°–360°. ˇ Thereforeˇ ˇ whenˇ Rf  0 , 0 –360 . Therefore when R f ‰ 0, ∆ZR1_BC can make ZR1_BC differs greatly from Zf m, and probably cause malfunction can make of Z distanceR1_ BC differs protection. greatly from , and probably cause malfunction of distance protection.For a fault that happens on a line with two-terminal power supply in a traditional AC network, if the impedanceFor a fault angles that happens of the systems on a line at with two sidestwo-terminal of the fault power spot supply are approximately in a traditional equal, AC thenetwork, phase angleif the differenceimpedance of angles the currents of the systems at two sides at two of thesides fault of the spot fault are approximatelyspot are approximately equal to thatequal, of the pre-faultphase angle potentials difference of the of systemsthe currents at the at twotwo sides.sides of Taking the fault the stabilityspot are ofapproximately the power system equal and to that the transmissionof the pre-fault capacity potentials limitation of the into systems account, at the the two phase sides. angle Taking difference the stability between of the the voltages power ofsystem each endand of the the transmission line is usually capacity quite small. limitation Therefore into the account, phase angle the phase difference angle between difference currents between flowing the throughvoltages eachof each end end is also of the small, line and is usually the angle quite of additionalsmall. Therefore impedance the phase∆Z is withinangle differen a very smallce between range aroundcurrents zero. flowing∆Z is through nearly resistive. each end is also small, and the angle of additional impedance Z is withinRelay a very characteristic small range shapes around with zero. relatively Z is nearly large area resistive. in the direction of +R in the R-X diagram, suchRelay as quadrilateral characteristic relays, shapes are with usually relative employedly large in area distance in the protection direction of +R traditional in the R- ACX diagram, lines to reducesuch as the quadrilateral influence of relays, fault resistance. are usually A commonemployed characteristic in distance protection shape of quadrilateral of traditional relay AC is lines shown to inreduce Figure the3. influence of fault resistance. A common characteristic shape of quadrilateral relay is shown in Figure 3.

Figure 3. A common characteristic shape of quadrilateral relays. Figure 3. A common characteristic shape of quadrilateral relays.

Line AB represents a reactance relay with a small negative tilt angle α4 to prevent the relay Line AB represents a reactance relay with a small negative tilt angle α to prevent the relay from from overreaching caused by fault resistance, and α4 is usually in the range4 of 5°–8°; line AC is ˝ ˝ overreaching caused by fault resistance, and α4 is usually in the range of 5 –8 ; line AC is employed to avoid malfunctions caused by load impedance; line OC is employed to prevent the relay from failing to trip when a fault happens near the relay location and ∆Z is capacitive; the angle of the measured impedance is probably larger than 90˝ due to the angle error of potential transformer, current transformer and so on, and therefore line OB tilts to quadrant II to prevent the relay from failing to trip. However, if the characteristic shape described above is applied to R1, R1 may fail to trip or overreach due to the uncertainty of the magnitude and impedance angle of ∆ZR1_BC, as shown in Figure4. The dashed circle indicates the scope of the measured impedance caused by ∆ZR1_BC. As Energies 2016, 9, 400 7 of 27

employed to avoid malfunctions caused by load impedance; line OC is employed to prevent the relay from failing to trip when a fault happens near the relay location and Z is capacitive; the angle of the measured impedance is probably larger than 90° due to the angle error of potential transformer, current transformer and so on, and therefore line OB tilts to quadrant II to prevent the relay from failing to trip. Energies 2016However,, 9, 400 if the characteristic shape described above is applied to R1, R1 may fail to 7trip of 27 or overreach due to the uncertainty of the magnitude and impedance angle of ΔZR1_BC, as shown in Figure 4. The dashed circle indicates the scope of the measured impedance caused by ΔZR1_BC. As shown in Figure4a, although the fault is located within the protection range of Zone 1, ∆ZR1_BC is shown in Figure 4a, although the fault is located within the protection range of Zone 1, ΔZR1_BC is inductive and of large impedance angle, which makes R1 fail to trip. As shown in Figure4b, ∆ZR1_BC inductive and of large impedance angle, which makes R1 fail to trip. As shown in Figure 4b, ΔZR1_BC is capacitive and of large impedance angle, which makes the actual reach point of Zone 1 far exceed is capacitive and of large impedance angle, which makes the actual reach point of Zone 1 far exceed the setting range; if there are no branches at bus n in the AC/DC hybrid system shown in Figure1, the setting range; if there are no branches at bus n in the AC/DC hybrid system shown in Figure 1, protection miscoordination of R1 and relay installed at the same side of adjacent line may be induced protection miscoordination of R1 and relay installed at the same side of adjacent line may be by ∆ZR1_BC. induced by ΔZR1_BC.

(a) (b)

Figure 4. Failure to operate or overreach of R1 under phase-to-phase faults with fault resistance: (a) Figure 4. Failure to operate or overreach of R1 under phase-to-phase faults with fault resistance: (a) R1 R1 fails to trip when fault is located inside Zone 1; (b) R1 overreaches when fault is located outside fails to trip when fault is located inside Zone 1; (b) R1 overreaches when fault is located outside Zone 1. Zone 1.

IfIf there there are are branches branches at at bus bus n, n, as as shown shown in in Figure Figure1, the1, the fault fault circuit circuit diagram diagram of of a bolted a bolted phase phase B-to-phaseB-to-phase C C fault fault that that happens happens at at f2 f2 on on the the adjacent adjacent line line of of line line mn mn is isshown shown in in Figure Figure5b. 5b The. The impedanceimpedance measured measured by by the the BC BC element element in in R1 R1 is: is: . .  1 1 IIIBhBh´ I ChCh Z ZZZZ“ Z ` Z ` Z . . (5) R1_BCR1_ BCmn mnf m fmf m fm II IBmBm´ I CmCm (5) Z1 ∆ZRR1_1_BC BC loooooooomoooooooon  . . where 1 Z fm is the positive-sequence impedance between bus n and f2, and IBh and ICh are phase where Zf m is the positive-sequence impedance between bus n and f2, and IBh and ICh are phase B currentB current and and phase phase C current C current which which are are injected injected into into line line ng ng from from line line nh, nh, respectively. respectively. The The circuit circuit diagramdiagram of a of non-bolted a non-bolted phase phase B-to-phase B-to-phase C fault C that fault happens that happensat f1 is shown at f1 in is Figure shown5a. inComparing Figure 5a. FigureComparing5b with Figure Figure 5b5a, with it can Figure be observed 5a, it can that be the observ magnitudeed that andthe magnitude phase relationship and phase between relationship the currentsbetween injected the currents into fault injected circuit into by traditional fault circuit voltage by traditional sources and voltage the currents sources flowing and the through currents R1flowing are similar. through Therefore, R1 arethe similar. analysis Therefore, on the bolted the analysis phase-to-phase on the bolted fault atphase f2 is- similarto-phase to fault the aboveat f2 is analysissimilar on to the the non-boltedabove analysis phase-to-phase on the non fault-bolted at f1. phase In- Equationto-phase fault (5), the at additional f1. In Equation impedance (5), the ∆Z’additionalR1_BC is induced impedance by theΔZ’ injectedR1_BC is induced currents by of the traditional injected currents voltage sourcesof traditional and the voltage magnitude sources and and impedancethe magnitude angle ofand∆ Z’ impedanceR1_BC are uncertain. angle of Δ ThereforeZ’R1_BC are when uncertain. fault happens Therefore on w adjacenthen fault lines, happensZR1_BC on cannotadjacent reflect lines, the ZR fault1_BC cannot location reflect correctly, the fault and location R1 may correctly, fail to trip and or R1 overreach. may fail Ifto thetrip fault or overreach. at f2 is non-bolted,If the fault the at measuredf2 is non-bolted, impedance the measured will be more impedance complex will under be themore effect complex of currents under injectedthe effect by of source g, but the conclusion that R1 may fail to trip or overreach is confirmable. Similarly, R2 may misoperate when a backward fault happens. EnergiesEnergies 2016 2016, 9, ,9 400, 400 8 8of of 27 27 currentsEnergiescurrents2016 injected injected, 9, 400 by by source source g g, ,but but the the conclusion conclusion that that R1 R1 may may fail fail to to trip trip or or overreach overreach is is confirmable confirmable8 of 27. . Similarly,Similarly, R2 R2 may may misoperate misoperate when when a a backward backward fault fault happens. happens.

(a(a) ) (b(b) ) Figure 5. Circuit diagrams of phase B-to-phase C faults: (a) A non-bolted fault happens at f1; (b) A FigureFigure 5.5. CircuitCircuit diagramsdiagrams ofof phasephase B-to-phaseB-to-phase CC faults:faults: ((aa)) AA non-boltednon-bolted faultfault happenshappens atat f1;f1; ((bb)A) A bolted fault happens at f2. boltedbolted faultfault happenshappens atat f2.f2. 3.2. Applicability Analysis of R2 3.2.3.2. ApplicabilityApplicability AnalysisAnalysis ofof R2R2 When a phase B-to-phase C fault with fault resistance 2Rf happens at f1, fault currents that WhenWhen a a phase phase B-to-phase B-to-phase C faultC fault with with fault fault resistance resistance 2R happens2Rf happens at f1, at fault f1, currents fault currents that flows that flows through R1 are only provided by the interconnector, andf fault currents that flows through R2 throughflows through R1 are onlyR1 are provided only provided by the interconnector,by the interconnector, and fault and currents fault currents that flows that through flows R2through are only R2 are only provided by traditional voltage sources. The impedance measured by the BC element in R2 is: providedare only provided by traditional by traditional voltage sources.voltage sources. The impedance The impedance measured measured by the by BC the element BC element in R2 in is: R2 is:  UUIIBn Cn Bm Cm .UUIIBn. Cn    Bm. Cm. ZZRR2_ BC  fn  f 1  ZZRR2_ BCUBn ´ UCn fn f1 IBm ´ ICm IIIIBn Cn Bn Cn (6) ZR2_BC “ . IIIIBn. Cn“ Zf n ` R f 1 ` Bn. Cn . ((6)6) IBn ´ ICn ˜ IBn ´ ICn ¸ ZR2_ BC ZR2_ BC ∆ZR2_BC where Zfn is the positive-sequence impedance between the relay location and the fault location f1. where Zfn is the positive-sequence impedance betweenloooooooooooomoooooooooooon the relay location and the fault location f1. where Z is theR2_BC positive-sequence impedance between the relay location and the fault location f1. Obviously,Obviously,fn Δ ΔZZR2_BC is is affected affected by by the the magnitude magnitude and and phase phase relationship relationship between between currents currents flowing flowing Obviously, ∆ZR2_BC is affected by the magnitude and phase relationship between currents flowing IIBm Cm IIBm Cm . IIBm. Cm    II.Bm. Cm throughthrough both both ends ends of of the the line. line. Since Since I Í 11, , ZRZRR2_ BC22 f . . Assuming Assuming xx  I Í , , the the .Bm . Cm R2_ BC f .Bm . Cm through both ends of the line. Since IIBnII Cn ă 1, |∆ZR2_BC| ă 2R f . Assuming x “ IIBnII Cn , the IBn´BnICn Cn IBnBnÍCn Cn ˇ ˇ ˇ ˝ ˇ impedanceimpedance angle of of∆ ΔZZR2_BC is in in the the range ˇ range of ofr´ˇ arcsinarcsinx, arcsinxx ,arcsinxs whose  whose span spanis less is than lessˇ 180 than. Hence, 180°.ˇ impedance angle of ΔRZ2_R2_BCBC is in theˇ range ofˇ arcsinxx ,arcsin  whose span is lessˇ than ˇ 180°. when the magnitudes of fault currentsˇ flowingˇ through both ends of line mn deviate fromˇ each otherˇ Hence,Hence, when when the the magnitudes magnitudes of of fault fault currents currents flowing flowing through through both both ends ends of of line line mn mn deviate deviate from from greatly, namely x is small, ∆ZR2_BC is approximatelyR2_BC resistive as a result, as shown in Figure6. In that eacheach other other greatly, greatly, namely namely x x is is small, small, Δ Δ.ZZR2_BC .is is approximately approximately resistive resistive as as a a resul result,t, as as shown shown in in case, the influence of the fault current IBm ´ ICm which is provided by the interconnector on the FigureFigure 6. 6. In In that that case, case, the the influence influence of of the the fault fault current current IIBmII Cm whichwhich is is provided provided by by the the measured impedance of R2 can be neglected. However, when faultBm happens Cm at the back side of bus n, interconnector on the measured impedance of R2 can be neglected. However, when fault happens forinterconnector example at f2,on the the operation measured characteristic impedance of of R2 R2 can is the be sameneglected. with R1,However, and the when difference fault betweenhappens at the back side of bus n, for example at f2, the operation characteristic of R2 is the same with R1, theat the impedances back side measured of bus n, byfor R1exampl and R2e at is f2,Zmn the. operation characteristic of R2 is the same with R1, and the difference between the impedances measured by R1 and R2 is Zmn . and the difference between the impedances measured by R1 and R2 is Zmn .

FigureFigure 6 .6 .The The measured measured impedance impedance of of R2 R2 when when the the magnitudes magnitudes of of fault fault currents currents flowing flowing through through Figure 6. The measured impedance of R2 when the magnitudes of fault currents ﬂowing through both bothboth ends ends of of line line mn mn differ differ greatly greatly. . ends of line mn differ greatly.

Energies 2016, 9, 400 9 of 27

In Figure1, currents flowing through R3–R6 are not only provided by the interconnector. The network at the back of R3 or R5 contains traditional voltage sources and the interconnector, and there are only traditional voltage sources in the forward direction of R3 or R5; the network back of R4 or R6 only contains traditional voltage sources, and there are traditional voltage sources and the interconnector in the forward direction. Since the output currents of the interconnector are limited and do not increase significantly after the fault, the measured impedances of phase elements in R3–R6 are mainly influenced by the magnitude and phase relationship of currents provided by traditional voltage sources, and are scarcely influenced by the output currents of the interconnector. Therefore, for distance relays whose measured currents are not only provided by the interconnector, the impacts of fault resistances or currents injected from other branches on their measured impedances are similar to those on the measured impedances of distance relays in traditional AC networks. The analysis on the phase elements in R1-R6 under two-phase faults is also applicable to three-phase faults.

3.3. Simulation Results The conclusions on the applicability of phase elements in R1 and R2 which are installed on the line emanating from the VSC-HVDC interconnector are veriﬁed in this section. The model of the AC/DC hybrid system shown in Figure1 is built in PSCAD/EMTDC. The rated capacity of the interconnector is 200 MVA, the equivalent sources of AC networks at the back of bus g and bus h are Eg˙ = 115=10˝ kV ˝ and Eh˙ = 115=10 kV, and the equivalent impedances of these networks are Zg = 0.1Zng and Zh = 0.1Znh, respectively. The length of line mn, line ng and line nh are 40 km, 60 km, and 40 km, respectively. The parameters of these lines are summarized in Table1.

Table 1. Parameters of the AC lines.

Parameter Positive-Sequence Zero-Sequence R/(Ω/km) 0.105 0.315 L/(mH/km) 1.258 3.774

Quadrilateral relays with the characteristic shape shown in Figure3 are employed in R1 and R2. ˝ Rset = 60 Ω and φk is set as 75 , which represents the impedance angle of AC lines. By convention, ˝ ˝ ˝ α1 = 60 , α2 = 15 , α3 = 30 , and α4 = arctan1/8. The reach of Zone 1 is set at 85% of the line length. When setting Zone 2, injection branches are ignored [22]. The reach of Zone 2 is generally set at 120%–150% of the line length, and it must not cover beyond that of Zone 1 of the relays which are installed at the same side of adjacent lines [23]. In this paper, the reach of Zone 2 of R1 and R2 is set at 150% of the length of line mn. The setting values of R1 and R2 are as follows:

I I Zop.R1 “ Zop.R2 “ 0.85Zmn (7)

II II Zop.R1 “ Zop.R2 “ 1.5Zmn (8) where the superscripts I and II indicate Zone I and Zone II, respectively.

3.3.1. Case Study

The output power of the interconnector at MMC-2 side is P0 = ´100 MW and Q0 = 0 MVar before the fault. A phase B-to-phase C fault with 15 Ω fault resistance happens on line mn at 1 s, and the distance between R1 and the fault location is 30 km. The magnitudes and phase angles of I˙Bm ´ I˙Cm and I˙Bn ´ I˙Cn are shown in Figure7. After the fault, I˙Bm ´ I˙Cm, which is entirely provided by the interconnector, does not increase significantly, while I˙Bn ´ I˙Cn increases dramatically. |I˙Bn ´ I˙Cn| ˝ is about 3.8 times larger than |I˙Bm ´ I˙Cm|, and I˙Bn ´ I˙Cn leads I˙Bm ´ I˙Cm by 147.5 . Therefore ...... IBnÍCn IBmÍCm IBnÍCn IBmÍCm ˝ ˝ . . ą 1 ą . . , and the phase angles of . . and . . are 147.5 and ´147.5 , I Í I Í I Í I Í ˇ Bm Cm ˇ ˇ Bn Cn ˇ Bm Cm Bn Cn ˇ ˇ ˇ ˇ ˇ ˇ ˇ ˇ ˇ ˇ ˇ ˇ Energies 2016, 9, 400 10 of 27

Energies 2016, 9, 400 10 of 27 respectively. According to Equations (3) and (6), Z is inductive, and Z is capacitive. Energies 2016, 9, 400 R1_ BC R2_ BC 10 of 27 In R-X diagram, the measured impedances of BC elements in R1 and R2, which are represented by respectively.respectively. According According to to Equations Equations (3)(3) and (6), (6), ∆ZR1_BC isis inductive, inductive, and and ∆ZZR2_BC is iscapacitive. capacitive. ZR1_ BC and ZR2_ BC , locate at two circles respectively,R1_ BC as shown in Figure 8.R 2_ The BC centers of the In R-X diagram, the measured impedances of BC elements in R1 and R2, which are represented In R-X diagram, the measured impedances of BC elements in R1 and R2, which are representedII by by ZR1_BC and ZR2_BC, locate at two circles respectively, as shown in Figure8. The centersBn Cn of the circlesZ are and OZR 1 Z fm, loc f ateand at OZR two2 circlesfn frespectively,, and the radii as shown of the in circles Figure are 8. TherR1 centersf of the and R1_ BC R2_ BC .  . IIIBmÍ Cm circles are O “ Z ` R and O “ Z ` R , and the radii of the circles are r “ R . Bn . Cn and 1 f m f 2 f n f 1 IIf    BnIBm´ CnICm circlesII .Bm are .OZR Cm  and OZR, and the radii. of. II theBm circles Cm are. rR. IIBnˇ Cn andˇ rR 1 , fm respectively. f 2 In addition,fn f vector R  and 1 R f ˇ ˇ have 2 f IBmÍCm IBm´f ICm IBnÍCnf IIBm Cm r2 “ R f II.  . , respectively. In addition, vector R f . . IIand R f . . IIhaveˇ  oppositeˇ IBnÍ Cn I ´I Bn Cn I Í Bmˇ Cm ˇ ˇ BnIICn ˇ ˆ Bn IICn ˙ ˆ Bm CmII˙  phases.oppositerR ˇ Therefore phases.Bm Cmˇ the Therefore, respectively. impact ofthe the impact In interconnector addition, of the vector interconnector on R1 R andBm R2 ison Cm related R1 and and to R the R2 magnitude isBn related Cn have ofto the the 2 ˇf II ˇ f II f II relationshipmagnitudeˇ Bn of between the Cnˇ relationship fault currents between flowing fault through currents each flowing side of Bnthrou the Cn line.gh each In other side of words,Bm the Cmline. it is In related other towords, theopposite relationship it is phases. related between Therefore to the the relationship the short-circuit impact between of capacity the interconnector the of short the- traditionalcircuit on R1 capacity and AC network R2 of is the related traditional and the to ratedthe AC capacitynetworkmagnitude of and the of the interconnector.the ratedrelationship capacity Inbetween general, of the fault interconnector. fault currents currents flowing provided In general,through by each afault traditional side currents of the AC line. provided network In other by are a words, it is related to the relationship between the short-circuit capacity of the traditional AC largertraditional than those AC network provided are by l aarger VSC-HVDC than those interconnector, provided by which a VSC makes-HVDCr1 > interconnector,Rf > r2. It can be which seen network and the rated capacity of the interconnector. In general, fault currents provided by a frommakes Figure r1 > R8 fthat > r2. theIt can impact be seen of the from interconnector Figure 8 that on the R1 impact is greater of the than interconnector that on R2. Under on R1 the is greater same traditional AC network are larger than those provided by a VSC-HVDC interconnector, which faultthan conditions that on R2. including Under the fault same type, fault fault conditions location, and including fault resistance, fault type, if the fault rated location, capacity and of fault the makes r1 > Rf > r2. It can be seen from Figure 8 that the impact of the interconnector on R1 is greater interconnectorresistance, if the increases, rated capacity the impact of the of theinterconnector interconnector increases, on R1 willthe impact decrease, of andthe interconnector the impact of the on than that on R2. Under the same fault conditions including fault type, fault location, and fault interconnectorR1 will decrease, on R2and will the increase.impact of the interconnector on R2 will increase. resistance, if the rated capacity of the interconnector increases, the impact of the interconnector on R1 will decrease, and the impact of the interconnector on R2 will increase.

(a) (b) (a) (b) Figure 7. Current difference of fault phases at each side of line mn: (a) Magnitudes; (b) Phase angles. Figure 7. Current difference of fault phases at each side of line mn: (a) Magnitudes; (b) Phase angles. Figure 7. Current difference of fault phases at each side of line mn: (a) Magnitudes; (b) Phase angles.

(a(a) ) (b()b )

FigureFigure 8 . 8The. The o perating operating characteristic characteristic of BC elements inin R1 R1 and and R2: R2: ( a()a BC) BC element element in in R1 R1; (b; )( bBC) BC Figure 8. The operating characteristic of BC elements in R1 and R2: (a) BC element in R1; (b) BC elementelement in in R 2R.2 . element in R2.

TheThe actual actual measured measured impedances impedances of the BC elementselements in in R1 R1 and and R2 R2 are are shown shown in inFigure Figure 9. Z9.R 1_ZBCR1_ BC = −=13.21 The−13.21 + actual + 27.65 27.65j measuredjΩ Ω, , and and the theimpedances additional additional impedance of the BC caused caused elements by by fault fault in resistance resistanceR1 and is R2 isZ RZ1_ areRBC1_ BC= shown−=16.36 −16.36 + in + Figure15.8015.80j 9Ωj. Ω =Z =22.74R 22.741_BC=136.0°136.0°´13.21 Ω Ω. + .R1 27.65R1 failsfailsj Ω toto, and trip.trip. the ZR2_2_ additionalBCBC == 6.926.92 ++ 2.87 impedance2.87j jΩ Ω, ,and and causedthe the additional additional by fault impedance impedance resistance is isis ˝ ZZRR1_Z2_RBC2_ BC== =−´ 5.87−16.365.87 − − +1.08 1.08 15.80j jΩ Ωj Ω= = 5.97 =5.97 22.74−−10.510.5=136.0°° ΩΩ.. R2Ω. operatesoperates R1 fails correctly.correctly. to trip. The ZTheR 2_simulation BCsimulation= 6.92 results + results 2.87 verifiedj Ωverified, and the thethe ˝ additionalanalysisanalysis in in impedancethe the paragraph paragraph is Z above. Rabove.2_BC = ´5.87 ´ 1.08j Ω = 5.97=´10.5 Ω. R2 operates correctly. The simulation results veriﬁed the analysis in the paragraph above.

Energies 2016, 9, 400 11 of 27 Energies 2016, 9, 400 11 of 27

(a) (b)

Figure 9. Measured impedances of the BC elements in R1 and R2: (a) Measured impedance of the BC Figure 9. Measured impedances(a) of the BC elements in R1 and R2: (a) Measured(b) impedance of the BC element in R1; (b) Measured(a )impedance of the BC element in R2. (b) elementFigure in9. R1;Measured (b) Measured impedances impedance of the BC of theelements BC element in R1 and in R2. R2: (a) Measured impedance of the BC 3.3.2.element AreaFigure of in9 Measured. MeasuredR1; (b) Measured Impedanceimpedances impedance of the BC of theelements BC element in R1 and in R2. R2: (a) Measured impedance of the BC 3.3.2. Areaelement of Measured in R1; (b) Measured Impedance impedance of the BC element in R2. Taking into consideration that the VSC-HVDC interconnector may operate at different states 3.3.Taking2. Area intoof Measured consideration Impedance that the VSC-HVDC interconnector may operate at different states before3.3.2. Area faults of, phase Measured B-to- Impedancephase C fault s with different fault resistances are simulated at different beforelocationsTaking faults, on into phase line consideration mn. B-to-phase The areas Cthat of faults measuredthe VSC with-HVDC different impedances interconnector fault of resistances the BC may elements operate are simulated in at R1 different and at R2 different states are locationsbeforeobtainedTaking fault on by lines changing, into phase mn. consideration The B -theto areas- phasefault of resistance measuredCthat fault thes VSC with(from impedances- HVDC different 0 to 20 interconnector Ω) of fault theand BCresistances the elements distance may areoperate inbetween R1simulated and at relaydifferent R2 atare location different obtained states bylocationsand changingbefore fault fault on location the s line, phasefault mn. (fromresistance B The-to - 0% phase areas to (from 100% C of fault measured 0 of tos with line 20 Ω mn). different impedances) and When the fault distance the of resistances the output between BC power elements are relay simulated of in the location R1 VSC atand - differentHVDC and R2 fault are locations on line mn. The areas of measured impedances of the BC elements in R1 and R2 are locationobtainedinterconnector (from by changing 0% at to MMC 100% the-2 offault side line isresistance mn). P0 = When 200 (from MW the 0 outputand to 20Q 0Ω) power= and 0 MVar ofthe the distancebefore VSC-HVDC the between fault, interconnector therelay areas location of at obtained by changing the fault resistance (from 0 to 20 Ω) and the distance between relay location MMC-2andmeasured fault side locationimpedances is P0 = 200 (from MWof R 0%1 and and toQ 100%R20 = are 0 MVar of shown line before mn).in Figure the When fault, 10 a the,b the, respectively. output areas of power measured When of the P impedances0 = VSC 100- HVDCMW of and fault location (from 0% to 100% of line mn). When the output power of the VSC-HVDC R1interconnectorand and Q R20 = are 0 MVar shown at , MMC the in Figure areas-2 side of10 isa,b, measured P0 respectively. = 200 impedances MW Whenand Q ofP0 0= R =1 0 100 and MVarMW R2 before are and shownQ the0 = 0 fault, in MVar, Figure the the areas 11 areasa,b , of of interconnector at MMC-2 side is P0 = 200 MW and Q0 = 0 MVar before the fault, the areas of measuredmeasuredrespectively. impedances impedances The green of of shadedR1 R1 and and areaR2 R2 are inare shown each shown figure in in Figure Figure represents 11 10a,b,a ,b therespectively., respectively. area of measured The When green impedancesP0 shaded= 100 MW area measured impedances of R1 and R2 are shown in Figure 10a,b, respectively. When P0 = 100 MW inandwhen each Q ﬁgurethe0 = distance 0 MVar represents, between the the areas arearelay of of measuredlocation measured and impedances impedances fault location of when R is1 within and the R2 distance 0 % are–85% shown between of line in Figurelength, relay location 11anda,b , and Q0 = 0 MVar, the areas of measured impedances of R1 and R2 are shown in Figure 11a,b, andrespectively.the fault yellow location shaded The is green within area represents shaded 0%–85% area ofthe linein area each length, of figure measured and represents the impedances yellow the shaded area when ofarea the measured represents distance impedances between the area of respectively. The green shaded area in each figure represents the area of measured impedances measuredwhenrelay locationthe impedances distance and fault between when location the relaydistance is withinlocation between 85% and–100% fault relay of location line location length. is and within fault 0 location%–85% of is withinline length, 85%–100% and when the distance between relay location and fault location is within 0%–85% of line length, and ofthe line yellow length. shaded area represents the area of measured impedances when the distance between relaythe yellowlocation shaded and fault area location represents is within the area85% – of100% measured of line impedanceslength. when the distance between relay location and fault location is within 85%–100% of line length.

(a) (b) Figure 10. Areas of measured impedances of BC element in each relay under phase B-to-phase C

faults on line mn ( P (200a) MW and Q  0 MVar ): (a) R1; (b) R2. (b) 0 (a) 0 (b) Figure 10. Areas of measured impedances of BC element in each relay under phase B-to-phase C FigureFigure 10. 1Areas0. Areas of measuredof measured impedances impedances of BC of elementBC element in each in each relay relay under under phase phase B-to-phase B-to-phase C faults C faults on line mn ( P  200 MW and Q  0 MVar ): (a) R1; (b) R2. 0  0  on linefaults mn on ( Pline0 “ mn200 ( MWP0 200 and MWQ0 “ and0 MVar): Q0 0 (a MVar) R1; ():b ()a R2.) R1; (b) R2.

(a) (b)

Figure 11. Areas of measured impedances of BC element in each relay under phase B-to-phase C

faults on line mn ( P 100 MW and Q  0 MVar ): (a) R1; (b) R2. 0 (a(a) ) 0 (b)

FigureFigure 1 1.11. Areas Areas of of measured measured impedances impedances ofof BCBC elementelement inin eacheach relay under phase B--toto--phase CC FigureThe influence 11. Areas ofof measuredthe interconnector impedances on of the BC elementmeasured in eachimpedances relay under of the phase relays B-to-phase is related C faults to its faults on line mn ( P 100 MW and Q  0 MVar ): (a) R1; (b) R2. faults on line mn ( 0P0 100 MW and Q00  0 MVar ): (a) R1; (b) R2. operationon line mnstate (P 0bef“ore ´100 fault. MW Comparing and Q0 “ 0 Figure MVar): 11a (a) R1;with (b )Figure R2. 12a, and Figure 11b with Figure 12b,

TheThe influence influence of of the the interconnector interconnector on on thethe measuredmeasured impedancesimpedances of the relays is relatedrelated toto itsits operationoperation state state bef beforeore fault. fault. Comparing Comparing Figure Figure 11a 11a withwith FigureFigure 12a,12a, and Figure 11b with FigureFigure 12b12b,,

Energies 2016, 9, 400 13 of 27

neutral-points of the converter transformers are ungrounded at the converter side, as shown in Figure 1, and therefore İm0 does not flow through the converter MMC-2 and is not controlled by the FRT strategy. The compound sequence network of a single-phase-to-ground fault is the series of positive-sequence, negative-sequence and zero-sequence networks, and therefore the positive-sequence, negative-sequence and zero-sequence component of the fault path current meet Equation (11):

IIIAf Af Af 0 (11)

where İAf+ + İAm+ + İAn+, İAf− = İAn−, and İAf0 = İm0 + İn0. The compound sequence network of the fault is Energies 2016, 9, 400 12 of 27 shown in Figure 12. İdev represents the output positive-sequence current of the interconnector. Zm+ and Zn+ have the same meaning as Zfm and Zfn, respectively. In a negative-sequence network, the negativeThe- influencesequence of impedance the interconnector between R1 on andthe measured the fault location impedances is nearly of the infinite, relays is and related Zn− is to the its operationnegative-sequence state before impedance fault. Comparing between R2 Figure and the11a faultwith location,Figures 12 whicha, and equals 11b with to Z Figuren+. Zm0 12isb, the it canzero be-sequence seen that impedance different operation between states R1 and of the the interconnector fault location, before and faultZn0 willis the result zero in-sequence different outputimpedance characteristics between R2 of and the the interconnector fault location. after ZSeq fault.+, ZSeq− In and other ZSeq words,0 are equivalent the output positive current-sequenceI˙Am+ of theimpedance, interconnector negative is- differentsequence after impedance fault, which and zero makes-sequence the magnitudes impedance and of angles the AC of network the additional at the impedancesback side of measuredbus n, respectively. by R1 and Other R2 different. symbols Thereforehave been the mentioned areas of measuredin the preceding impedances paragraphs. of the relaysThe impedance vary significantly. of the converterComparing transformer Figure 11a with is neglected Figures 11 inb, this and 12 paper.a with If Figure the line 12b,-to it-ground can be seenadmittance that the is areas ignored, of measured the relationship impedances of the of sequence R1 differ currents greatly fromis: the pre-set area, while the areas of measured impedances of R2 differ little from the pre-set area. It can also be seen from Figures 11 IIIII    (12) and 12 that when fault happens on lineAm mn, An Zone  An 1  of R1 m00 may n fail to trip under in-zone fault and overreachThe negative under out-of-zone-sequence fault, network and only Zone contains 2 of R1 may the also bus fail n side to trip. of However, the fault location,Zone 1 of and R2 may the underreachzero-sequence or overreachnetwork is only the whenparallel fault circuit happens of zero near-sequence the end equivalent of the pre-set impedances, protection Z range,Σm0 and where ZΣn0, theat each distance side betweenof the fault the loc R2ation. and the Assuming fault location that isimpedance greater than angles 50% of of Z lineΣm0 mn,and andZΣn0 Zone are equal, 2 of R2 İm can0 is operatein phase correctly. with İn0, Therefore,and in this thecase impact İAf+ and of İ theAf− ( interconnectorİAn−) are also in on phase R1 is with greater İn0 according than that onto R2,Equations which verifies(11) and the (12). analysis in Section 3.2.

Figure 12. Compound sequence network under a phase-A-to-ground fault at f1. Figure 12. Compound sequence network under a phase-A-to-ground fault at f1. According to Equation (12), B and B in Equations (9) and (10) can be expressed as The simulation results in this section1 show2 that when a phase-to-phase fault with fault resistance Equations (13) and (14), respectively: happens on line mn, the angles of the additional impedances measured by R1 and R2 may not be within a very small range around zero, which is different from traditional AC lines with two-terminal power supplies. Therefore, traditional fixed-setting quadrilateral characteristic cannot improve the ability of the distance protections which are installed on lines emanating from the interconnector against fault resistance effectively, especially the protections located at the interconnector side such as R1. And traditional fixed-setting characteristics can cause significant error in these protections.

4. Applicability Analysis of Ground Distance Protection Taking single-phase-to-ground faults that happen at f1 and f2 as example, the applicability of the ground distance protection to the line emanating from the VSC-HVDC interconnector is discussed in this section. Energies 2016, 9, 400 13 of 27

4.1. Applicability Analysis of R1 and R2

When a phase-A-to-ground fault with fault resistance Rf happens at f1, the impedances measured by the AG elements in R1 and R2 are:

. . I Am ` I An ZR1_A “ Zf m ` R f . . (9) ˜ I Am ` KIm0 ¸

B1 looooooooomooooooooon ∆ZR1_A

looooooooooomooooooooooon. . I An ` I Am ZR2_A “ Zf n ` R f . . (10) ˜ I An ` KIn0 ¸

loooooooomoooooooon∆ZR2_A loooooooooomoooooooooon where I˙Am and I˙An are phase A currents flowing through R1 and R2, I˙m0 and I˙n0 are zero-sequence currents measured by R1 and R2, K “ Z0´Z1 is the zero-sequence compensation coefficient, and ∆Z Z1 R1_A and ∆ZR2_A are additional terms of ZR1_A and ZR2_A caused by fault resistance, respectively. I˙An, which is provided by traditional voltage source, contains positive-sequence component, negative-sequence component and zero-sequence component, and therefore it can be expressed as I˙An = I˙n+ + I˙An´ + I˙n0; I˙Am contains positive-sequence component and zero-sequence component since the negative-sequence component are eliminated by the interconnector, and it can be expressed as I˙Am + I˙Am+ + I˙m0. The magnitude and phase angle of I˙Am+ is controlled by the FRT strategy of the interconnector and therefore |I˙Am+| does not increase significantly after the fault. The neutral-points of the converter transformers are ungrounded at the converter side, as shown in Figure1, and therefore I˙m0 does not flow through the converter MMC-2 and is not controlled by the FRT strategy. The compound sequence network of a single-phase-to-ground fault is the series of positive-sequence, negative-sequence and zero-sequence networks, and therefore the positive-sequence, negative-sequence and zero-sequence component of the fault path current meet Equation (11):

. . . I A f ` “ I A f ´ “ I A f 0 (11) where I˙Af+ + I˙Am+ + I˙An+, I˙Af´ = I˙An´, and I˙Af0 = I˙m0 + I˙n0. The compound sequence network of the fault is shown in Figure 12. I˙dev represents the output positive-sequence current of the interconnector. Zm+ and Zn+ have the same meaning as Zfm and Zfn, respectively. In a negative-sequence network, the negative-sequence impedance between R1 and the fault location is nearly inﬁnite, and Zn´ is the negative-sequence impedance between R2 and the fault location, which equals to Zn+. Zm0 is the zero-sequence impedance between R1 and the fault location, and Zn0 is the zero-sequence impedance between R2 and the fault location. ZSeq+, ZSeq´ and ZSeq0 are equivalent positive-sequence impedance, negative-sequence impedance and zero-sequence impedance of the AC network at the back side of bus n, respectively. Other symbols have been mentioned in the preceding paragraphs. The impedance of the converter transformer is neglected in this paper. If the line-to-ground admittance is ignored, the relationship of the sequence currents is:

. . . . . I Am` ` I An` “ I An´ “ Im0 ` In0 (12)

The negative-sequence network only contains the bus n side of the fault location, and the zero-sequence network is the parallel circuit of zero-sequence equivalent impedances, ZΣm0 and ZΣn0, at each side of the fault location. Assuming that impedance angles of ZΣm0 and ZΣn0 are equal, I˙m0 is in phase with I˙n0, and in this case I˙Af+ and I˙Af´ (I˙An´) are also in phase with I˙n0 according to Equations (11) and (12). Energies 2016, 9, 400 14 of 27

According to Equation (12), B1 and B2 in Equations (9) and (10) can be expressed as Equations (13) and (14), respectively: . . 3 Im0 ` In0 B “ (13) 1 . ´ ¯. I Am` ` p1 ` Kq Im0 Energies 2016, 9, 400 . . 14 of 27 3 Im0 ` In0 Energies 2016, 9, 400 14 of 27 B2 “ . . . (14) ´3IImn00  ¯ I AnB ` ` Im0 ` p2 ` K q In0 (13) 1 IKI1 Am3 II   m0 It is assumed that the zero-sequence impedance mn00 angle of AC line is equal to positive-sequence B1  (13) IKIAm 1  m0 impedance angle in this paper, and therefore the3 zero-sequenceIImn00  compensation coefﬁcient K is a real B  (14) 2 ˙ ˙ ˙ number. According to the analysis above, ImIIKIAn0 is in m00 phase2   with n In0, IAm+ is directly controlled by the 3IImn00  B  (14) interconnector, and I˙An+ is provided by traditional2 voltage sources. It can be seen from Equations (13) It is assumed that the zero-sequence impedanceIIKIAn  m00  angle2   of n AC line is equal to positive-sequence and (14) thatimpedance the additional angle in this impedances paper, and therefore∆ZR1_ theA and zero-∆sequenceZR2_A are compensation determined coefficient by the K magnitudeis a real and It is assumed that˙ the zero˙ -sequence˙ impedance˙ angle of AC line is equal to positive-sequence phase relationshipnumber. According among toIAm the+, analysisIAn+, Im above,0 and İImn0 0is. in phase with İn0, İAm+ is directly controlled by the impedance angle in this paper, and therefore the zero-sequence compensation coefficient K is a real interconnector, and İAn+ is provided by traditional voltage sources. It can be seen from Equations (13) number. According to the analysis above, İm0 is in phase with İn0, İAm+ is directly. controlled by the and (14) that the additional impedances ΔZR1_A and ΔZR2_A are determined by the magnitude and 4.1.1. Analysisinterconnector, of the Phase and İAn Relationship+ is provided by between traditional Positive-Sequence voltage sources. It can Voltage be seenU froma` atEquations the Fault (13) Location phase relationship among İAm+, İAn+, İm0 and İn0. and I˙Am+ and (14) that the additional impedances ΔZR1_A and ΔZR2_A are determined by the magnitude and phase relationship among İAm+, İAn+, İm0 and İn0. Figure4.1.1. 12 A isnaly simpliﬁedsis of the Phase as FigureRelationship 13 for between the analysis Positive-Sequence below. Voltage It can beUa observedat the Fault that the phase . Location and İAm+ ˙ relationship4.1.1. between Analysis Uof athe` andPhaseIAm Relationship+ is related between to the Positive active-Sequence power PVoltage’ and reactiveUa at the power Fault Q’ which are injected intoLocation theFigure faultand 12 İAm is path+ simplified from as the Figure interconnector 13 for the analysis side ofbelow. the faultIt can location,be observed as that shown the phase in Figure 14, relationship between and İAm+ is related to the active power P’ and reactive power Q’ which are and is also relatedFigure to 12 the is simplified output active as Figure power 13 forP andthe analysis reactive below. power It canQ ofbe theobserved interconnector. that the phase According injected into the fault path from the interconnector side of the fault location, as shown in Figure 14, to Sectionrelationship2, if a ě between0.9 after fault,and İAm the+ is interconnectorrelated to the active can power still P’ work and reactive in all power four Q quadrants’ which are and the and is also related to the output. active power P and reactive power Q of the interconnector. injected into the fault path from the interconnector˙ side of the fault location, as shown˝ in Figure˝ 14, phase angleAccording difference to Section between 2, if aU ≥ a0.9` andafter Ifault,Am+ canthe interconnector be any value can in still the work range in ofall 0four–360 quadrants. If a < 0.9, the and is also related to the output active power P and reactive power Q of the interconnector. interconnectorand the can phase work angle in difference quadrant between I and the quadrantand İAm+ can II be where any valueQ ą in0 ,the and range the of phase 0°–360°. angle If a < by which According to Section 2, if a ≥ 0.9 after fault, the interconnector can still work in all four quadrants˝ ˝ the output0.9 positive-sequence, the interconnector can voltage work of in interconnector quadrant I and the leads quadrantI˙Am+ IIis where in the Q range 0 , and of 0 the–180 phase; if the line and the phase angle difference between and İAm+ can be any value in the range of 0°–360°. If a <. angle by which the output positive-sequence voltage of interconnector leads İAm+ is in the range of loss between0.9, the the interconnector interconnector can and work the in faultquadrant location I and isthe ignored, quadrant the II where phase Q angle 0 , and by thewhich phaseU a` leads ˙ 0°–180°; if the line loss ˝between˝ the interconnector and the fault location is ignored, the phase angle IAm+ is alsoangle in theby which range the of output 0 –180 positive. -sequence voltage of interconnector leads İAm+ is in the range of by which leads İAm+ is also in the range of 0°–180°. 0°–180°; if the line loss between the interconnector and the fault location is ignored, the phase angle by which leads İAm+ is also in the range of 0°–180°.

Figure 13. Simplified compound sequence network under a phase-A-to-ground fault at f1. Figure 13. Simpliﬁed compound sequence network under a phase-A-to-ground fault at f1. Figure 13. Simplified compound sequence network under a phase-A-to-ground fault at f1.

Figure 14. The relationship between the injected power from the interconnector side and the phase angle difference between U  and İAm+ Figure 14. The relationship abetween the injected power from the interconnector side and the phase Figure 14.angleThe difference relationship between between U and the İAm+ injected power from the interconnector side and the phase . a angle difference between Ua` and I˙Am+.

Energies 2016, 9, 400 15 of 27

Energies 2016, 9, 400 15 of 27 4.1.2. Analysis of the Range of the Angle of Additional Impedance 4.1.2. Analysis of the Range of the Angle of Additional Impedance . It can also be seen from Figure 13 that the phase angle by which Ua` leads I˙Af+ equals the Af+ It can also be seen from Figure 13 that the phase angle˝ ˝ by which Ua leads İ equals the impedance angle of 3Rf + ZΣ´ + ZΣ0, which is in the range of 0 –75 . Due to the fact I˙Af+ = I˙Am+ + I˙An+, impedance angle of 3Rf + ZΣ− + ZΣ0, which is in the range of 0°–75°. Due to the fact İAf+ = İAm+ + İAn+, the the phase angles of the three variables increase or decrease in the sequence of I˙Am+, I˙Af+ and I˙An+. The phase angles of the three variables increase or decrease in the sequence of İAm+, İAf+ and İAn+. The possible phase relationships among I˙Am+, I˙Af+ and I˙An+ are shown in Figure 15. possible phase relationships among İAm+, İAf+ and İAn+ are shown in Figure 15.

(a) (b) (c)

(d) (e) (f)

Figure 15. Possible phase relationships among positive-sequence component İAm+ of current provided Figure 15. Possible phase relationships among positive-sequence component I˙Am+ of current provided by the interconnector, positive-sequence component İAn+ of current provided by traditional voltage by the interconnector, positive-sequence component I˙An+ of current provided by traditional voltage sources, and positive-sequence component İAf+ of the fault path current: (a)-(c) İAm+ lags İAf+ and İAf+ sources, and positive-sequence component I˙Af+ of the fault path current: (a)–(c) I˙Am+ lags I˙Af+ and I˙Af+ lags İAn+; (d)-(f) İAm+ leads İAf+ and İAf+ leads İAn+. lags I˙An+;(d)–(f) I˙Am+ leads I˙Af+ and I˙Af+ leads I˙An+.

In Figure 15a–c, İAm+ lags İAf+ and İAf+ lags İAn+, and the phase angle difference between İAm+ and ˙ ˙ ˙ ˙ ˙ İAf+ increasesIn Figure from15a–c, FigureIAm+ lags15a toIAf 15c;+ and in IFigureAf+ lags 15dIAn–+f,, andİAm+ leads the phase İAf+ and angle İAf+ differenceleads İAn+, betweenand the phaseIAm+ ˙ ˙ ˙ ˙ ˙ andangleIAf + differenceincreases frombetween Figure İAm +15 anda to 15c;İAf+ decreases in Figure 15 fromd–f, FigureIAm+ leads 15d IAf to+ 15f.and TheIAf+ leads actualI An relationship+, and the ˙ ˙ phaseamong angle İAm+ difference, İAf+ and İ betweenAn+ is relatedIAm+ and to theIAf + outputdecreases power from of Figure the interconnector 15d to 15f. The and actual the relationship impedance ˙ ˙ ˙ amongangle ofIAm 3+R,f I+Af Z+ Σand− + ZIAnΣ0 +shownis related in Figure to the output 13. It can power be ofseen the from interconnector Equations and (13) the and impedance (14) that angleif İAm+ ˙ ˙ oflags 3R f İ+Af+Z Σand´ + İZAfΣ+ 0lagsshown İAn+ in, Δ FigureZR1_A 13will. It be can inductive be seen from and Equations ΔZR2_A will (13) be and capacitive, (14) that if andIAm +vicelags versa.IAf+ and I˙Af+ lags I˙An+, ∆ZR1_A will be inductive and ∆ZR2_A will be capacitive, and vice versa. According to According to the analysis above, the phase angle. by which leads İAf+ is in the range of 0°–75°. If ˝ ˝ the analysis above, the phase angle by which Ua`leads I˙Af+ is in the range of 0 –75 . If the phase angle the phase angle difference. between and İAm+ is in the range of 0°–360°, the phase angle ˝ ˝ difference between Ua` and I˙Am+ is in the range of 0 –360 , the phase angle difference between I˙Am+ difference between İAm+ and İAf+ (or İm0, İn0) will also˝ be˝ in the range of 0°–360°. According to İAn+ = İAf+ and I˙Af+ (or I˙m0, I˙n0) will also be in the range of 0 –360 . According to I˙An+ = I˙Af+ ´ I˙Am+, if |I˙Am+| > − İAm+, if İAm+ > İAf+, the phase angle difference between İAn+ and İAf+ (or İm0, İn0) will also be˝ in the˝ |I˙Af+|, the phase angle difference between I˙An+ and I˙Af+ (or I˙m0, I˙n0) will also be in the range of 0 –360 ; range of 0°–360°; if İAm+ < İAf+ and İAm+/İAf+ = d < 1, the phase angle difference between İAn+ if |I˙Am+| < |I˙Af+| and |I˙Am+|/|I˙Af+| = d < 1, the phase angle difference between I˙An+ and I˙Af+ (or I˙m0, and İAf+ (or İm0, İn0) will be in the range of [−arcsind,arcsind], which is a relatively small range. I˙n0) will be in the range of [´arcsind,arcsind], which is a relatively small range. Therefore in Equations Therefore in Equations (13) and (14), if the phase angle difference between İAm+ and (1 + K) İm+ is (13) and (14), if the phase angle difference between I˙Am+ and (1 + K) I˙m+ is large, and |I˙Am+| is close large, and İAm+ is close to (1 + K) İm0 or İAm+ >> (1 + K) İm0, the impedance angle of ΔZR1_A to |(1 + K) I˙m0| or |I˙Am+| >> |(1 + K) I˙m0|, the impedance angle of ∆ZR1_A will be probably quite will be probably quite large; similarly, if the phase angle difference between İAn+ and İm0 + (2 + K) İm0 large; similarly, if the phase angle difference between I˙An+ and I˙m0 + (2 + K) I˙m0 is large, and |I˙An+| is is large, and İAn+ is close to İm0 + (2 + K) İn0 or İAn+ >> İm0 + (2 + K) İn0, the impedance angle of close to |I˙m0 + (2 + K) I˙n0| or |I˙An+| >> |I˙m0 + (2 + K) I˙n0|, the impedance angle of ∆ZR2_A will be ΔZR2_A will be probably quite large. Therefore when a single-phase-to-ground fault happens on line probably quite large. Therefore when a single-phase-to-ground fault happens on line mn, the additional mn, the additional impedances caused by fault resistance can make the measured impedances of R1 impedances caused by fault resistance can make the measured impedances of R1 and R2 differ greatly and R2 differ greatly from Zfm and Zfn, and probably lead to malfunction of R1 and R2. Based on the analysis above, traditional ground distance elements in R1and R2 are unreliable. When a single-phase-to-ground fault with fault resistance happens on line mn and the fault resistance is not

Energies 2016, 9, 400 16 of 27

from Zfm and Zfn, and probably lead to malfunction of R1 and R2. Based on the analysis above, traditional ground distance elements in R1and R2 are unreliable. When a single-phase-to-ground fault with fault resistance happens on line mn and the fault resistance is not very large, the voltage of the interconnector AC bus drops dramatically, the magnitude and phase angle of its positive-sequence component change significantly after the fault, and the output characteristics of the interconnector are related to the operation state before the fault, fault location, fault resistance, etc. In this case, the output currents and voltages of the interconnector are controllable, and therefore the influence of the interconnector on the measured impedance of distance relays differs greatly from that of traditional voltage sources, which confirms the above analysis in this section. However, it is worth pointing out that if the fault resistance is very large, for example 50 Ω, the voltage of the interconnector AC bus drops very little, the output power of the interconnector is almost the same as before the fault, and the magnitude and phase angle of its positive-sequence component change insignificantly after the fault. Although the negative-sequence component of the output current is suppressed by the interconnector, the negative-sequence current is also very small when a single-phase-to-ground fault with large fault resistance happens on a traditional AC line. Therefore, under single-phase-to-ground fault conditions with a large fault resistance, there is no obvious difference between the output characteristics of the VSC-HVDC interconnector and those of the traditional voltage source whose output voltages before the fault are the same as the interconnector, and the impacts of the interconnector on distance relays are the same with this traditional voltage source. When a bolted phase-A-to-ground fault happens at f2, the impedance measured by the AG element in R1 is: . . 1 1 I Ah ` KIh0 ZR1_A “ Zmn ` Zf m ` Zf m . . (15) ˜ I Am ` KIm0 ¸

looooooooomooooooooon1 ZR1_A loooooooooooomoooooooooooon where I˙Ah is the phase A current which is injected into line ng from line nh, and I˙h0 is the zero-sequence component of I˙Ah. Similar to the analysis on the non-bolted single-phase-to-ground fault that happens at f1, since the magnitude and phase relationship among I˙Ah+, I˙Am+ and other components in C1 is influenced by the operation state of the interconnector before fault, the FRT strategy of the interconnector and actual fault conditions, the magnitude and impedance angle of the additional term ∆Z’R1_A are uncertain, which may lead to malfunction of R1. Similarly, R2 may misoperate when a backward fault happens. The applicability analysis on ground distance elements in R3–R6 is similar to that on phase elements. Since the currents flowing through R3–R6 are not only provided by the interconnector, the measured impedances of ground distance elements in R3–R6 are mainly influenced by the magnitude and phase relationship of currents provided by traditional voltage sources, and are scarcely influenced by the output currents of the interconnector. Based on the analysis presented in Sections3 and4 it can be seen that traditional phase-to-phase distance protection principle and ground distance protection principle are still applicable to AC lines which are not directly emanating from the VSC-HVDC interconnector.

4.2. Simulation Results The simulation model and quadrilateral relays in Section 3.3 are employed to verify the theoretical analysis in Section 4.1.

4.2.1. Case 1

The output power of the VSC-HVDC interconnector at the MMC-2 side is P0 = 200 MW and Q0 = 0 MVar before the fault. A phase-A-to-ground fault with 20 Ω fault resistance happens on line mn at 1 s, and the distance between R1 and the fault location is 10 km. The positive-sequence Energies 2016, 9, 400 17 of 27 are shown in Figure 16. As displayed in Figure 16a, the negative-sequence component İAn− is in phase with İm0 and İn0, and İAm− is nearly zero, which agrees with the theoretical analysis in Section Energies 2016, 9, 400 17 of 27 4.1. It can be seen from Figure 16b that İAm+ leads İAn− and İAn− leads İAn+, namely that İAm+ leads İAf+ and İAf+ leads İAn+, which matches with the phase relationship shown in Figure 15f. ZR1_A = 16.654components,3.2° Ω negative-sequence, ZR1_A = 15.866− 10.9° components Ω, and andthe AG zero-sequence element in componentsR1 operates ofcorrectly, the currents as shown ﬂowing in Figurethrough 16c R1. Z andR2_A R2,= 50.239 as well39.5° as the Ω impedances, ZR2_A = 40.902 measured29.4° Ω by, and the AGthe elementsAG element in R1 in andR2 fails R2, areto trip, shown as shownin Figure in Figure16. As 16d displayed. in Figure 16a, the negative-sequence component I˙An´ is in phase with I˙m0 andSinceI˙n 0the, and magnitudeI˙Am´ is nearly and phase zero, whichangle of agrees İAm+ are with directly the theoretical controlled analysis by the ininterconnector, Section 4.1. It and can İbeAm+seen + İAn+ from = İAf+ Figure= İAf− = 16İAfb0, thatthe magnitudeI˙Am+ leads andI˙An´ phaseand I˙angleAn´ leads of İAnI˙+An are+, also namely influenced that I˙Am by+ leadsthe controlI˙Af+ and of ˝ theI˙Af+ interconnector.leads I˙An+, which It can matches be seen with from the phasethis simulation relationship that shown İAm+ leads in Figure İAn− (or15f. İmZ0,R 1_İn0A) =by 16.654 29.0°,= and3.2 ˝ thereforeΩ, ZR1_A =ZR 15.8661_A is = slightly´10.9 Ω capacitive, and the withAG element a small in impedance R1 operates angle correctly, and as R1 shown operates in Figure correctly. 16c. ˝ ˝ However,ZR2_A = 50.239 İAn+ lags=39.5 İAn− Ω(or, Z İRm02_, İAn0=) by 40.902 109.7°,=29.4 andΩ therefore, and the Z AGR2_A elementis inductive in R2 and fails the to impedance trip, as shown angle in ofFigure ZR2_A 16 isd. large, which makes R2 fail to trip.

(a) (b)

Figure 16. Sequence components of the fault currents and measured impedances in Case 1: (a) The Figure 16. Sequence components of the fault currents and measured impedances in Case 1: (a) The sequence components of the currents flowing through R1 and R2; (b) Phase angles of the sequence sequence components of the currents ﬂowing through R1 and R2; (b) Phase angles of the sequence components; (c) Measured impedance of the AG element in R1; (d) Measured impedance of the AG components; (c) Measured impedance of the AG element in R1; (d) Measured impedance of the AG element in R2. element in R2.

4.2.2. Case 2 Since the magnitude and phase angle of I˙Am+ are directly controlled by the interconnector, and The output power of the VSC-HVDC interconnector at the MMC-2 side is P0 = −100 MW and Q0 I˙Am+ + I˙An+ = I˙Af+ = I˙Af´ = I˙Af0, the magnitude and phase angle of I˙An+ are also inﬂuenced by the = 0 MVar before the fault. A phase-A-to-ground fault with 10 Ω fault resistance happens on line mn control of the interconnector. It can be seen from this simulation that I˙Am+ leads I˙An´ (or I˙m0, I˙n0) by at 1˝ s, and the distance between R1 and the fault location is 30 km. The positive-sequence 29.0 , and therefore ZR1_A is slightly capacitive with a small impedance angle and R1 operates correctly. components, negative-sequence components ˝ and zero-sequence components of currents flowing However, I˙An+ lags I˙An´ (or I˙m0, I˙n0) by 109.7 , and therefore ZR2_A is inductive and the impedance through R1 and R2, as well as the impedances measured by the AG elements in R1 and R2, are angle of ZR2_A is large, which makes R2 fail to trip. shown in Figure 17. As shown in Figure 17a, İAn− is in phase with İm0 and İn0 , and İAm− is nearly zero, which4.2.2. Caseis the 2 same as Case 1. It can be seen from Figure 16b that İAn+ leads İAn− and İAn− leads İAm+, namely that İAn+ leads İAf+ and İAf+ leads İAm+, which matches with the phase relationship shown in The output power of the VSC-HVDC interconnector at the MMC-2 side is P0 = ´100 MW and Figure 15b. ZR1_A = 38.33254.3° Ω, ZR1_A = 27.22145.1° Ω, and the AG element in R1 fails to trip, as Q0 = 0 MVar before the fault. A phase-A-to-ground fault with 10 Ω fault resistance happens on line mn shown in Figure 17c. ZR2_A = 8.38518.8° Ω, ZR2_A = 6.998−10.3° Ω, and the AG element in R2 at 1 s, and the distance between R1 and the fault location is 30 km. The positive-sequence components, operates correctly, as shown in Figure 17d. In this case, İAm+ lags İAn− (or İm0, İn0) by 138.8°, and negative-sequence components and zero-sequence components of currents ﬂowing through R1 and therefore ZR1_A is inductive and the impedance angle of ZR1_A is large, which makes R1 fail to trip. R2, as well as the impedances measured by the AG elements in R1 and R2, are shown in Figure 17. İAn+ leads İAn− (or İm0, İn0) by 22.5°, and therefore ZR2_A is slightly capacitive with a small impedance As shown in Figure 17a, I˙An´ is in phase with I˙m0 and I˙n0, and I˙Am´ is nearly zero, which is the angle and R2 operates correctly. same as Case 1. It can be seen from Figure 16b that I˙An+ leads I˙An´ and I˙An´ leads I˙Am+, namely that I˙An+ leads I˙Af+ and I˙Af+ leads I˙Am+, which matches with the phase relationship shown in Figure 15b. ˝ ˝ ZR1_A = 38.332=54.3 Ω, ZR1_A = 27.221=45.1 Ω, and the AG element in R1 fails to trip, as shown ˝ ˝ in Figure 17c. ZR2_A = 8.385=18.8 Ω, ZR2_A = 6.998=´10.3 Ω, and the AG element in R2 operates Energies 2016, 9, 400 18 of 27

The simulation results in this section show that under non-bolted single-phase-to-ground Energies 2016, 9, 400 18 of 27 faults on line mn, the magnitude and phase angle of output positive-sequence currents of the interconnector are controllable, which has a great influence on the magnitude and phase ˝ relationshipcorrectly, as shown among in the Figure positive 17d.- Insequence this case, components,I˙Am+ lags I˙An ´ negative(or I˙m0-,sequenceI˙n0) by 138.8 components,, and therefore and zeroZR1_-Asequenceis inductive compon and theents impedance of the fault angle currents. of ZR1_A Thereforeis large, which the makes magnitude R1 fail and to trip. angleI˙An + ofleads the ˝ additionalI˙An´ (or I˙m impedances0, I˙n0) by 22.5 measured, and therefore by groundZR2_A distanceis slightly elements capacitive in withR1 and a small R2 are impedance influenced angle by andthe interconnector,R2 operates correctly. which may lead to malfunction of R1 and R2.

(a) (b)

Figure 17. Sequence components of the fault currents and measured impedances in Case 2: (a) The Figure 17. Sequence components of the fault currents and measured impedances in Case 2: (a) The sequence components of the currents flowing through R1 and R2; (b) Phase angles of the sequence sequence components of the currents flowing through R1 and R2; (b) Phase angles of the sequence components; (c) Measured impedance of the AG element in R1; (d) Measured impedance of the AG components; (c) Measured impedance of the AG element in R1; (d) Measured impedance of the AG element in R2. element in R2. 5. Applicability Analysis of Pilot Protection The simulation results in this section show that under non-bolted single-phase-to-ground faults on lineThe mn, analysis the magnitude in Section and 3phase and angle Section of output 4 reveals positive-sequence that due to currents the internal of the control interconnector of the VSCare controllable,-HVDC interconnector, which has the a great output influence characteristics on the magnitudeof the interconnector and phase diff relationshiper greatly from among those the ofpositive-sequence traditional voltage components, sources, negative-sequence which may lead components,to malfunction ands zero-sequenceof phase elements components and ground of the distancefault currents. elements Therefore in the the distance magnitude relays and angle installed of the on additional lines emanating impedances from measured the VSC by- groundHVDC interconnector.distance elements Traditional in R1 and distance R2 are influenced protection by princi the interconnector,ples employed which in R1 mayand leadR2 cannot to malfunction satisfy the of basicR1 and requirements R2. of reliability and selectivity for power system relay protection. As is known, pilot protection is widely applied in traditional high voltage transmission lines. Common protection principles5. Applicability include Analysis the pilot of distancePilot Protection protection principle, pilot directional protection principle, phase differential protection principle, current differential protection principle, etc. According to the The analysis in Sections3 and4 reveals that due to the internal control of the VSC-HVDC analysis above, pilot distance protection is inapplicable to line mn. Since the magnitude and phase interconnector, the output characteristics of the interconnector differ greatly from those of traditional angle of output currents of the interconnector are controllable and the interconnector can work in voltage sources, which may lead to malfunctions of phase elements and ground distance elements all four quadrants after fault, pilot directional protection principle and phase differential protection in the distance relays installed on lines emanating from the VSC-HVDC interconnector. Traditional principle are also inapplicable to line mn. There are many forms of restraint characteristics distance protection principles employed in R1 and R2 cannot satisfy the basic requirements of reliability employed in current differential protection, such as ratio restraint characteristic and scalar product and selectivity for power system relay protection. As is known, pilot protection is widely applied in restraint characteristic, but these characteristics are all based on that the phase angle difference of traditional high voltage transmission lines. Common protection principles include the pilot distance the currents flowing through both sides of the line is different between internal and external faults. protection principle, pilot directional protection principle, phase differential protection principle, Assuming that the current differential protection with ratio restraint characteristic is employed for current differential protection principle, etc. According to the analysis above, pilot distance protection line mn, the operating criterion employed in the protection is: is inapplicable to line mn. Since the magnitude and phase angle of output currents of the interconnector are controllable and the interconnector can work in all four quadrants after fault, pilot directional IKIIdiff res res op (16) protection principle and phase differential protection principle are also inapplicable to line mn. There are many forms of restraint characteristics employed in current differential protection, such as ratio restraint characteristic and scalar product restraint characteristic, but these characteristics are all based Energies 2016, 9, 400 19 of 27

on that the phase angle difference of the currents ﬂowing through both sides of the line is different between internal and external faults. Assuming that the current differential protection with ratio restraint characteristic is employed for line mn, the operating criterion employed in the protection is:

. . Energies 2016, 9, 400 Idi f f ě Kres Ires ` Iop 19 of(16) 27 ˇ ˇ ˇ ˇ ˇ ˇ ˇ ˇ wherewhere Kresres isis a a restraint restraint coefficient coefficient which ˇ is usuallyˇ takentakenˇ ˇ asas 0.50.5 oror 11 [[2244],],I ˙İdiffdiff == I˙İm + İI˙nn andand represents represents thethe phasor phasor sum sum of of the phase currents flowingflowing throughthrough bothboth sidessides ofof thethe protectedprotected line,line,I˙ resİres == I˙İmm ´− İI˙nn, , andand KKresres|İresI˙res|is is a a common common restraint restraint current. current. When When fault fault happens happens on on line line mn mn and and the the phase phase angle angle differencedifference between between the the currents currents flowing flowing through through both both sides sides of of the the line line is is close close to to 180°, 180˝, the the operating operating quantityquantity  |İI˙diff| may may be be smaller smaller than than the restraint quantity KKresres|İI˙resres|++ İopI˙op, ,which which may may lead lead to to failure failure of of thethe protection. protection. TakeTake a three-phasethree-phase faultfault withwith 10- 10Ω-Ωfault fault resistance resistance that that happens happens on on line line mn mn at 1at s as1 s example. as example. The Theoutput output power power of the of VSC-HVDC the VSC-HVDC interconnector interconnector at the at MMC-2 the MMC side-2 is sideP0 = is´ P1000 = MW−100 andMWQ and0 = 0Q MVar0 = 0 MVarbefore before the fault, the andfault, the and distance the distance between between R1 and R1 fault and location fault location is 10 km. is Phase10 km. A Phase currents A currents flowing flowingthrough through both sides both of line sides mn of and line their mn phase and angles, their phase as well angles, as I˙diff , asI˙Ares welland as their İdiff, magnitudesİAres and their are magnitudesshown in Figure are shown 18. After in Figure the fault 18. the After phase the anglefault thedifference phase angle between difference phase A between currents phase flowing A ˝ ˝ currentsthrough bothflowing sides through of line mnboth changes sides of from line 180mn changesto 153.5 ,from and this180° change to 153.5°, is not and significant. this change |I˙Ares is not| is significant.about 2.02 timesİAres larger is about than 2.02 |I˙ difftimes|, and larger the than relays İ faildiff to, and trip the the relays line. fail to trip the line.

(a) (b)

Figure 18. İAm, İAn, İdiff, and İAres: (a) İAm and İAn; (b) Phase angles of İAm and İAn; (c) İdiff and İAres (d) Figure 18. I˙Am, I˙An, I˙diff, and I˙Ares:(a) I˙Am and I˙An;(b) Phase angles of I˙Am and I˙An;(c) I˙diff and I˙Ares Magnitudes of İdiff and İAres. (d) Magnitudes of I˙diff and I˙Ares. For AC lines that are not directly emanating from the VSC-HVDC interconnector, the measured currentsFor of AC the lines relays that installed are not directly on these emanating lines are fromnot only the VSC-HVDCprovided by interconnector, the interconnector, the measured and the magnitudecurrents of and the relaysphase relationship installed on between these lines fault are currents not only flowing provided through by the both interconnector, sides of these and lines the aftermagnitude fault areand similarphase relationship to the relationships between fault in currents tradition ﬂowingal AC system.through bothTherefore sides of traditional these lines pilot after protectionfault are similar principles to the are relationships still applicable in traditional to AC lines AC system. that are Therefore not directly traditional emanating pilot protection from the interconnector.principles are still Based applicable on the analysisto AC lines above, that it are is not necessary directly to emanating develop a from novel the pilot interconnector. protection principleBased on for the AC analysis lines emanating above, it is from necessary the interconnector. to develop a novel pilot protection principle for AC lines emanating from the interconnector. 6. A Novel Pilot Protection Principle and Verification Through the analysis presented in previous sections, traditional distance protection and pilot protection are not applicable to lines emanating from the VSC-HVDC interconnector. In this section, a novel pilot protection principle is put forward for these lines, and the validity of the principle is verified by simulation results. Line mn in Figure 1 is taken as example for the study in this section.

Energies 2016, 9, 400 20 of 27

6. A Novel Pilot Protection Principle and Veriﬁcation Through the analysis presented in previous sections, traditional distance protection and pilot protection are not applicable to lines emanating from the VSC-HVDC interconnector. In this section, a novel pilot protection principle is put forward for these lines, and the validity of the principle is veriﬁed by simulation results. Line mn in Figure1 is taken as example for the study in this section.

6.1. A Protection Principle Based on the Magnitude Comparison of Currents Flowing through Both Sides of the Line According to the FRT strategy and output characteristics of the interconnector after a fault which are presented in Section2, when an internal unbalanced fault happens on line mn, for example at f1 in Figure1, the negative-sequence currents flowing through bus m side of the line are nearly zero, since the inner negative-current control loops of the interconnector are aimed at eliminating negative-sequence currents; but the negative-sequence currents flowing through bus n side of the line are very large. When an external unbalanced fault happens at the traditional AC side, for example at f2 in Figure1, the negative-sequence currents flowing through both sides of line mn are close to zero. When an external unbalanced fault happens at the interconnector side, for example at f0 in Figure1, the negative-sequence currents flowing through both sides of line mn are approximately equal in magnitude and usually large. It should be noticed that the fault located outside of line mn is called an external fault in this paper. Therefore, if a communication channel is installed on line mn, the ratio between the negative-sequence currents flowing through both sides of line mn can be utilized to identify whether an unbalanced fault is an internal fault or an external fault. When a balanced fault happens, the negative-sequence components of currents and voltages only exist in the transient process after the fault and decay to nearly zero soon, and there are many non-integer harmonics included in these transient components. Since the internal control of the interconnector is based on fundamental frequency, and the control system take a transient process to respond to the output negative-sequence currents whose speed is related to the parameters of the controller and actual fault conditions, it is unreliable to identify whether a balanced fault is an internal fault or an external fault according to the ratio between negative-sequence currents flowing through both sides of line mn, even though the output negative-sequence currents of the interconnector can be restrained to some extent during the transient process after the fault. Therefore it is necessary to develop a separate protection principle to identify whether a balanced fault is an internal fault or an external fault. When an internal balanced fault happens on line mn, for example at f1 in Figure1, the phase currents flowing through bus n side of the line increase significantly since the fault impedance under balanced fault is usually not very large; while the phase currents flowing through bus m side of the line are limited due to the FRT strategy of the interconnector. When an external balanced fault happens, for example at f0 or f2 in Figure1, phase currents flowing through both sides of line are approximately equal. Therefore, the ratio between the phase currents flowing through both sides of line mn can be utilized to identify whether a balanced fault is an internal fault or an external fault. For unbalanced faults, the operating criterion based on the ratio between negative-sequence currents flowing through both sides of line mn is:

In´ pU ě U or I ě I or I ě I q and I ą I and ą K (17) m´ th´ m0 th0 n0 th0 n´ th´ I th1 ˆ m´ ˙ where Um´, I˙m´, I˙m0 are magnitudes of negative-sequence voltage, negative-sequence current and zero-sequence current which are measured by the relay installed at bus m side, respectively; I˙n´, and I˙n0 are magnitudes of negative-sequence current and zero-sequence current which are measured by the relay installed at bus n side, respectively. Um´ ě Uth´, Im0 ě Ith0 together with In0 ě Ith0 are used to distinguish between unbalanced faults and balanced faults on line mn. Uth´ is the threshold of negative-sequence voltage and it should be larger than the maximum negative-sequence voltage during initial transient process of balanced faults. The overcurrent criteria Im0 ě Ith0 and In0 ě Ith0 are Energies 2016, 9, 400 21 of 27 introduced to consolidate the operating criterion shown in Equation (17) when some ground fault happens on line mn and Um´ < Uth´. Ith0 is the threshold of zero-sequence current and it should be larger than the maximum unbalanced current during three-phase faults. Kth1 is the threshold of the ratio between negative-sequence currents, and it cannot be too large or too small in order to guarantee the sensitivity and reliability of the protection. When an external unbalanced fault happens at the back side of bus n, both In´ and Im´ are nearly zero, but In´/Im´ may be larger than Kth1 due to the measurement error of current transformers or other factors. Therefore the negative-sequence overcurrent criterion In´ > Ith´ is introduced to prevent the protection from misoperating in this situation. Ith´ is the threshold of negative-sequence current and it should be larger than the maximum unbalanced current during external unbalanced faults at the back side of bus n. For balanced faults, the operating criterion based on the ratio between phase currents ﬂowing through both sides of line mn is:

Iϕn Um´ ă Uth´ and Im0 ă Ith0 and In0 ă Ith0 and ą Kth2 (18) Iϕm where ϕ can represent phase A, phase B or phase C; Iϕm and Iϕn are phase currents ﬂowing through bus m side and bus n side, respectively. Kth2 is the threshold of the ratio between phase currents, and it should be set as a constant larger than 1, taking into account the most undesirable situation in which an internal three-phase fault with fault resistance happens near bus m. It should be pointed out that when an external grounded fault with high fault resistance happens at the interconnector side, for example at f0 in Figure1, or an external phase-to-phase ungrounded fault happens at the traditional AC side and is far away from bus n, the fault is detected as a balanced fault because Um´ < Uth´, Im0 < Ith0 and In0 < Ith0. However, Iϕn/Iϕm equals to 1 under these external faults, and therefore the balanced-fault element based on the operating criterion shown in Equation (18) does not misoperate. The reliability of the protection can be ensured.

6.2. Veriﬁcation The simulation model in Section 3.3 is employed in this section, and the protection principle proposed in Section 6.1 is applied to line mn. A lot of simulations are carried out to prove the feasibility of the protection principle. The thresholds of the protection are Uth´ = 15 kV, Ith0 = 0.1 kA, Ith´= 0.1 kA, Kth1 = 5, and Kth2 = 1.5. The sampling frequency is 1.6 kHz, and phasor estimation is performed by the Fast Fourier Transform (FFT) algorithm [25].

6.2.1. Internal Unbalanced Fault

The output power of the VSC-HVDC interconnector at the MMC-2 side is P0 = 200 MW and Q0 = 0 MVar before the fault. A phase-A-to-ground fault with 50-Ω fault resistance happens on line mn at 1 s, and the distance between bus m and the fault location is 30 km. Um´, Im0, In0, Im´, In´, In´/Im´ and IAn/IAm which are measured by the relays on line mn, as well as the trip signal for unbalanced fault are shown in Figure 19. As displayed in Figure 19a, Um´ is below the threshold Uth´ all the time due to the high fault resistance, but it can be seen from Figure 19b that after 20 ms from the fault inception, both Im0 and In0 are larger than the threshold Ith0. Therefore, the fault is detected as an unbalanced fault. It can be seen from Figure 19c that In´ is larger than the threshold Ith´ after 20 ms from the fault inception. Meanwhile, the ratio In´/Im´ is larger than 5, as shown in Figure 19d. Besides, In´/Im´ is still increasing after 1.02 s since the output negative-sequence current Im´ of the interconnector is still decreasing, as shown in Figure 19c. At 1.04 s, Im´ is restrained to nearly zero, and In´/Im´ is larger than 80. The unbalanced fault is correctly detected by the unbalanced-fault element based on the operating criterion shown in Equation (17), as shown in Figure 19f. It can be seen from Figure 19e that the ratio IAn/IAm is smaller than 1 after the fault, and therefore the criterion Iφn/Iφm > Kth2 cannot be utilized to identify an internal unbalanced fault. This case shows that the proposed protection principle has the ability to eliminate the inﬂuence of the fault resistance. Energies 2016, 9, 400 21 of 27

For balanced faults, the operating criterion based on the ratio between phase currents flowing through both sides of line mn is:

Iφn UUIIIm thand m0  th 0 and n 0 IK th 0an d  th 2 (18) Iφm

where φ can represent phase A, phase B or phase C; Iφm and Iφn are phase currents flowing

through bus m side and bus n side, respectively. Kth2 is the threshold of the ratio between phase currents, and it should be set as a constant larger than 1, taking into account the most undesirable situation in which an internal three-phase fault with fault resistance happens near bus m. It should be pointed out that when an external grounded fault with high fault resistance happens at the interconnector side, for example at f0 in Figure 1, or an external phase-to-phase ungrounded fault happens at the traditional AC side and is far away from bus n, the fault is detected as a balanced fault because Um− < Uth−, Im0 < Ith0 and In0 < Ith0. However, Iφn/Iφm equals to 1 under these external faults, and therefore the balanced-fault element based on the operating criterion shown in Equation (18) does not misoperate. The reliability of the protection can be ensured.

6.2. Verification The simulation model in Section 3.3 is employed in this section, and the protection principle proposed in Section 6.1 is applied to line mn. A lot of simulations are carried out to prove the feasibility of the protection principle. The thresholds of the protection are Uth− = 15 kV, Ith0 = 0.1 kA, Ith−= 0.1 kA, Kth1 = 5, and Kth2 = 1.5. The sampling frequency is 1.6 kHz, and phasor estimation is performed by the Fast Fourier Transform (FFT) algorithm [25].

6.2.1. Internal Unbalanced Fault

The output power of the VSC-HVDC interconnector at the MMC-2 side is P0 = 200 MW and Q0 = 0 MVar before the fault. A phase-A-to-ground fault with 50-Ω fault resistance happens on line mn at 1 s, and the distance between bus m and the fault location is 30 km. Um−, Im0, In0, Im−, In−, In−/Im− and IAn/IAm which are measured by the relays on line mn, as well as the trip signal for unbalanced fault are shown in Figure 19. As displayed in Figure 19a, Um− is below the threshold Uth− all the time due to the high fault resistance, but it can be seen from Figure 19b that after 20 ms from the fault inception, both Im0 and In0 are larger than the threshold Ith0. Therefore, the fault is detected as an unbalanced fault. It can be seen from Figure 19c that In− is larger than the threshold Ith− after 20 ms from the fault inception. Meanwhile, the ratio In−/Im− is larger than 5, as shown in Figure 19d. Besides, In−/Im− is still increasing after 1.02 s since the output negative-sequence current Im− of the interconnector is still decreasing, as shown in Figure 19c. At 1.04 s, Im− is restrained to nearly zero, andEnergies In−2016/Im− , 9is, 400 larger than 80. The unbalanced fault is correctly detected by the unbalanced22-fault of 27 element based on the operating criterion shown in Equation (17), as shown in Figure 19f.

Energies 2016, 9, 400 22 of 27 (a) (b)

(e) (f)

Figure 19. Values detected by relays and the trip signal under an internal phase-A-to-ground fault: Figure 19. Values detected by relays and the trip signal under an internal phase-A-to-ground fault: (a) Magnitude of negative-sequence voltage at bus m side of line mn; (b) Magnitudes of (a) Magnitude of negative-sequence voltage at bus m side of line mn; (b) Magnitudes of zero-sequence zero-sequence currents at both sides of line mn; (c) Magnitudes of negative-sequence currents at both currents at both sides of line mn; (c) Magnitudes of negative-sequence currents at both sides of line mn; sides of line mn; (d) The ratio between negative-sequence currents flowing through both sides of (d) The ratio between negative-sequence currents flowing through both sides of line mn; (e) The ratio line mn; (e) The ratio between phase A currents flowing through both sides of line mn; (f) The trip between phase A currents flowing through both sides of line mn; (f) The trip signal for unbalanced fault. signal for unbalanced fault. 6.2.2. Internal Balanced Fault It can be seen from Figure 19e that the ratio IAn/IAm is smaller than 1 after the fault, and thereforeThe outputthe criterion power Iϕ ofn/Iϕ them > VSC-HVDCKth2 cannot be interconnector utilized to identify at the MMC-2an internal side unbalanced is P0 = ´100 fault. MW This and caseQ0 = shows 0 MVar that before the proposed the fault. Aprotection three-phase principle fault withhas the 10 Ωabilityfault resistanceto eliminate happens the influence on line of mn the at fault1 s, and resistance. the distance between bus m and the fault location is 10 km. Um´, Im0, In0, Im´, In´, In´/Im´ and IAn/IAm, as well as the trip signal for balanced fault are shown in Figure 20. It can be seen 6from.2.2. Internal Figure 20 Balanceda,b that UFaultm´ is below the threshold Uth´ during the transient process after fault, and both Im0 and In0 are zero all the time. Therefore, the fault is detected as a balanced fault. Although The output power of the VSC-HVDC interconnector at the MMC-2 side is P0 = −100 MW and Q0 I > I and I /I > K are simultaneously satisfied in a short period after 20 ms from the fault = n0´ MVarth´ beforen ´the mfault.´ Ath three1 -phase fault with 10 Ω fault resistance happens on line mn at 1 s, inception, as shown in Figure 20c,d, the unbalanced-fault element does not misoperate. Meanwhile, and the distance between bus m and the fault location is 10 km. Um−, Im0, In0, Im−, In−, In−/Im− and IAn/IAm, it can also be seen from Figure 20d that I /I > K is satisfied only in a very short period after as well as the trip signal for balanced faultn´ arem shown´ th in1 Figure 20. It can be seen from Figure 20a,b 1.02 s, and therefore it is unreliable to identify an internal balanced fault based on the ratio between that Um− is below the threshold Uth− during the transient process after fault, and both Im0 and In0 are negative-sequence currents at both sides of line mn during the transient process after the fault. zero all the time. Therefore, the fault is detected as a balanced fault. Although In− > Ith− and In−/Im− > As displayed in Figure 20e, after 20 ms from the fault inception, the ratio between phase A Kth1 are simultaneously satisfied in a short period after 20 ms from the fault inception, as shown in currents at both sides of line mn is close to the steady state 2.35 and therefore the balanced fault is Figure 20c,d, the unbalanced-fault element does not misoperate. Meanwhile, it can also be seen correctly detected by the balanced-fault element, as shown in Figure 20f. The fault impedance under from Figure 20d that In−/Im− > Kth1 is satisfied only in a very short period after 1.02 s, and therefore it three-phase faults is usually small. The smaller the fault impedance is, the larger Iϕ /Iϕ will be in is unreliable to identify an internal balanced fault based on the ratio between negativen m-sequence this case. Therefore, the proposed protection principle can identify internal balanced faults correctly. currents at both sides of line mn during the transient process after the fault.

(a) (b)

Energies 2016, 9, 400 22 of 27

(e) (f)

Figure 19. Values detected by relays and the trip signal under an internal phase-A-to-ground fault: (a) Magnitude of negative-sequence voltage at bus m side of line mn; (b) Magnitudes of zero-sequence currents at both sides of line mn; (c) Magnitudes of negative-sequence currents at both sides of line mn; (d) The ratio between negative-sequence currents flowing through both sides of line mn; (e) The ratio between phase A currents flowing through both sides of line mn; (f) The trip signal for unbalanced fault.

It can be seen from Figure 19e that the ratio IAn/IAm is smaller than 1 after the fault, and therefore the criterion Iϕn/Iϕm > Kth2 cannot be utilized to identify an internal unbalanced fault. This case shows that the proposed protection principle has the ability to eliminate the influence of the fault resistance.

6.2.2. Internal Balanced Fault

The output power of the VSC-HVDC interconnector at the MMC-2 side is P0 = −100 MW and Q0 = 0 MVar before the fault. A three-phase fault with 10 Ω fault resistance happens on line mn at 1 s, and the distance between bus m and the fault location is 10 km. Um−, Im0, In0, Im−, In−, In−/Im− and IAn/IAm, as well as the trip signal for balanced fault are shown in Figure 20. It can be seen from Figure 20a,b that Um− is below the threshold Uth− during the transient process after fault, and both Im0 and In0 are zero all the time. Therefore, the fault is detected as a balanced fault. Although In− > Ith− and In−/Im− > Kth1 are simultaneously satisfied in a short period after 20 ms from the fault inception, as shown in Figure 20c,d, the unbalanced-fault element does not misoperate. Meanwhile, it can also be seen from Figure 20d that In−/Im− > Kth1 is satisfied only in a very short period after 1.02 s, and therefore it isEnergies unreliable2016, 9, to 400 identify an internal balanced fault based on the ratio between negative-sequen23 ofce 27 currents at both sides of line mn during the transient process after the fault.

Energies 2016, 9, 400 (a) (b) 23 of 27

(e) (f)

Figure 20. Values detected by relays and the trip signal under an internal balanced fault: (a) Magnitude Figure 20. Values detected by relays and the trip signal under an internal balanced fault: (a) Magnitude of negative-sequence voltage at bus m side of line mn; (b) Magnitudes of zero-sequence currents at of negative-sequence voltage at bus m side of line mn; (b) Magnitudes of zero-sequence currents at both sides of line mn; (c) Magnitudes of negative-sequence currents at both sides of line mn; (d) The both sides of line mn; (c) Magnitudes of negative-sequence currents at both sides of line mn; (d) The ratio between negative-sequence currents flowing through both sides of line mn; (e) The ratio between ratio between negative-sequence currents ﬂowing through both sides of line mn; (e) The ratio between phase A currents flowing through both sides of line mn; (f) The trip signal for balanced fault. phase A currents ﬂowing through both sides of line mn; (f) The trip signal for balanced fault.

As displayed in Figure 20e, after 20 ms from the fault inception, the ratio between phase A 6.2.3. External Fault currents at both sides of line mn is close to the steady state 2.35 and therefore the balanced fault is correctlyThe detected output power by the ofbalanced the VSC-HVDC-fault element, interconnector as shown atin theFigure MMC-2 20f. The side fault is P 0impedance= ´100 MW under and threeQ0 =- 0phase MVar faults before is theusually fault. small. An external The smaller bolted the phase-A-to-ground fault impedance is, fault the larger happens Iφn/I atφm f0, wi asll be shown in this in case.Figure Therefore,1, and f0 the is near proposed bus m. protection The fault principle starting time can identify is also 1 internal s. Um´ ,balancedIm0, In0, Ifaultsm´, I ncorrectly.´ and In´ /Im´ are shown in Figure 21. 6.2.3. AsExternal displayed Fault in Figure 21a, Um´ exceeds the threshold Uth´ after the fault, and therefore the fault is detected as an unbalanced fault. As shown in Figure 21c, In´ > Ith´ after 20 ms from the fault The output power of the VSC-HVDC interconnector at the MMC-2 side is P0 = −100 MW and Q0 =inception 0 MVar andbefore the the negative-sequence fault. An external currents bolted flowing phase- throughA-to-ground both sidesfault ofhappens line mn at are f0, approximately as shown in equal. Therefore, In´/Im´ remains 1 after 20 ms from the fault inception, as shown in Figure 21d, and Figure 1, and f0 is near bus m. The fault starting time is also 1 s. Um−, Im0, In0, Im−, In− and In−/Im− are showntherefore in Figure the unbalanced-fault 21. element does not misoperate. When a balanced fault happens at f0, the fault is detected as a balanced fault, but the ratio between phase currents flowing through both sides of line mn remains 1. Therefore, the protection does not misoperate. Simulation results are omitted here. The output power of the VSC-HVDC interconnector at the MMC-2 side is P0 = 200 MW and Q0 = 0 MVar before the fault. A bolted three-phase fault happens on line ng at 1 s, and the distance between bus n and the fault location is 10 km. Um´, Im0, In0, and IAn/IAm are shown in Figure 22. It can be seen from Figure 22a,b that Um´ is below the threshold Uth´ all the time, and both Im0 and In0 are zero all the time. Therefore, the fault is detected as a balanced fault. As shown in Figure 22c, the ratio between phase currents flowing through both sides of line mn remains 1, and therefore the balanced-fault element does(a) not misoperate. When an unbalanced fault happens(b) here, the protection does not misoperate either. Simulation results are omitted.

Figure 21. Values detected by relays under an external phase-A-to-ground fault: (a) Magnitude of negative-sequence voltage at bus m side of line mn; (b) Magnitudes of zero-sequence currents at both sides of line mn; (c) Magnitudes of negative-sequence currents at both sides of line mn; (d) The ratio between negative-sequence currents flowing through both sides of line mn.

Energies 2016, 9, 400 23 of 27

(e) (f)

Figure 20. Values detected by relays and the trip signal under an internal balanced fault: (a) Magnitude of negative-sequence voltage at bus m side of line mn; (b) Magnitudes of zero-sequence currents at both sides of line mn; (c) Magnitudes of negative-sequence currents at both sides of line mn; (d) The ratio between negative-sequence currents flowing through both sides of line mn; (e) The ratio between phase A currents flowing through both sides of line mn; (f) The trip signal for balanced fault.

As displayed in Figure 20e, after 20 ms from the fault inception, the ratio between phase A currents at both sides of line mn is close to the steady state 2.35 and therefore the balanced fault is correctly detected by the balanced-fault element, as shown in Figure 20f. The fault impedance under three-phase faults is usually small. The smaller the fault impedance is, the larger Iφn/Iφm will be in this case. Therefore, the proposed protection principle can identify internal balanced faults correctly.

6.2.3. External Fault

The output power of the VSC-HVDC interconnector at the MMC-2 side is P0 = −100 MW and Q0 = 0 MVar before the fault. An external bolted phase-A-to-ground fault happens at f0, as shown in Energies 2016, 9, 400 24 of 27 Figure 1, and f0 is near bus m. The fault starting time is also 1 s. Um−, Im0, In0, Im−, In− and In−/Im− are shown in Figure 21.

Energies 2016, 9, 400 24 of 27

As displayed in Figure(a) 21a, Um− exceeds the threshold Uth− after the(b) fault, and therefore the fault is detected as an unbalanced fault. As shown in Figure 21c, In− > Ith− after 20 ms from the fault inception and the negative-sequence currents flowing through both sides of line mn are approximately equal. Therefore, In−/Im− remains 1 after 20 ms from the fault inception, as shown in Figure 21d, and therefore the unbalanced-fault element does not misoperate. When a balanced fault happens at f0, the fault is detected as a balanced fault, but the ratio between phase currents flowing through both sides of line mn remains 1. Therefore, the protection does not misoperate. Simulation results are omitted here. The output power of the VSC-HVDC interconnector at the MMC-2 side is P0 = 200 MW and Q0 = 0 MVar(c) before the fault. A bolted three-phase fault(d happens) on line ng at 1 s, and theFigure distance 21. Values between detected bus byn andrelay thes under fault an location external is phase 10 km.-A -Utom-ground−, Im0, In 0fault:, and ( aIAn) Magnitude/IAm are shown of in FigureFigure 21.negative 22Values. It -cansequence detected be seen voltage from by relaysat Figure bus m under22 sidea,b ofthat an line externalU mmn− is; (belowb) phase-A-to-groundMagnitudes the threshold of zero U-sequenceth− all fault: the currentstime, (a) Magnitude and at both of negative-sequenceIm0 andboth I nsides0 are ofzero voltageline allmn the; at(c) busMagnitudes time. m Therefore, side of of negative line the mn; fault-sequence (b ) is Magnitudes detected currents asat bo ofa th balanc zero-sequence sidesed of linefault. mn As; currents (d shown) The atin both sidesFigure of lineratio 22c mn;between, the (c ratio) Magnitudesnegative between-sequence phase of negative-sequence currents currents flowing flowing through through currents both sidesboth at both ofsides line sides mnof line. of mn line remains mn; (d )1, The and ratio therefore the balanced-fault element does not misoperate. When an unbalanced fault happens here, between negative-sequence currents ﬂowing through both sides of line mn. the protection does not misoperate either. Simulation results are omitted.

(a) (b)

(c)

Figure 22. Values detected by relays under an external balanced fault: (a) Magnitude of Figure 22.negativeValues-sequence detected voltage at by bus relays m side underof line mn an; ( externalb) Magnitudes balanced of zero- fault:sequence (a currents) Magnitude at of negative-sequenceboth sides of voltageline mn; (c at) The bus ratio m between side of phase line mn;A currents (b) Magnitudes flowing through of both zero-sequence sides of line mn currents. at both sides of line mn; (c) The ratio between phase A currents flowing through both sides of line mn. It can be seen from Section 6.2 that the proposed protection principle can accurately recognize internal faults and external faults, and has the ability to eliminate the influence of fault resistance. In It canaddition, be seen many from fault Section simulations 6.2 arethat completed the proposed when the protection interconnector principle works in can different accurately operation recognize internalstates faults before and fault external or under faults, different and fault has conditions. the ability Simulation to eliminate results the show influence that the operation of fault of resistance. In addition,the manyprotection fault is simulations not influenced are by completed the operation when state the of the interconnector interconnector works before in fault, different and the operation states beforeproposed fault protection or under principle different is of fault high conditions.sensitivity and Simulation can achieve whole results line show high thatspeed the protection. operation of the protection7. Conclusions is not influenced by the operation state of the interconnector before fault, and the proposed protection principle is of high sensitivity and can achieve whole line high speed protection. 1. The output characteristics of the VSC-HVDC interconnector after faults are related to the operation state before the fault, fault location, fault type, fault resistance, etc. The magnitudes of 7. Conclusions output positive-sequence currents of the interconnector are limited after the fault, and the 1. The outputpower characteristics factor angle of ofthe the interconnector VSC-HVDC at the interconnector fault side is in afterthe range faults of 0° are–360°. related to the operation 2. The fault ride-through (FRT) strategy which is applicable to the VSC-HVDC interconnector state before the fault, fault location, fault type, fault resistance, etc. The magnitudes of output operating characteristic of working in all four quadrants of the P-Q operating plane and capable positive-sequenceof eliminating currents negative- ofsequence the interconnector currents under unbalanced are limited faults after is theproposed. fault, and the power factor angle of the interconnector at the fault side is in the range of 0˝–360˝.

Energies 2016, 9, 400 25 of 27

2. The fault ride-through (FRT) strategy which is applicable to the VSC-HVDC interconnector operating characteristic of working in all four quadrants of the P-Q operating plane and capable of eliminating negative-sequence currents under unbalanced faults is proposed. 3. Theoretical analysis and simulation results show that traditional phase-to-phase distance Energies 2016, 9, 400 25 of 27 protection, ground distance protection, and pilot protection are all inapplicable to lines emanating 3.from Theoretical the interconnector, analysis whileand simulation these protections results show are still that applicable traditional to AC phase lines-to- thatphase are distance not directly emanatingprotection, from g theround interconnector. distance protection, An investigation and pilot with protection a real protection are all inapplicable system will to be lines further conductedemanating to confirm from the the interconnector, theoretical analysis.while these protections are still applicable to AC lines that 4. A novelare not pilot directly protection emanating principle from the based interconnector. on the ratio An betweeninvestigation phase with currents a real protection and the ratio system will be further conducted to confirm the theoretical analysis. between negative-sequence currents flowing through both sides of the line is proposed for AC 4. A novel pilot protection principle based on the ratio between phase currents and the ratio lines emanating from the interconnector. Simulation results shows that the proposed protection between negative-sequence currents flowing through both sides of the line is proposed for AC principlelines emanating can accurately from the recognize interconnector. internal Simulation faults and results external shows faultsthat the including proposed protection balanced and unbalancedprinciple faults, can accurately and has recognizethe ability internal to eliminate faults andthe influence external faults of fault including resistance. balanced and unbalanced faults, and has the ability to eliminate the influence of fault resistance. Acknowledgments: The authors would like to acknowledge the financial support from the National High TechnologyAcknowledgments: Research and The Development authors would of China like to (863 acknowledge program) the (No. financial 2015AA050102). support from the National High Technology Research and Development of China (863 program) (No. 2015AA050102). Author Contributions: Shimin Xue proposed the idea and drafted the article. Jingyue Yang provided the results of theAuthor simulation. Contributions: Valuable commentsShimin Xue on proposed the first draft the id wereea and received drafted from the article. Yanxia Jingyue Chen, CunpingYang provided Wang, the Zhe Shi, Miaoresults Cui and of Botong the simulation. Li. Valuable comments on the first draft were received from Yanxia Chen, Cunping Wang, Zhe Shi, Miao Cui and Botong Li. Conflicts of Interest: The authors declare no conflict of interest. Conflicts of Interest: The authors declare no conflict of interest. Appendix Appendix The compound sequence network under a phase B-to-phase C fault that happens at f1 on line mn The compound sequence network under a phase B-to-phase C fault that happens at f1 on line is shown in Figure A1, and the fault resistance is 2Rf. mn is shown in Figure A1, and the fault resistance is 2Rf.

Figure A1. Compound sequence network under a phase B-to-phase C fault at f1. Figure A1. Compound sequence network under a phase B-to-phase C fault at f1.

In Figure A1, İdev represents the output current of the interconnector; İAm+ and İAn+ are the positive-sequence currents flowing through R1 and R2, respectively; İAn− is the negative-sequence In Figure A1, I˙dev represents the output current of the interconnector; I˙Am+ and I˙An+ are the current flowing through R2; U and U are the positive-sequence voltage and positive-sequence currents flowing througha R1 anda R2, respectively; I˙An´ is the negative-sequence . . currentnegative flowing-sequence through voltage R2; U ata `theand faultU aspot,´ are respectively; the positive-sequence UAm is the voltagepositive- andsequence negative-sequence voltage at . voltagebus at m; the Z faultm is spot, the positive respectively;-sequenceUAm impedance` is the positive-sequence between R1 and thevoltage fault at location bus m; andZm` isis the positive-sequence impedance between R1 and the fault location and is represented by Zf m in this paper; represented by Z fm in this paper; Zn is the positive-sequence impedance between R2 and the Z is the positive-sequence impedance between R2 and the fault location and is represented by Z n` fault location and is represented by Z in this paper; since the negative-sequence currents flowing f n in this paper; since the negative-sequencefn currents flowing through bus m side are eliminated by the through bus m side are eliminated by the interconnector, the negative-sequence impedance interconnector, the negative-sequence impedance between R1 and the fault location is nearly infinite in . . . between R1 and the fault location is nearly infinite in negative-sequence network, and UUAm a , negative-sequence network, and UAm´ « Ua´, where UAm´ is the negative-sequence voltage at bus . where U is the negative-sequence voltage at bus m; Z is the negative-sequence impedance m; Zn´ is the negative-sequenceAm impedance between R2 andn the fault location, and Zn´ “ Zn`; EAn is phasebetween A voltage R2 and of thethe fault equivalent location, voltage and ZZnn source ; atEAn the is back phase side A voltage of bus of n; theZSeq equivalent` and Z Seqvoltage´ are the

source at the back side of bus n; ZSeq and ZSeq are the equivalent positive-sequence impedance

Energies 2016, 9, 400 26 of 27 equivalent positive-sequence impedance and negative-sequence impedance at the back side of bus n, respectively, and it is assumed that ZSeq` “ ZSeq´ in this paper. According to symmetrical component method and nodal voltage method, the following two equations can be obtained:

. . . . 1 1 EAn UAm` ´ I Am`Zf m ` “ I Am` ` (A1) ˜ ZSeq` ` Zf n Zseq` ` Zf n ` 2R f ¸ ZSeq` ` Zf n ´ ¯

. . . Zseq´ ` Zn´ Ua´ “ UAm` ´ I Am`Zf m (A2) Zseq´ ` Zn´ ` 2R f ´ ¯ The impedance measured by the BC element in R1 is:

...... 2 2 UBm ´ UCm α ´ α UAm` ` α ´ α UAm´ UAm` ´ Ua´ ZR1_BC “ . . “ . . “ . (A3) 2 2 IBm ´ ICm ` α ´ α˘ I Am` ` `α ´ α ˘ I Am´ I Am`

Substitute Equation (A2) into Equation` (A3),˘ and Equation` ˘ (A4) can be obtained:

. . UAm` ´ I Am`Zf m 2R f Z “ Z ` . (A4) R1_BC f m Z ` Z ` 2R I Am` seq` f n f

Equation (A1) can also be written as:

. . I ` EAn . . Am` ZSeq``Zf n UAm` ´ I Am`Zf m “ (A5) 1 ` 1 ZSeq``Zf n Zseq``Zf n`2R f

Substituting Equation (A5) and Zf n “ Zmn ´ Zf m into Equation (A4), and the impedance measured by the BC element in R1 can be expressed as:

. E Z ` Z ´ Z An Seq` mn f m Z ``pZmn´Z q Z “ Z ` R 1 ` Seq f m (A6) R1_BC f m f ´ ¯ ¨ . ˛ ZSeq` ` Zmn ´ Zf m ` R f I Am` ˚ ‹ ´ ¯ ˝ ‚ ∆ZR1_BC looooooooooooooooooooooooooooooooooooomooooooooooooooooooooooooooooooooooooon where Zmn is the positive-sequence impedance of line mn. When a three-phase fault happens on line mn and the fault resistance is Rf, the measured impedance of R1 can be derived in the same way as described above. And the impedance measured by the phase element in R1 can also be expressed as Equation (A6). The derivation process is omitted here.

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