Advanced Digital- Baseband A Software-Defined Radio Baseband Processor IC INNOVATIONS INV/TwoWay/981/1 March 2004

Combination Full-Duplex Voice-Codec and IC A-to-D and D-to-A Interfaces n Software-Defined Radio (SDR) Processor IC n Multi-Mode Digital/Analogue PMR and Trunked Radio n High Integration Saves Cost, Space, Power and Design Time n Programmable Flexibility Enables Use in Many Radio Systems n Transmit and Receive Analogue and Digital Processing - Tx and Rx programmable multi-tap FIR filters n Exceptional Rx SINAD Performance n Full-Duplex Voice Codec with Input and Output Gain Setting and Speaker/Earpiece Power Amplifiers n Flexible Serial Interfaces for Multi-Processor Operation n Auxiliary ADCs and DACs for Ancillary Radio Functions n Autonomously Performs Many Critical DSP Intensive Functions SUITABLE APPLICATIONS n Low-Power 2.5V Operation TETRA - APCO25 - Tetrapol - RCR STD-39 - ARIB STD-T61 - ARIB STD-T85 n EV9810 EvKit Available . . . . and many other digital radio systems

CML Microcircuits Two-Way Radio

COMMUNICATION SEMICONDUCTORS - ‘Communicate’ with CML - Digital Radio*

Narrowband digital radio systems provide many advantages over traditional analogue FM RF Modulator Cartesian Loop approaches. By implementing error correction, a digital system can consistently maintain a respectable 'I' Linear PA Voice Coder DAC Channel Coding, RRC ADC Voice Filter p /4 90° operating range even in the presence of significant interference. The majority of current PMR and TDMA Frame DQPSK Formatting DAC trunked digital radio systems deal not only in voice transactions, but also in data, video and still graphics; RRC 'Q' all within a fixed bandwidth. Carrier In the case of voice transactions over a digital system, the digital radio system can provide high-quality Oscillator voice output, even in high noise environments. Local Oscillator Oscillator DAC ADC

'I' Processing RF Amp IF Amp DAC ADC Mod. 90° Tx Radio and Bandpass Interface Filter 'Q' RF Tx

Tx Audio Interface Battery Voice Decoder 'I' ADC p /4 DQPSK RRC PA Temp. Voice pi µC DAC Demodulator, Filter Channel Decoder, Ancillary PA Power ADC Tx Radio A theoretical narrowband TDMA Framing RRC 'Q' Analogue and/or Interface CMX981 element Interfaces digital radio implementation DSP AGC CMX981 within a typical (TETRA) digital radio Rx Audio RSSI - the CMX981 performs the majority of baseband processes Interface RF Rx, IF Rx Radio and Interface Demod. Narrowband Digital Radio Standards High Performance Digital Radio voice designs rely on a DSP to perform many of the signal control, TETRA: TErrestrial Trunked RAdio is an open digital trunked radio standard defined by the European encoding, interfacing, routing, level and shaping tasks. Telecommunications Standardisation Institute (ETSI) to meet the needs of digital, cellular, trunked The CMX981 is a truly universal in-phase and quadrature (I and Q) compatible digital radio baseband radio networks. TETRA systems have been, to-date, designed and developed notably as a and voice-codec that can be used with many types of analogue and digital modulation system for handling emergency and safety tasks and is widely established in over 55 countries. schemes. With its flexibility, via software definition, the CMX981 can be used in many types of system, APCO 25 (P25) is an open digital radio standard suite specified for high-performance public safety including those operating in: AM and FM modes, and using QAM, BPSK, QPSK, pi/4 DQPSK and FSK radio applications in North America. Supporting both voice and data services the suite includes modulation schemes. several American National Standards Institute (ANSI) approved technical standards developed by The CMX981 goes many steps further in the provision, on chip, of the majority of baseband and system the TIA TR-8 Committee and its subcommittees. interfacing: voiceband digital-to-analogue and analogue-to-digital conversion, Rx and Tx signal shaping P25 Phase 1 support both digital and analog FM modulation so they interoperate with legacy via multi-tap digital FIR filters and pi/4 DQPSK modulation. Included on chip is a voice-codec section with analog FM equipment. Spectral efficiency is 1 voice per 12.5kHz RF bandwidth. P25 Phase 2 radios gain control and loudspeaker and earphone amplifiers. In addition to baseband signal path processing, provide 1 voice per 6.25kHz RF bandwidth. the CMX981 offers auxiliary D-to-A and A-to-D functions for the interfacing of other radio operations. In certain public safety bands, FCC rules now require that radios support P25 interoperability mode. The integration of signal processing functions digitally within the CMX981 reduces the load requirements on the host DSP and µC, thus allowing the selection of a lower cost, lower speed and lower powered Tetrapol is a digital trunked radio system based on FDMA access and GMSK modulation. Like its DSP/µC, and releasing the host controller’s time and power for other tasks. competitor, TETRA, Tetrapol is widely used in a large number of countries, predominately in Europe. The CMX981’s default filter co-efficients are aimed at the TETRA standard, but this versatile baseband IC RCR STD-39 is the standard for 400MHz professional digital mobile communication systems can be programmed to operate in many other radio voice and high-speed data systems. Direct access is including TDMA public radio in Japan. available for writing to the I and Q Tx filters; additionally, the pi/4 DQPSK modulator can be bypassed to allow formatted data to be written directly to the signal path. ARIB STD-T61 is the standard for 800MHz digital MCA systems in Japan using p/4 shift QPSK for Flexible clock dividers allow different voice codec and signal codec rates to be accommodated. land vehicles such as taxis. ARIB STD-T85 is the standard for 400MHz and 150MHz Japanese professional digital mobile *For the purposes of this Innovations document, discussions centre around narrowband public and communication systems, including SCPC public radio. private mobile and trunked radio systems. Other radio systems can employ the CMX981. Contents - Digital Radio 2 - Operational Functions 3 - Voice Codec 4 Transmit 5 - Receive 6 - 2 - Control; Power; Interface 7 - Package and Evaluation outside back cover - 2 Operational Functions

Microphone 1 Microphone 2 VDDPA EarpieceLoudspeaker VSSPA AUXDAC4 AUXDAC2AUXDAC3AUXDAC1 VSSPA Master (MCLK) Clock In (up to 10MHz)

CLOCK GEN CLOCKS Select

Serial Interface Clock (Out) 0/20dB (MCLK 0 to 22.5dB MCLK/2 1.5dB Step MCLK/4) 10-bit DAC 10-bit DAC 10-bit DAC 10-bit DAC Decimation Bandpass S-D ADC 0or6dB 0or6dB Filter Filter Symbol Clock PAs (18kHz) Tx (encode) -12.5 to -27.5dB N_IRQ1 1dB Step Sidetone 10-bit ADC N_IRQ2 AUXADC1

Control N_RESET 0 to -30dB 2dB Step SRAM AUXADC2 CBUSEN Interpolation Bandpass S-D DAC AUXADC3 Filter Filter S Sample Rx Ancillary Functions and AUXADC4 (decode) (analogue interfaces) Hold MUX Tone AUXADC5 CMDFS/CCLK Generator Linear Voice Codec (Rx and Tx audio interface) C- AUXADC6 CMDDATI/CDATA /

1

DSP

Port

CMDRDFSI/CSN Data

or

Serial CMDRDDATI/RDATA

Control

µC Fast Transmit Channel

and 144kSample/sec Routing for each channel 144kSample/sec 18kSymbol/sec (Tx radio interface) for each channel ITXP

Host ficient I

and I I I I I ITXN 18kSymbol/sec Q I Coef Q Q Gain, Phase, Q Q 16x4 p /4 DQPSK for each channel RRC Filter Q pi RRC Filter Ramping, Q Reconstruction Outputs FIFO Modulator (79-tap FIR) 0 SD DAC Logic est, and Offset SD QTXP

From CMDFS2 T 36kb/sec (63-tap FIR) Filter 4 Data Adjustment Q

2 1 14-bit DAC QTXN Modulator CMDDAT2 Control Direct Write

Port

and

to

Access and

Interface,

Tx Data I

o Point Access T CMDRDFS2 Serial 4 Ctrl Point

Fast Rx/Tx loopback 4 CMDRDDAT2 (test and monitor)

Tx/Rx loopback (test and monitor) 2.304Mb/sec for each channel TXFS I IRXP

3 I I I Q I IRXN TXDAT Rx I 0 Port DATA Q Q Q Q I Q

Low Pass Gain Decimation Inputs RRC Filter Q 1 Anti-alias Filter and Offset Filter and SD QRXP

Q Serial 144kSample/sec (63-tap FIR) 144kSample/sec Adjustment Vernier Control Filter 4 RXFS for each channel (63-tap FIR) for each channel

16-bit ADC 2 Demodulator

Fast QRXN

RXDAT and Receive Channel I Ctrl (Rx radio interface) from Serial 4 Interfaces Supply Inputs

VDDRX VDDTX VDDIO VDDAUX VDDD VDDD BIAS1 BIAS2 VSSDVDDVC VSSD VSSD VSSAUX VSSTX VSSRXVSSVC

- Give us the signal - Let us do the rest - 3 Voice Codec n Encode (Tx) analogue-to-digital conversion with coarse and fine level control n Decode (Rx) digital-to-analogue conversion with level control plus earpiece and loudspeaker PAs n Sidetone facility with level adjust Encode (Tx) Path n Call/user tones available to Rx path n Dual selectable differential microphone sources n Selectable clock/sample rates n Input amp with selectable gain: 0db, 20dB and mute n Fine gain control with 22.5dB range n 14-bit Sigma-Delta analogue-to-digital conversion n Digital encode bandpass filter conforms to CCITT G.712 standard; with

Microphone 1 Microphone 2 Loudspeaker Earpiece selectable highpass section n Decimation filter provides (8kHz) data suitable for radio system signal VSSPA VDDPA VSSPA formatting Select

0/20dB 0 to 22.5dB 1.5dB Step

Decimation Bandpass S-D ADC 0or6dB 0or6dB Filter Filter PAs Separate Rx and Tx Paths Tx -12.5 to -27.5dB n Controlled by host via internal registers 1dB Step Sidetone n Configurable to full-duplex operation

0 to -30dB 2dB Step Decode (Rx) Path Interpolation Bandpass S S-D DAC Filter Filter n Data written via serial interface interpolated to 32kHz n

Control and Routing Rx Digital decode bandpass filter conforms to CCITT G.712 standard; with selectable highpass section Tone Generator Linear Voice Codec n Level and period adjustable ring-tone generator (0 to 4 kHz) and programmable sidetone path available n 14-bit Sigma-Delta digital-to-analogue conversion n Fine gain control with 0 to -30 dB range n Two selectable output driver (0 or 6 dB) amps: - Differential speaker (130mW into 8W ) - Single-ended earpiece (16.5mW into 32W )

The digitizing voice codec of the CMX981 converts voice signals to and from digital form and can be configured to apply a digital voice filter to meet the G.712 standard. The encode path (Tx) accepts a differential analogue audio input signal, converts it into digital form and then applies digital filtering to produce a processed data stream. The decode path (Rx) accepts a digital stream written to the serial interface, applies digital filtering, converts the result to an analogue signal, and presents the audio at either differential speaker or single-ended earphone driver outputs. Additionally a sidetone path and audio tones can be programmed. The inclusion of this audio/digital interface facility on-chip minimizes the need for additional areas of PCB and the attendant external components; on chip processing in this section reduces the host µC/DSP hardware, software, capacity and power requirements.

4 Transmit Section The transmit section of the CMX981 accepts the data stream from the host processor, via the serial n p i/4 DQPSK modulation interface, and passes it through the pi/4 DQPSK modulator. I and Q data streams from the modulator are applied n to the relevant channel multi-tap digital filter to provide shaping in accordance with the RF channel requirements. Accurate controllable filtering The availability of gain, phase and offset adjustments allow the dynamic compensation of RF hardware and n Channel gain, phase and offset manipulation transmission channel anomalies. To minimise the generation of spurii at Tx ‘on’ and ‘off’, the signal level of each channel can be ramped up (and down) at a programmed rate. Both channel signals are reconstructed via digital- n Analogue reconstruction to-analogue converters and lowpass filters before being made available as differential analogue outputs to the RF modulator. n Transmit data access Provision is made, to each digital channel, to allow the input of data streams after the pi/4 DQPSK modulator for n use with systems using alternative modulation schemes. As a system check, Tx and Rx loopback test and Programmable clock/sample rates monitor paths are available. n Programmable output signal ramping Note that the 18ksymbols/sec rate is suitable for TETRA use. Other rates may be programmed for use in other systems. p i/4 DQPSK Modulation Channel Gain, Phase and Offset Adjust n Symbol data from external processes via serial port n Independent (I and Q) channel attenuation is programmable n 4-word deep FIFO - channel phase inversion is facilitated n Bypassable pi/4 DQPSK modulator provides encoded I and Q values for each n Phase pre-distortion provides compensation for non-orthogonal carrier-phase input phase in the RF modulator n Independent I and Q digital offset correction for analogue Tx path offsets - I or Q advance or retard

Transmit Channel Data Direct Write Tx Data Access - for alternative modulation inputs Access Points Points 18kSymbol/sec

Control DATA ITXP I

and I I I I Routing Tx Q I ITXN DATA Q Q Gain, Phase, Q I Q 16x4 p /4 DQPSK RRC Filter Q pi RRC Filter Ramping, Q Reconstruction Outputs ficient FIFO Modulator 0 SD DAC Logic 36kb/sec (79-tap FIR) and Offset SD and 18kSymbol/sec (63-tap FIR) Filter 4 QTXP

Interfaces 144kSample/sec Adjustment Q for each channel for each channel

Coef 1 14-bit DAC Modulator QTXN 144kSample/sec

est,

to

T for each channel 4 and

I

Serial

Control Ctrl Tx/Rx loopback Rx/Tx loopback (test and monitor) Interface, (test and monitor) 4 Accurate, Controllable Filtering Transmit Data Access n n Programmable multi-tap FIR filters for both (I and Q) channels provide Read and write functions stopband rejection and Root Raised Cosine (RRC) shaping - Read the I or Q signal value at that point n Alternative FIR coefficients can be programmed via serial interface - Write data directly into the Sigma-Delta DAC for other modulation schemes n Direct write access to the I or Q inputs of the FIR filters for the insertion of data

Analogue Reconstruction n Low distortion 14-bit Sigma-Delta digital-to-analogue conversion Programmable Output Ramping n Switched capacitor lowpass filters shape I and Q outputs to RF n Two modes of Tx output signal-ramping are available: modulator n Linear or Sigmoidal Tx/Rx and Rx/Tx loopback facilities for test and monitoring n Both amplitude ramp-up and ramp-down actions are programmable

5 Receive Section The receive section of the CMX981 accepts the demodulated I and Q output signal from the ‘radio’ section via n Analogue-to-digital conversion differential channel inputs. In-band pick-up is minimized using this input method. Sampling frequency rejection is n carried out by the bypassable anti-alias filter. The following Sigma-Delta analogue-to-digital converter displays Exceptional SINAD performance extremely low distortion and a dynamic range in excess of 90dB. n Dynamic signal manipulation Gain and offset adjustment is available, to each channel, to set the dynamic range of data within the channel and to remove system generated offsets; phase inversion is available. The two channels are independently n Digital processing programmable thus allowing differential gain corrections within the digital domain. n Programmable clock dividers Digital filtering is applied to the data by two cascaded multi-tap FIR filters which enhance stopband rejection and provide a programmed shape (the default is an RRC response) and reduce the reliance on analogue components. The CMX981 processed Rx data is then available to the system processor/s; demodulation, would typically be performed by an external DSP.

Analogue-to-Digital n Differential analogue I and Q inputs n Selectable anti-alias filters exhibit high sampling frequency rejection n Wide range, low-distortion Sigma-Delta analogue-to-digital conversion provides I and Q ‘single bits’ for processing

Dynamic Signal Manipulation n Dynamic gain adjustment with signal phase inversion if required n System offsets can be stabilised

Tx/Rx loopback (test and monitor) Rx/Tx loopback (test and monitor)

2.304Mb/sec for each channel

I IRXP I I I Q I ficient and Control Data Rx I 0 IRXN Q Q Q I Q DATA Q Low Pass RRC Filter Gain Decimation Q Anti-alias Filter and Offset Filter and SD 1 144kSample/sec (63-tap FIR) 144kSample/sec Adjustment Vernier Control Filter 4 QRXP est, Coef for each channel (63-tap FIR) for each channel

Serial Interfaces 16-bit ADC 2 QRXN

Control and Routing Receive Channel I and Q Inputs

Interface, T Ctrl

from Demodulator 4

Digital Processing n Programmable multi-tap low-pass and RRC FIR decimation filters provide pre-process shaping n I and Q channels are independently programmable n Rx/Tx and Tx/Rx loopback facilities for test and monitoring

6 Control; Power; Interface

n Versatile Processor Interfaces Master Clock (MCLK) In (up to 10MHz) AUXDAC4 AUXDAC3 AUXDAC2 AUXDAC1 MCLK CLOCK n Control and Programming GEN SClk CLOCKS n Serial Interface Clock Out MCLK Individual Power Rails MCLK/2 10-bit DAC 10-bit DAC MCLK/4 n Ancillary Functions 10-bit DAC 10-bit DAC Serial Interfaces Symbol Clock (18kHz) Versatile Processor Interfaces N_IRQ1 n C-BUS and ‘Fast’ serial interfaces provide adaptable control and data paths 10-bit ADC N_IRQ2 to cater for multi-processor (µC or DSP) systems

N_RESET Control n Selectable interface serial-: MCLK, MCLK/2, MCLK/4 AUXADC1 n Bi-directional operation SRAM CBUSEN n Hardware interlock modes AUXADC2 n Automatic powersave mode AUXADC3 Sample Ancillary Functions and Hold MUX AUXADC4 Control and Programming CMDFS/CCLK n Tx, Rx and codec sample rates are independently programmable AUXADC5

C-BUS n Versatile clock division permits a wide range of sample rates to AUXADC6 CMDDATI/CDATA suit different data rates and system requirements

CMDRDFSI/CSN

CMDRDDATI/RDATA Ancillary Functions Fast Serial Port 1 / n Programming and control is via internal registers from the serial interface/s

ficient and Control Data n Four 10-bit ‘monotonic’ digital-to-analogue converters to assist in external control functions n Additionally, one DAC output is available to enable sequenced est, Coef Individual Power Supply Rails CMDFS2 power ramping of the RF output - the ramp profile is programmable n 2.25 to 2.75 volt range with 3.3 volt tolerant interface circuits n

Control and Routing A multi-input multiplexed analogue-to-digital converter, with sample CMDDAT2 n Separate ‘interface’ power rail and hold facility for external monitoring Interface, T n Analogue and digital supply separation CMDRDFS2 To and From Host µC or DSP n Separate isolated power-pins help maintain low noise design CMDRDDAT2 - Analogue and digital Fast Serial Port 2 - Voice codec - Interface - Ancillary functions n Separate analogue and DAC reference levels (VBIAS)

TXFS

TXDAT

RXFS

RXDAT Fast Serial Port 3 Supply Inputs

VDDRX VDDTX VDDIO VDDAUX VDDVC VDDD VDDD BIAS1 BIAS2 VSSD VSSD VSSD VSSVC VSSAUX VSSTX VSSRX

7 Recent Two-Way Radio IC Products From CML EV9810 Evaluation Kit for the CMX981

CMX649 Adaptive Delta Modulation (ADM) Codec The EV9810 evaluation kit is intended to allow investigation, demonstration and evaluation of the CMX981 IC. This PCB-based EvKit provides a hardware and interface platform for both CMX838 FRS/PMR446/GMRS ‘Family Radio’ Processor hardware and software designers to develop, test and interface prototype equipments. CMX823 Multi-Standard Analogue Paging-Tone Decoder n Analogue PCB with Low Noise-Floor Design CMX881 Baseband Processor for PMR and Trunked Radios n Buffered Serial Interface Ports with Signal Shifting CMX882 Baseband Processor with Data for Leisure Radios n Differential or Single-ended Baseband Signal I/O CMX883 Baseband Processor for Leisure Radios n Dual (+ and -) 8 Volt Supply Requirement n On-board Regulators for All Power Rails n Separate 5-Volt Power Rail for Analogue Interfaces CML’s full range of products for Two-Way Radio, Wireline Telecom n Auxiliary ADC and DAC Connections Available and Data environments can be viewed on www.cmlmicro.com n Microphone Inputs and Speaker/Earpiece Outputs via 3.5mm Mono Jack Sockets Member Companies n Signal and Power Test Access CML Microcircuits n Access to All CMX981 Functions n (UK)Ltd CMX981 Q1 Device Supplied In-Situ n Separate Digital and Analogue Ground Planes COMMUNICATION SEMICONDUCTORS n User Manual and Circuit and EvKit Layout Diagrams Provided Oval Park, Langford, MALDON, Essex CM9 6WG, England Tel: +44 (0)1621 875500 Fax: +44 (0)1621 875600 n CML Help Desk: [email protected] [email protected] www.cmlmicro.com CML Microcircuits (USA) Inc. Information - www.cmlmicro.com www.cmlmicro.com/products/twoway/CMX981.htm COMMUNICATION SEMICONDUCTORS 4800 Bethania Station Road, Winston-Salem, NC 27105, USA Tel: +1 336 744 5050, 800 638 5577 Fax: +1 336 744 5054

[email protected] www.cmlmicro.com Your Local CML Distributor

CML Microcircuits (Singapore)PteLtd COMMUNICATION SEMICONDUCTORS Singapore No. 2 Kallang Pudding Road, #09 - 05/06 Mactech Industrial Building, Singapore 349307 Tel: +65 67450426 Fax: +65 67452917 [email protected] www.cmlmicro.com Shanghai Packages -40º to +85ºC No. 218, Tian Mu Road West, Tower 1, Unit 1008, CMX981Q1 64-lead VQFM Local CML Distributor Your Shanghai Kerry Everbright City, Zhabei, Shanghai 200070, China Tel: +86 21 63174107 and +86 21 63178916 Fax: +86 21 63170243 [email protected] www.cmlmicro.com

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