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TLIN1028-Q1 Automotive Local Interconnect Network (LIN)

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TLIN1028-Q1 Automotive Local Interconnect Network (LIN) TLIN1028-Q1 www.ti.com SLLSEX4A – AUGUST 2019 – REVISEDTLIN1028-Q1 OCTOBER 2020 SLLSEX4A – AUGUST 2019 – REVISED OCTOBER 2020 TLIN1028-Q1 Automotive LIN 125-mA System Basis Chip (SBC) 1 Features 2 Applications • AEC-Q100 (Grade 1): Qualified for automotive • Body electronics and lighting applications • Hybrid, electric & powertrain systems • Local interconnect network (LIN) physical layer • Automotive infotainment and cluster specification ISO/DIS 17987–4 compliant and • Appliances conforms to SAE J2602 recommended practice for LIN 3 Description • Functional Safety-Capable The TLIN1028-Q1 is a local interconnect network – Documentation available to aid functional safety (LIN) physical layer transceiver, compliant to LIN 2.2A system design ISO/DIS 17987–4 standards, with an integrated low • Supports 12-V applications dropout (LDO) voltage regulator. • Wide operating ranges This LIN system basis chip (SBC) reduces system – ±58 V LIN bus fault protection complexity by providing a 3.3 V or 5 V rail with up to – LDO output supporting 3.3 V or 5 V 70 mA (D) or 125 mA (DRB and DDA) of current to – Sleep mode: Ultra-low current power microprocessors, sensors or other devices. consumption allows wake-up event from: The TLIN1028-Q1 has an optimized current-limited • LIN bus or local wake through EN pin wave-shaping driver which reduces electromagnetic – Power-up and down glitch-free operation emissions (EME). The TLIN1028-Q1 converts the LIN protocol data stream on the TXD input into a LIN bus • Protection features: signal. The receiver converts the data stream to logic- – ESD protection, VSUP under-voltage protection level signals that are sent to the microprocessor – TXD dominant time out (DTO) protection, through the open-drain RXD pin. Thermal shutdown – Unpowered node or ground disconnection fail- Device Information (1) safe at system level PART NUMBER PACKAGE BODY SIZE (NOM) TLIN1028D-Q1 SOIC (8) 4.90 mm x 3.91 mm •VCC sources up to 125 mA with DRB and DDA package TLIN1028DDA-Q1 HSOIC (8) 4.90 mm x 3.91 mm • Available in SOIC (8) and HSOIC (8) packages, TLIN1028DRB-Q1 VSON (8) 3.00 mm x 3.00 mm and leadless VSON (8) package with improved (1) For all available packages, see the orderable addendum at automated optical inspection (AOI) capability the end of the data sheet. spacer spacer VBAT Leader Node VBAT Follower Node 10 µF 10 µF Vcc VSUP Vcc VSUP EN 100 nF EN V 2 8 1 V 2 8 1 DD I/O Leader Node DD I/O 100 nF MCU w/o Pull-up MCU w/o pullup pullup 1 kQ VDD I/O VDD I/O Low Low LIN LIN Bus LIN LIN Bus Power 4 Power 4 MCU MCU LIN Controller LIN Controller 5 5 Or 220 pF Or 220 pF RXD RXD SCI/UART SCI/UART 6 6 TXD TXD GND 7 3,PAD GND 7 3,PAD nRST nRST Simplified Schematics, Leader Node(1) Simplified Schematics, Follower Node(2) 1. Leader represents industry norm ‘master’. 2. Follower represents industry norm ‘slave’. An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, Copyrightintellectual © 2020 Texas property Instruments matters Incorporated and other important disclaimers. PRODUCTION DATA. Submit Document Feedback 1 Product Folder Links: TLIN1028-Q1 TLIN1028-Q1 SLLSEX4A – AUGUST 2019 – REVISED OCTOBER 2020 www.ti.com Table of Contents 1 Features............................................................................1 9.2 Functional Block Diagram.........................................23 2 Applications.....................................................................1 9.3 Feature Description...................................................23 3 Description.......................................................................1 9.4 Device Functional Modes..........................................27 4 Revision History.............................................................. 2 10 Application and Implementation................................ 31 5 Description (continued).................................................. 3 10.1 Application Information........................................... 31 6 Pin Configuration and Functions...................................3 10.2 Typical Application.................................................. 31 7 Specifications.................................................................. 4 11 Power Supply Recommendations..............................36 7.1 Absolute Maximum Ratings ....................................... 4 12 Layout...........................................................................37 7.2 ESD Ratings .............................................................. 4 12.1 Layout Guidelines................................................... 37 7.3 ESD Ratings, IEC Specification ................................. 4 12.2 Layout Example...................................................... 38 7.4 Recommended Operating Conditions ........................5 13 Device and Documentation Support..........................39 7.5 Thermal Information ...................................................5 13.1 Documentation Support.......................................... 39 7.6 Power Supply Characteristics ....................................6 13.2 Related Links.......................................................... 39 7.7 Electrical Charateristics ............................................. 8 13.3 Receiving Notification of Documentation Updates..39 7.8 AC Switching Characteristics ................................... 11 13.4 Support Resources................................................. 39 7.9 Typical Characteristics..............................................12 13.5 Trademarks.............................................................39 8 Parameter Measurement Information.......................... 14 13.6 Electrostatic Discharge Caution..............................40 8.1 Test Circuit: Diagrams and Waveforms.....................14 13.7 Glossary..................................................................40 9 Detailed Description......................................................23 14 Mechanical, Packaging, and Orderable 9.1 Overview...................................................................23 Information.................................................................... 40 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision * (August 2019) to Revision A (July 2020) Page • Changed the document status From: Advanced Information To: Production data ............................................ 1 • Added Feature: Functional Safety-Capable........................................................................................................1 2 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: TLIN1028-Q1 TLIN1028-Q1 www.ti.com SLLSEX4A – AUGUST 2019 – REVISED OCTOBER 2020 5 Description (continued) Ultra-low current consumption is possible using the sleep mode which allows wake up via LIN bus or EN pin. The LIN bus has two states: dominant state (voltage near ground) and recessive state (voltage near battery). In the recessive state, the LIN bus is pulled high by the internal pull-up resistor (45 kΩ) and a series diode. No external pull-up components are required for follower node applications. Leader node applications require an external pull-up resistor (1 kΩ) plus a series diode per the LIN specification. 6 Pin Configuration and Functions VSUP 1 8 VCC VSUP 1 8 VCC EN 2 7 nRST EN 2 7 nRST Thermal GND 3 6 TXD Pad GND 3 6 TXD LIN 4 5 RXD LIN 4 5 RXD Not to scale Figure 6-1. D Package, 8-Pin (SOIC), Top View Not to scale Figure 6-2. DRB Package, 8-Pin (VSON), Top View VSUP 1 8 VCC EN 2 7 nRST Thermal GND 3 Pad 6 TXD LIN 4 5 RXD Not to scale Figure 6-3. DDA Package, 8-Pin (HSOIC), Top View Table 6-1. Pin Functions PIN TYPE(1) DESCRIPTION NO. NAME 1 VSUP HV Supply In Device supply voltage (connected to battery in series with external reverse-blocking diode) 2 EN D I Enable input 3 GND GND Ground (2) (3) 4 LIN HV I/O LIN bus single-wire transmitter and receiver 5 RXD D O RXD output (open-drain) interface reporting state of LIN bus voltage 6 TXD D I TXD input interface to control state of LIN output 7 nRST D O Reset output (active low) 8 VCC Supply Out Output voltage from integrated LDO (1) HV - High Voltage, DI - Digital Input, DO - Digital Output, HV I/O - High Voltage Input/Output (2) When the thermal pad is present, it must be soldered to ground plane. (3) If the DDA package is placed onto a D package footprint without the thermal pad soldered down, expect the performance to match the D package and not the DDA package. Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TLIN1028-Q1 TLIN1028-Q1 SLLSEX4A – AUGUST 2019 – REVISED OCTOBER 2020 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings (1) MIN MAX UNIT VSUP Supply voltage range –0.3 42 V VLIN LIN Bus input voltage –58 58 V VCC50 Regulated 5 V Output Supply –0.3 6 V VCC33 Regulated 3.3 V Output Supply –0.3 4.5 V VnRST Reset output voltage –0.3 VCC + 0.3 V VLOGIC_INPUT Logic input voltage –0.3 6 V VLOGIC_OUTPUT Logic output voltage –0.3 6 V (2) IVCC VCC supply current 300 mA IO Digital pin output current –8 8 mA IO(nRST_RXD) Reset and RXD open-drain output current –5 5 mA TJ Junction temperature –40 165 °C Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any
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