A Fully Integrated Multi-Output CMOS Frequency Synthesizer For Channelized Receivers Ali Medi Won Namgoong
[email protected] [email protected] Department of Electrical Engineering University of Southern California Los Angeles, CA 90089 Abstract Base-Band Quadrature Amplifiers A fully integrated frequency synthesizer that generates Mixers multiple frequencies for use in frequency channelized ADC @ receivers is designed in 0.25µm CMOS technology. Many of 1GSPS LO @ 4GHz the unique features of this receiver have been exploited to ADC @ design a highly integrated and power efficient multi-output 1GSPS DSP Output frequency synthesizer including the poly-phase filters. The 03.5 7.5 f (GHz) LO @ 5GHz Unit synthesizer generates 4, 5, 6, and 7 GHz signals while ADC @ 1GSPS dissipating 120mW. LNA LO @ 6GHz Stage ADC @ I. Introduction 1GSPS LO @ 7GHz Although great headway has recently been made in efficient implementation of narrowband communication 0500f (MHz) systems, very little work on the implementation of wideband Fig. 1. Receiver architecture communication radios exist by comparison. More recently, however, there have been a growing number of research a synthesizer in 0.25µm CMOS technology for a frequency institutions starting research in this area. Motivation for such channelized UWB receiver. This design receives from 3.5 research activities are based on, for example, the emergence of GHz to 7.5 GHz, which corresponds to a bandwidth of the ultra-wideband (UWB) radio and the need for multi-modal approximately 4 GHz. radios to support the myriad of existing communication The organization of this paper is as follows. Section II standards. describes some of the synthesizer design challenges as well as Among the technical challenges in designing a wideband different design approaches.