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AN1207 MC145170 in Basic HF and VHF Oscillators

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AN1207 MC145170 in Basic HF and VHF Oscillators MOTOROLA Freescale Semiconductor, Inc. Order this document SEMICONDUCTOR TECHNICAL DATA by AN1207/D AN1207 ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005 The MC145170 in Basic HF and VHF Oscillators Prepared by: David Babin and Mark Clark Phase–locked loop (PLL) frequency synthesizers are com- The output of a VCM is a square wave and is usually monly found in communication gear today. The carrier oscilla- integrated before being fed to other sections of the radio. The tor in a transmitter and local oscillator (LO) in a receiver are VCM output can be directly used in computers and other digi- where PLL frequency synthesizers are utilized. In some cellu- tal equipment. The output of a VCO or VCM is typically buff- lar phones, a synthesizer can also be used to generate 90 ered, as shown. MHz for an offset loop. In addition, synthesizers can be used As shown in Figure 2, the MC145170 contains a reference in computers and other digital systems to create different oscillator, reference counter (R Counter), VCO/VCM counter clocks which are synchronized to a master clock. (N Counter), and phase detector. A more detailed block dia- . The MC145170 is available to address some of these gram is shown in the data sheet. applications. The frequency capability of the newest version, c the MC145170–2, is very broad — from a few hertz to HF SYNTHESIZER 185 MHz. n I The basic information required for designing a stable high– , frequency PLL frequency synthesizer is the frequencies ADVANTAGES r required, tuning resolution, lock time, and overshoot. For the o Frequency synthesizers, such as the MC145170, use digi- example design of Figure 3, the frequencies needed are t tal dividers which can be placed under MCU control. Usually, 9.20 MHz to 12.19 MHz. The resolution (usually the same as c all that is required to change frequencies is to change the di- the frequency steps or channel spacing) is 230 kHz. The lock u vide ratio of the N Counter. Tuning in less than a millisecond time is 8 ms and a maximum overshoot of approximately 15% d is achievable. is targeted. For purposes of this example, lock is considered n to be when the frequency is within about 1% of the final value. The MC145170 can generate many frequencies based on o the accuracy of a single reference source. For example, the HF SYNTHESIZER LOW–PASS FILTER c reference can be a low–cost basic crystal oscillator or a tem- i perature–compensated crystal oscillator (TCXO). Therefore, In this design, assume a square wave output is acceptable. m high tuning accuracies can be achieved. Boosting of the ref- To generate a square wave, a MC1658 VCM chip is chosen. erence frequency by 100x or more is achievable. e Per the transfer characteristic given in the data sheet, the 8 MC1658 transfer function, K , is approximately 1 x 10 ra- S VCM dians/second/volt. The loading presented by the MC1658 ELEMENTS IN THE LOOP e µ control input is large; the maximum input current is 350 A. l The components used in the PLL frequency synthesizer of Therefore, an active low–pass filter is used so that loading a Figure 1 are the MC145170 PLL chip, low–pass filter, and does not affect the filter’s response. See Figure 3. In the filter, c voltage–controlled oscillator (VCO). Sometimes a voltage– a 2N7002 FET is chosen because it has very high transcon- s controlled multivibrator (VCM) is used in place of the VCO. ductance (80 mmhos) and low input leakage (100 nA). e e r DIVIDE VALUE F ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005 INC. ARCHIVED BY FREESCALE SEMICONDUCTOR, REFERENCE REFERENCE REFERENCE MC145170 COUNTER OSCILLATOR LOW–PASS OSCILLATOR PLL (R COUNTER) fR FILTER TO CHIP PHASE LOW–PASS DETECTOR FILTER VCO/VCM FROM fV COUNTER VCO/VCM BUFFER (N COUNTER) OUTPUT VCO OR VCM MULTIPLYING VALUE Figure 1. PLL Frequency Synthesizer Figure 2. Detail of the MC145170 REV 2 1/98 TN98011500 MOTOROLA Motorola, Inc. 1998 For More Information On This Product, AN1207 Go to: www.freescale.com 1 Freescale Semiconductor, Inc. + 5 V + 5 V + 5 V 1.5 kΩ 4.6 MHz µ PLL 0.01 F R2 BIAS 1 – 2 V p–p FREQUENCY LOW–PASS 2.4 kΩ SOURCE ARCHIVEDSYNTHESIZER BY FREESCALE SEMICONDUCTOR, INC. 2005VCM Ω FILTER 1 M 1 16 1 16 C 1 µF 0.01 µF 0.01 µF 47 pF 0.01 µF PDout R1 2N7002 MC145170 MC1658 DATA IN 1.8 MΩ MCU ENABLE 0.01 µF CLOCK 0.01 µ 89 F 89 1 MΩ 1 MΩ 0.01 µF 0.01 µF ABOUTPUT MC74HCU04 MC74HCU04 . PULLDOWN . 510 Ω . LOW–PASS FILTER BUFFER/FILTER c n I Figure 3. HF Synthesizer , r In order to calculate the average divide value for the N 1.8 o ζ = 0.1 t Counter, follow this procedure. First, determine the average 1.7 frequency; this is (12.19 + 9.2)/2 = 10.695 MHz or approxi- 0.2 c mately 10.7 MHz. Next, divide this frequency by the resolu- 1.6 0.3 u tion: 10.7 MHz/230 kHz = about 47. 1.5 0.4 d Next, reference application note AN535 (see book 0.5 n 1.4 0.6 DL136/D Rev 3 or 4). The active filter chosen takes the form o 1.3 shown in Figure 9 of the application note. This filter is used 0.7 c with the single–ended phase detector output of the i 1.2 MC145170, PDout. The phase detector associated with PDout 1.1 m π π has a gain Kφ = V /4 . For a supply of 5 V, this is 5/4 = DD 1.0 e 0.398 V/rad. The system’s step response is shown in Figure 0.8 0.9 S 4. To achieve about 15% overshoot, a damping factor of 0.8 1.0 ω is used. This causes frequency to settle to within 1% at nt 0.8 2.0 e = 5.5. l 0.7 The information up to this point is as follows. a fref = 230 kHz 0.6 c f = 9.2 to 12.19 MHz; the average is 10.7 MHz, FREQUENCY (t), NORMALIZED OUTPUT VCM o s 0.5 θ average N = 47 e power supply = 5 V for the phase detector 0.4 e KVCM = 1 x 108 rad/s/V r 0.3 overshoot = approximately 15%, yields a damping F 0.2 ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005 INC. ARCHIVED BY FREESCALE SEMICONDUCTOR, factor = 0.8 lock time t = 8 ms settling to within 1%, ωnt = 5.5 0.1 Kφ or Kp = 0.398 V/rad. 0 From the application note, equation 61, ω = 5.5/t = 01.0 2.03.0 4.0 5.0 6.0 7.0 8.0 9.0 10 11 12 13 14 n ω t 5.5/0.008 = 687.5 rad/s. n Equation 59 is R1C = (Kp Kv)/ωn2 N = (0.398 x 1 x 108)/687.52 x 47 Figure 4. Type 2 Second Order Step Response = 1.79 Equation 59 is used because of the high–gain FET. µ Next, the capacitor C is picked to be 1 F. Therefore, HF SYNTHESIZER PROGRAMMING R1 = 1.79/C which is 1.79 MΩ. The standard value of 1.8 MΩ is used for R1. Programming the MC145170 is straightforward. The three Equation 63 is R2 = (2ζ)/C ωn registers may be programmed in a byte–oriented fashion. = (2 x 0.8)/(1 x 10–6 x 687.5) The registers retain their values as long as power is applied. = 2.33 kΩ. Thus, usually both the C and R Registers are programmed A standard value for R2 of 2.4 kΩ is utilized. just once, right after power up. AN1207 For More Information On This Product, MOTOROLA 2 Go to: www.freescale.com Freescale Semiconductor, Inc. The C Register, which configures the device, is pro- VHF SYNTHESIZER grammed with $C0 (1 byte). This sets the phase detector to The MC145170 may be used in VHF designs, also. The the proper polarity and activates PDout. This also turns off the unused outputs. The phase detector polarity is determined by range for this next example is 140 to 160 MHz in 100 kHz the filter and the VCM. For this example, the MC1658 data increments. ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005 sheet shows that a higher voltage level is needed if speed is VHF SYNTHESIZER LOW–PASS FILTER to be increased. However, the low–pass filter inverts the sig- nal from the phase detector (due to the active element config- To illustrate design with the doubled–ended phase detec- uration). Therefore, the programming of the polarity for the tor, the φR and φV outputs are used. This requires an opera- phase detector means that the POL bit must be a “1.” tional amplifier, as shown in Figure 5. From the design The R Register is programmed for a divide value that guidelines shown in the MC145170 data sheet, the following results in the proper frequency at the phase detector refer- equations are used: ence input. In this case, 230 kHz is needed. Therefore, with KφKVCO the 4.6 MHz source shown in Figure 3, the R Register needs ωn = (1) a value of $000014 (3 bytes, 20 in decimal). N C R1 The N Register determines the frequency tuned. Tuning ω R C damping factor ζ = n 2 (2) 9.2 MHz requires the proper value for N to multiply up the 2 reference of 230 kHz to 9.2 MHz.
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