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An FPGA-Based Trigger Processor for a Measurement of Deeply Virtual Compton Scattering at the COMPASS-II Experiment

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An FPGA-Based Trigger Processor for a Measurement of Deeply Virtual Compton Scattering at the COMPASS-II Experiment CERN-THESIS-2013-378 An FPGA-based Trigger Processor for a Measurement of Deeply Virtual Compton Scattering at the COMPASS-II Experiment Sebastian Schopferer Fakultät für Mathematik und Physik Albert-Ludwigs-Universität Freiburg An FPGA-based Trigger Processor for a Measurement of Deeply Virtual Compton Scattering at the COMPASS-II Experiment Dissertation zur Erlangung des Doktorgrades der Fakultät für Mathematik und Physik der Albert-Ludwigs-Universität Freiburg im Breisgau vorgelegt von Sebastian Schopferer aus Lahr/Schwarzwald Freiburg, Oktober 2013 Dekan: Prof. Dr. Michael R˚užiˇcka Leiter der Arbeit: Prof. Dr. Horst Fischer Referent: Prof. Dr. Horst Fischer Korreferent: Prof. Dr. Karl Jakobs Tag der Verkündigung des Prüfungsergebnisses: 16.12.2013 Teile dieser Arbeit wurden in folgenden Fachzeitschriften veröffentlicht: M. Alekseev, et al.: Physics Letters B, 693(3):227 – 235 (2010). doi:10.1016/j.physletb.2010.08.034 C. Adolph, et al.: Phys. Rev. D, 87(5):052018 (2013). doi:10.1103/PhysRevD.87.052018 S. Bartknecht, et al.: Nucl. Instr. and Meth. A, 623(1):507 – 509 (2010). doi:10.1016/j.nima.2010.03.052 S. Bartknecht, et al.: IEEE Trans. Nucl. Sci., 58(4):1456–1459 (2011). doi:10.1109/TNS.2011.2142195 J. Bieling, et al.: Nucl. Instr. and Meth. A, 672(0):13 – 20 (2012). doi:10.1016/j.nima.2011.12.104 M. Büchele, et al.: Physics Procedia, 37(0):1827 – 1834 (2012). doi:10.1016/j.phpro.2012.02.504 M. Büchele, et al.: JINST, 7(03):C03008 (2012). doi:10.1088/1748-0221/7/03/C03008 T. Baumann, et al.: JINST, 8(01):C01016 (2013). doi:10.1088/1748-0221/8/01/C01016 M. Alexeev, et al.: Nucl. Instr. and Meth. A, 695:159 – 162 (2012). doi:10.1016/j.nima.2011.11.079 M. Alexeev, et al.: Nucl. Instr. and Meth. A, 732:264 – 268 (2013). doi:10.1016/j.nima.2013.08.020 M. Alexeev, et al.: Nucl. Instr. and Meth. A, “Development of a Thick GEM-based detector for single photon detection”, to be published (2013). Contents 1 Introduction 1 2 Theoretical Motivation 3 2.1 The Nucleon Spin . 3 2.2 Deep Inelastic Scattering . 3 2.3 Parton Distribution Functions . 5 2.3.1 Unpolarized PDFs . 6 2.3.2 Longitudinal Polarized PDFs . 6 2.4 Generalized Parton Distributions . 9 2.4.1 Kinematic Variables . 10 2.4.2 Relation of the GPDs to Known Distributions . 10 2.4.3 Impact Parameter Dependent Parton Distributions . 12 2.4.4 GPDs and the Nucleon Spin Structure . 13 2.5 Deeply Virtual Compton Scattering . 14 2.6 Beam Charge & Spin Asymmetry at COMPASS-II . 16 3 The COMPASS-II Experiment 19 3.1 TheBeam .......................................... 19 3.2 The Target Region . 22 3.2.1 The Liquid Hydrogen Target . 22 3.2.2 The Recoil Proton Detector . 22 3.3 The Spectrometer . 26 3.3.1 Tracking Detectors . 26 3.3.2 Calorimeters . 26 3.3.3 Muon Identification . 27 3.3.4 RICH-1 . 29 3.4 The Trigger System . 31 3.5 The Data Acquisition System . 32 3.5.1 The GANDALF Framework . 34 4 CAMERA Proton Trigger 37 4.1 Detector Principle . 37 4.1.1 Time-of-Flight Measurement . 37 4.1.2 Energy Loss Measurement . 38 4.2 Trigger Concept . 41 vi Contents 4.2.1 Design Objectives . 41 4.2.2 Trigger Conditions . 41 4.2.2.1 Geometric Coincidence . 41 4.2.2.2 Time Calibration . 42 4.2.2.3 Cuts on Energy Deposition . 43 4.2.2.4 Correlation with the Beam . 45 4.2.3 Further Requirements . 46 4.3 Electronics Framework . 46 4.3.1 VME64x/VXS Crate . 47 4.3.2 Backplane Link . 48 5 The TIGER Module 53 5.1 Mainboard . 54 5.1.1 Virtex-6 FPGA . 54 5.1.1.1 Configurable Logic . 56 5.1.1.2 Clock Management . 57 5.1.1.3 Block RAM . 59 5.1.1.4 DSP Slices . 60 5.1.1.5 Inputs and Outputs . 60 5.1.1.6 Gigabit Transceivers . 62 5.1.2 DDR3 Memory . 63 5.1.3 Clock Distribution Network . 64 5.1.3.1 PCI Express Reference Clock . 64 5.1.3.2 Experiment Synchronous Clocks . 65 5.1.3.3 Free-Running Clocks . 66 5.1.4 CoolRunner-II CPLD . 67 5.1.5 Configuration Scheme . 68 5.1.5.1 Configuration at Power-Up . 68 5.1.5.2 Online Configuration . 69 5.1.5.3 JTAG Configuration and Flash Programming . 70 5.1.6 Power Distribution System . 71 5.1.6.1 Hot-Swap Capability . 71 5.1.6.2 Secondary Voltage Rails . 72 5.1.6.3 Power-Up/Power-Down Sequence . 74 5.1.6.4 Power Distribution System Summary . 75 5.1.7 PCB Layout . 76 5.1.7.1 Schematic . 76 5.1.7.2 Constraints . 77 5.1.7.3 Layout . 78 5.1.7.4 Simulation . 79 5.2 CPU and GPU Extension Boards . 82 5.2.1 COM Express Module Specification . 82 5.2.2 Kontron COMe-mTT10 . 82 Contents vii 5.2.3 COM Interfaces . 83 5.2.3.1 External Interfaces . 83 5.2.3.2 On-board Interfaces . 83 5.2.4 MXM GPU Module Specification . 87 5.2.4.1 TIGER MXM Interface . 87 5.2.5 AMD Radeon GPU Card . 89 5.2.6 PCI Express Interconnection . 89 5.2.6.1 PCI Express Specification . 89 5.2.6.2 PCI Express Device Layers . 91 5.2.6.3 PCI Express Transaction Protocol . 92 5.2.6.4 TIGER PCI Express Link Structure . 93 5.2.6.5 TIGER Switch Design . 94 5.3 Interfaces . 97 5.3.1 VXS Interface . 97 5.3.1.1 High Speed Signals . 97 5.3.1.2 Sideband Signals . 98 5.3.2 TIGER-to-TIGER Links . 100 5.3.3 SFP Transceiver Sockets . 101 5.3.4 TCS Interface . 101 5.3.5 General Purpose I/O . 101 6 Firmware and Software 105 6.1 FPGA Firmware . 105 6.1.1 TIGER Base Design . 106 6.1.1.1 CPLD Interface . 107 6.1.1.2 Clock Management, Reset Logic and VXS I/O Buffers . 107 6.1.1.3 TCS Interface Module . 109 6.1.1.4 PCIe Endpoint Block . 111 6.1.1.5 ChipScope Cores . 112 6.1.1.6 Optional Cores . 113 6.1.1.7 Partial Reconfiguration Workflow . 114 6.1.2 TIGER Trigger Processor Design . 116 6.1.3 TIGER Readout Concentrator Design . ..
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