PCI 9056BA Data Book

PCI 9056BA Data Book Version 1.3 January 2009 Website www.plxtech.com Technical Support www.plxtech.com/support Phone 800 759-3735 408 774-9060 FAX 408 774-2169 COPYRIGHT INFORMATION Copyright © 2003 – 2009 PLX Technology, Inc. All Rights Reserved. The information in this document is proprietary and confidential to PLX Technology. No part of this document may be reproduced in any form or by any means or used to make any derivative work (such as translation, transformation, or adaptation) without written permission from PLX Technology. PLX Technology provides this documentation without warranty, term or condition of any kind, either express or implied, including, but not limited to, express and implied warranties of merchantability, fitness for a particular purpose, and non-infringement. While the information contained herein is believed to be accurate, such information is preliminary, and no representations or warranties of accuracy or completeness are made. In no event will PLX Technology be liable for damages arising directly or indirectly from any use of or reliance upon the information contained in this document. PLX Technology may make improvements or changes in the product(s) and/or the program(s) described in this documentation at any time. PLX Technology retains the right to make changes to this product at any time, without notice. Products may have minor variations to this publication, known as errata. PLX Technology assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of PLX Technology products. PLX Technology, the PLX logo, and Data Pipe Architecture are registered trademarks of PLX Technology, Inc. HyperTransport is a trademark of the HyperTransport Technology Consortium. Tri-State is a registered trademark of National Semiconductor Corporation. Other brands and names are the property of their respective owners. Document Number: 9056BA-SIL-DB-P1-1.3 Contents Figures . xi Tables . xiii Registers. xvii Timing Diagrams . xxi Preface . xxv Supplemental Documentation . xxv Terms and Definitions . .xxvi Revision History. .xxvi Feature Summary. xxvii 1. Introduction . 1-1 1.1. Company and Product Background . 1-1 1.2. Data Pipe Architecture Technology . 1-1 1.2.1. High-Speed Data Transfers . 1-1 1.2.1.1. Direct Transfers . 1-1 1.2.1.1.1. Direct Master . 1-2 1.2.1.1.2. Direct Slave . 1-2 1.2.1.2. DMA . 1-2 1.2.1.2.1. DMA Block Mode . 1-3 1.2.1.2.2. DMA Scatter/Gather Mode . 1-3 1.2.1.2.3. Hardware DMA Controls – EOT and Demand Mode . 1-3 1.2.2. Intelligent Messaging Unit . 1-3 1.3. PCI 9056 I/O Accelerator . 1-3 1.3.1. Applications . 1-4 1.3.1.1. High-Performance Motorola MPC850 and MPC860 PowerQUICC Designs . 1-4 1.3.1.2. High-Performance CompactPCI Adapter Cards . 1-5 1.3.1.3. High-Performance PCI Adapter Cards . 1-6 1.3.1.4. High-Performance Embedded Host Designs . 1-7 1.4. Major Features . 1-8 1.4.1. Interfaces . 1-8 1.4.2. Data Transfer . 1-8 1.4.3. Messaging Unit . 1-9 1.4.4. Hosting Features . 1-9 1.4.5. Electrical/Mechanical . 1-10 1.4.6. Miscellaneous . 1-10 1.5. Compatibility with Other PLX Chips . 1-10 1.5.1. Pin Compatibility . 1-10 1.5.2. Register Compatibility . 1-10 1.5.3. PCI 9056 Comparison with Other PLX Chips . 1-11 PCI 9056BA Data Book, Version 1.3 © 2009 PLX Technology, Inc. All Rights Reserved iii Contents 2. M Mode Bus Operation . 2-1 2.1. PCI Bus Cycles. 2-1 2.1.1. Direct Slave Command Codes . 2-1 2.1.2. PCI Master Command Codes . 2-1 2.1.2.1. DMA Master Command Codes. 2-1 2.1.2.2. Direct Master Local-to-PCI Command Codes. 2-2 2.1.3. PCI Arbitration . 2-2 2.1.4. PCI Bus Wait States . 2-2 2.2. Local Bus Cycles . 2-3 2.2.1. Local Bus Arbitration . 2-3 2.2.1.1. Local Bus Arbitration Timing Diagram . 2-3 2.2.2. Direct Master . 2-4 2.2.3. Direct Slave . ..

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