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NCR 53C700/53C700-66 SCSI 1/0 Processor Data Manual

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NCR 53C700/53C700-66 SCSI 1/0 Processor Data Manual NCR 53C700/53C700-66 SCSI 1/0 Processor Data Manual The product(s) described in this publication is a licensed product of NCR Corporation. TolerANT and SCSI SCRIPTS are registered trademarks of NCR Corporation. It is the policy of NCR Corporation to improve products as new technology, components, software, and firmware become available. NCR Corporation, therefore, reserves the right to change specifications without notice. NCR products are not intended for use in life-suppott appliances, devices, or systems. Use of an NCR product in such applications without the written consent ofthe appropriate NCR officer is prohibited. For information on updates to this or other NCR products, contact the NCR Microelectronic Products Division electronic bulletin board at (719) 596-1649. Copyright ©1993 By NCR Corporation Dayton, Ohio U.S.A. All Rights Reserved Printed in U.S.A. c Preface SCSI Specifications This manual assumes some prior knowledge of current and proposed SCSI standards. For background information, please contact: ANSI 11 West 42nd Street New York, NY 10036 (212) 642-4900 Ask for document number X3.131-1986 (SCSI-I) Global Engineering Documents 2805 McGaw Irvine, CA 92714 (800)-854-7179 or (714) 261-1455 .? Ask for document number X3.131-199X (SCSI-2) ENDL Publications 14426 Black Walnut Court Saratoga, CA 95070 (408) 867-6642 Document names: SCSI Bench Reference, SCSI Encyclopedia Prentice Hall Englewood Cliffs, NJ 07632 (201) 767-5937 Ask for document number ISBN 0-13-796855-8, SCSI: Understanding the Small Computer System Inter­ face NCR Microelectronic Products Division Electronic Bulletin Board (719) 596-1649 The SCSI Electronic Bulletin Board (719) 574-0424 NCR 53C700/53C700-66 Data Manual Revision Record Page No. Dale Remarks nJa 10/89 Revision 2.3, Draft nJa 12/89 Revision 2.4, Draft nJa 2190 Revision 2.5, Draft nJa 1/92 Revision 3.0, Preliminary, Added the NCR 53C700-66 and NCR TolerANT 7-1 2192 Added Input Leakage-SCSI RST electrical specification nJa 11/92 Revision 4.0, Final, Reformatted to new standard ii NCR 53C700/53C700-66 Data Manual Table of Contents Preface .......................................................................................................................................... i Chapter One Introduction General Description ................................................................................................................... 1-1 SlOP Features Summary ...................................................................................................... 1-1 NCR's TolerANTTM Active Negation Technology ................................................................. 1-1 Benefit Summary .................................................................................................................. 1-2 Chapter Two Functional Description SCSI Core ........................................................................................................................... 2-1 DMA Core .......................................................................................................................... 2-1 SCSI SCRIPTS Processor .................................................................................................... 2-2 SlOP Data Paths .................................................................................................................. 2-2 How the SlOP Transfers16 or 32-Bit Data ............................................................................ 2-3 16-Bit Data Transfers for Bus Master Read and Write Cycles 80286 Mode or 80386 Mode .... 2-4 80286 Mode 16-Bit Data Transfers ....................................................................................... 2-4 80386 Mode 16-Bit Data Transfers ................................................................. , ..................... 2-5 32-Bit Data Transfers ........................................................................................................... 2-6 80486/80386 Mode .............................................................................................................. 2-6 How the SlOP Fetches Instructions ...................................................................................... 2-6 How to Transfer Data as a Bus Master .................................................................................. 2-6 Interrupts ............................................................................................................................. 2-8 Chapter Three Signal Descriptions NCR 53C700/53C700·66 Data Manual iii Chapter Four Registers Register Descriptions ................................................................................................................. 4-3 SCSI Control 0 (SCNTLO), Address 00 ReadlWrite ............................................................ .4-3 SCSI Control 1 (SCNTLl), Address 01 ReadlWrite ............................................................ .4-6 SCSI Destination ID (SDID), Address 02 ReadIWrite .......................................................... .4-8 SCSI Interrupt Enable (SIEN), Address 03 ReadIWrite ......................................................... .4-8 SCSI Chip ID (SCID), Address 04 ReadIWrite ................................................................... 4-10 SCSI Transfer (SXFER), Address 05 ReadlWrite ............................................................... .4-11 SCSI Output Data Latch (SODL), Address 06 ReadIWrite ................................................ .4-13 SCSI Output Control Latch (SOCL), Address 07 ReadlWrite .............................................. 4-14 SCSI First Byte Received (SFBR), Address 08 Read Only .................................................. .4-14 SCSI Input Data Latch (SIDL), Address 09 Read Only ...................................................... .4-15 SCSI Bus Data Lines (SBDL), Address OA Read Only ....................................................... .4-15 SCSI Bus Control Lines (SBCL), Address OB Read 53C700, ReadlWrite -66 ...................... .4-16 DMA Status (DSTAT), Address OC Read Only ............................................................... .4-17 SCSI Status 0 (SSTATO), Address OD Read Only .............................................................. .4-18 SCSI Status 1 (SSTATl), Address OE Read Only ............................................................... 4-20 SCSI Status 2 (SSTAT2), Address OF Read Only .............................................................. .4-21 Scratch A (SCRATCHA), Address 10-13 ReadIWrite ....................................................... .4-22 Chip Test 0 (CTESTO), Address 14 Read Only ................................................................ .4-22 Chip Test 1 (CTESTl), Address 15 Read Only ................................................................. .4-23 Chip Test 2 (CTEST2), Address 16 Read Only ................................................................. .4-23 Chip Test 3 (CTEST3), Address 17 Read Only ................................................................. .4-24 Chip Test 4 (CTEST4), Address 18 ReadlWrite ............................................................... .4-25 Chip Test 5 (CTEST5), Address 19 ReadIWrite ................................................................. 4-26 Chip Test 6 (CTEST6), Address lA ReadIWrite ................................................................ .4-27 Chip Test 7 (CTEST7), Address IB ReadIWrite ................................................................ .4-28 Temporary Stack (TEMP), Address lC-IF ReadlWrite ...................................................... .4-29 DMA FIFO (DFIFO), Address 20 ReadIWrite ................................................................... 4-29 Interrupt Status (ISTAT), Address 21 ReadlWrite .............................................................. .4-31 Chip Test 8 (CTEST8), Address 22 ReadlWrite ................................................................. 4-33 Chip Test 9 (CTEST9), Address 23 Read Only .................................................................. 4-34 DMA Byte Counter (DBC), Address 24-26 ReadIWrite ...................................................... .4-34 DMA Command (DCMD), Address 27 ReadlWrite ........................................................... .4-35 DMA Next Address for Data (DNAD), Address 28-2B ReadIWrite ................................... .4-35 DMA SCRIPTS Pointer (DSP), Address 2C-2F ReadlWrite .............................................. .4-36 DMA SCRIPTS Pointer Save (DSPS), Address 30-33 ReadIWrite ...................................... .4-36 DMA Mode (DMODE), Address 34 ReadlWrite ............................................................... .4-37 DMA Interrupt Enable (DIEN), Register 39 ReadIWrite ..................................................... 4-38 DMA Watchdog Timer (DWT), Address 3A ReadIWrite .................................................... .4-39 DMA Control (DCNTL), Address 3B ReadIWrite ............................................................ .4-40 Scratch B (SCRATCHB), Address 3C-3F ReadlWrite ........................................................ .4-41 / " 1",- iv NCR 53C700/53C700-66 Data Manual Chapter Five Command Set Block Move Instructions ............................................................................................................ 5-1 Indirect Addressing Field (Bit 29) ......................................................................................... 5-2 Opcode Field (Bits 28, 27) ..................................................................................................
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