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Circuit Design for RF Transceivers Text.Pdf Circuit Design for RF Transceivers Domine Leenaerts, Johan van der Tang and Cicero Vaucher Kluwer Academic Publishers CIRCUIT DESIGN FOR RF TRANSCEIVERS CIRCUIT DESIGN FOR RF TRANSCEIVERS By Domine Leenaerts Philips Research Laboratories Eindhoven Johan van derTang Eindhoven University of Technology and Cicero S. Vaucher Philips Research Laboratories Eindhoven KLUWER ACADEMIC PUBLISHERS BOSTON / DORDRECHT / LONDON EELCl|tTj A C.I.P. Catalogue record for this book is available from the Library of Congress. ISBN 0-7923-7551-3 Published by Kluwer Academic Publishers, P.O. Box 1 7, 3300 AA Dordrecht, The Netherlands. Sold and distributed in North, Central and South America by Kluwer Academic Publishers, 101 Philip Drive, Nonwell, MA 02061, U.S.A. In all other countries, sold and distributed by Kluwer Academic Publishers, P.O. Box 322, 3300 AH Dordrecht, The Netherlands. Printed on acid-free paper All Rights Reserved © 2001 Kluwer Academic Publishers, Boston No part of the material protected by this copyright notice may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying, recording or by any information storage and retrieval system, without written permission from the copyright owner. Printed in the Netherlands. To Lisanne, Nienke, and Viviane Contents Preface xiii 1 1 . RF DESIGN: CONCEPTS AND TECHNOLOGY 1 1 . 1 RF Specifications 1.1.1 Gain 2 1.1.2 Noise 6 1.1.3 Non-linearity 10 1.1.4 Sensitivity 14 1.2 RF Device Technology 14 1.2.1 Characterization and Modeling 15 Modeling 15 Cut-off Frequency 17 Maximum Oscillation Frequency 20 Input Limited Frequency 21 Output Limited Frequency 22 Maximum Available Bandwidth 23 1.2.2 Technology Choice 23 Double Poly Devices 24 Silicon-on-Anything 26 Comparison 28 SiGe Bipolar Technology 30 RF CMOS 30 1.3 Passives 33 1.3.1 Resistors 34 1.3.2 Capacitors 35 1.3.3 Planar Monolithic Inductors 37 References 42 2. ANTENNAS, INTERFACE AND SUBSTRATE 43 2. 1 Antennas 43 2.2 Bond Wires 46 2.3 Transmission Lines 49 2.3.1 General Theory 49 2.3.2 Impedance Matching using Transmission Lines 51 2.3.3 Microstrip Lines and Coplanar Lines 54 2.4 Bond Pads and ESD Devices 58 vii viii CIRCUIT DESIGN FOR RF TRANSCEIVERS 2.4.1 Bond Pads 59 2.4.2 ESD Devices 60 ggNMOST ESD Device 61 pn and np-Diode ESD Device 64 2.5 Substrate 67 2.5.1 Substrate Bounces 69 2.5.2 Design Techniques to Reduce the Substrate Bounces 71 References 77 3. LOW NOISE AMPLIFIERS 79 3.1 Specification 79 3.2 Bipolar LNA design for DCS Application in SOA 84 3.2.1 Design of the LNA 84 3.2.2 Measurements 93 3.3 CMOS LNA Design 94 3.3.1 Single Transistor LNA 94 Design Steps 95 Simulation and Measurement 101 3.3.2 Classical LNA Design 104 The Design 105 Measurement Results 108 3.4 Evaluation 108 References 111 4. MIXERS 113 4.1 Specification 113 4.2 Bipolar Mixer Design 118 4.3 CMOS Mixers 121 4.3.1 Active CMOS Mixers 1 22 4.3.2 Passive CMOS Mixers 127 1 //-Noise in Mixer Transistors 1 28 1 //-Noise due to IF Amplifier 133 l//-Noise due to Switched-Capacitor Behavior 138 4.3.3 Concluding Remarks 141 References 142 5. RF POWER AMPLIFIERS 145 5.1 Specification 145 5.1.1 Efficiency 145 5.1.2 Generic Amplifier Classes 1 46 5.1.3 Heating 149 Contents ix 5.1.4 Linearity 150 5.1.5 Ruggedness 151 5.2 Bipolar PA Design 151 5.3 CMOS PA Design 160 5.4 Linearization Principles 166 5.4.1 Predistortion Technique 168 5.4.2 Phase-Correcting Feedback 172 5.4.3 Envelope Elimination and Restoration (EER) 177 5.4.4 Cartesian Feedback 180 References 182 6. OSCILLATORS 185 6.1 Introduction 185 6.1.1 The Ideal Oscillator 185 6.1.2 The Non-ideal Oscillator 186 6. 1 .3 Application and Classification 188 6.1.4 Oscillation Conditions 191 6.1.5 Amplitude Stabilization 196 6.2 Specifications 199 6.2. 1 Frequency and Tuning 199 6.2.2 Tuning Constant and Linearity 200 6.2.3 Power Dissipation 200 6.2.4 Phase Noise to Carrier Ratio 201 Reciprocal Mixing 202 Signal to Noise Degradation of FM Signals 203 Spurious Emission 203 6.2.5 Harmonics 204 6.2.6 I/Q Matching 204 6.2.7 Technology and Chip Area 205 6.3 LC Oscillators 206 6.3.1 Frequency, Tuning and Phase Noise 206 Frequency 207 Tuning 208 Phase Noise to Carrier Ratio 209 6.3.2 Topologies 221 6.4 RC Oscillators 223 6.4.1 Frequency, Tuning and Phase Noise 223 Frequency 224 Tuning 225 Phase Noise to Carrier Ratio 228 6.4.2 Topologies 229 1 x CIRCUIT DESIGN FOR RF TRANSCEIVERS 6.5 Design Examples 231 6.5. 1 An 830 MHz Monolithic LC Oscillator 231 Circuit Design 231 Measurements 233 6.5.2 A 10 GHz I/Q RC Oscillator with Active Inductors 233 Circuit Design 234 Measurements 235 References 238 7. FREQUENCY SYNTHESIZERS 243 7.1 Introduction 243 7.2 Integer-N PLL Architecture 244 7.3 Tuning System Specifications 245 7.3.1 Tuning Range 245 7.3.2 Minimum Step Size 246 7.3.3 Settling Time 246 7.3.4 Spurious Signals 247 7.3.5 Phase Noise Sidebands 249 7.4 System-level Aspects of PLL Building Blocks 251 7.4.1 Voltage Controlled Oscillators 251 7.4.2 Frequency Dividers 252 7.4.3 Phase-frequency Detector/Charge-Pump Combination 253 Polarity of the Feedback Signal 254 Time-domain Operation 254 High-frequency Limitations 256 Spectral Components of the Output Signal 258 7.4.4 Loop Filter 258 Passive Loop Filters 260 Active Loop Filters 261 7.5 Dimensioning of the PLL Parameters 262 7.5.1 Open- and Closed-loop Transfer Functions 262 7.5.2 Open-loop Bandwidth fc and Phase Margin </>,„ 263 7.6 Spectral Purity Performance 268 7.6.1 Spurious Reference Breakthrough 268 Effect of Leakage Currents 269 Effect of Mismatch in the Charge-pump 27 7.6.2 Phase Noise Performance 272 Noise from PLL Blocks 273 The Equivalent Phase Noise Floor 274 Noise from Loop Filter and VCO 276 Total Phase Noise at Output of the PLL 277 Contents xi 7.6.3 Dimensioning of the PLL Loop Filter 279 Attenuation of Spurious Breakthrough 280 Phase Noise due to Loop Filter Resistor 280 Time Constant Ti and Capacitance C\ 283 7.7 Design of programmable Frequency Dividers 285 7.7.1 Divider Architectures 285 Dual-modulus Prescaler 285 Basic programmable Prescaler 287 Prescaler with Extended Programmability 288 7.7.2 Dividers in CMOS Technology 290 Logic Implementation 291 Circuit Implementation 292 Power Dissipation Optimization 293 Input Amplifier 295 Sensitivity Measurements 297 7.8 Design of PFD/CP Combinations 300 7.8.1 The Dead-zone Phenomenon 300 7.8.2 Architecture 302 7.8.3 Circuit Implementation 303 7.8.4 Measurement Results 304 References 308 Appendices 313 A- Behavioral Models 313 Model for a Low Noise Amplifier 313 Model for a Mixer 314 Model for a Power Amplifier 315 About the Authors 317 Index 319 Preface One of the key parts in a mobile telecommunication terminal is the transceiver. The term transceiver stems from the words transmitter and receiver. These words refer to the main task of a transceiver. In the context of a mobile telecom- munication terminal, the receiver transforms the signals coming from the an- tenna into signals which can then be converted into the digital domain. The transmitter converts the analog version of the digital data stream at baseband into a signal at radio frequencies, and delivers this signal to the antenna with a certain amount of power. Radio transceivers have been around since the 1900s, with the invention of AM and later FM radio broadcasting. In the 1920s, pioneers like Arm- strong developed transceiver concepts which we still use today. The frequency bands ranged from several kHz up to a few 100 MHz. Transceivers for mo- bile telecommunication started to appear in the 1980s, with the development of DECT and GSM standards. These and other telecommunication standards for mobile telephony used instead radio frequencies between 800 MHz and 3 GHz. Another difference between these transceivers and those of previous generations is that they were integrated on silicon, instead of being made with discrete components. The first integrated transceivers were designed in bipolar processes, eventually combined with GaAs technology. The transceiver itself consisted of several ICs. With the demand for higher data rates, attempts were made to develop wire- less data standards using concepts similar to those used in the successful mobile telecommunication standards. To achieve high data rates, the radio frequency was increased, resulting in the 5 GHz carrier frequency for HiPerLAN/2 (or IEEE 802.11a) with data rates up to 54 Mb/s. Another wireless standard is Bluetooth (or IEEE 802.11 b) where the primary goal was to obtain a standard which can be produced at very low cost. Due to pressure from the market economy, the trend in radio frequency design is to integrate the complete transceiver (except, possibly, for the power amplifier) on a single substrate as a multi-chip module, or even on a single die. This integration is not simple, due to the complexity of the system, its technical specifications and the need for good components at radio frequencies. Although the active devices currently have RF capabilities, this is not necessarily true for the integrated passive components such as inductors, varactors, bond pads and xiv CIRCUIT DESIGN FOR RF TRANSCEIVERS Figure I.
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