Alphaserver 4100 System
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I ALPHASERVER 4100 SYSTEM ORACLE AND SYBASE DATABASE PRODUCTS Digital FOR VLM Technical INSTRUCTION EXECUTION ON ALPHA PROCESSORS Journal • Volume 8 Number 4 1996 Editorial The Digital Technicaljournal is a refereed The following arc trademarks of Digital Jane C. Blake, Managing Editor journal published quarterly by Digital Equipment Corporation: AlphaServer, Kathleen M. Stetson, Editor Equipment Corporation, 50 Nagog Park, AlphaStation, DEC, DECnet, DIGITAL, Helen L. Patterson, Editor AK02-3/B3, Acton, MA 017 20-9843. the DIGITAL logo,VAX, VMS, and ULTIUX. Hard-copy subscriptions can be ordered by Circulation sending a check in U.S. funds (made payable AIM is a trademark of AIM Technology, Inc. Catherine M. Phillips, Administrator to Digital Equipment Corporation) to the CCT is a registered trademark of Cooper Dorothea B. Cassady, Secretary published-by address. General subscription and Chyan Te chnologies, Inc. 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The cover is a collage of images nies herein represented. Digital Equipment Processing Performance CoLuKil. UNIX from the development of the AlphaScrver Corporation assumes no responsibility for is a registered trademark in rJ1e United 4100 four-processor symmetric multipro any errors that may appear in the journal. States and in other countries, licensed cessing system, which offers 8 gigabytes ISSN 0898-901X exclusively rJ1roughX/Open Company of memory and industry leadership per Ltd. Xilinx is a registered trademark of Documentation Number EC-N7629-l8 formance. This four-processor symmetric Xilinx, Inc. multiprocessing system is not only charac Book production was done by Quantic terized by very large memory but by low Communications, Inc. latency, high bandwidth, and 400-megaherrz microprocessors. The cover design is by Lucinda O'Neill of DIGITAL's Corporate Design Group. Contents ALPHASERVER 4100 SYSTEM AlphaServer 4100 Performance Characterization Zarka Cvetanovic and Darrel D. Donaldson 3 The AlphaServer 4100 Cached Processor Module 21 Maurice .B. Stcinm;m, George J. Harris, Architecture and Design Andrej Kocev, Virginia C. Lamere, and D. Roger Pannell The AlphaServer 4100 Low-cost Clock Distribution System Roger A. Dame 38 Design and Implementation of the Alpha Server 4100 CPU 48 Glenn A. Herdeg and Memory Architecture High Performance Design in the AlphaServer 4100 61 1/0 SJmuel H. Duncan, Craig D. Keefer, and Symmetric Multiprocessing System Thomas A. NlcL1ughlin ORACLE AND SYBASE DATABASE PRODUCTS FOR VLM Design of the 64-bit Option for the Orade7 Relational Vipin V. GokhJie 76 Database Management System VLM Capabilities of the Sybase System 11 SQL Server j 83 T.K. Rengara an, Maxwell Berenson, Ganesan Gop;!], Bruce lvlcCrc.Jd)', Sa pan Panigrahi, Srikanr Subram;1niam, and Marc B. SugiyamJ INSTRUGION EXECUTION ON ALPHA PROCESSORS Measured Effects of Adding Byte and Word Instructions P. David Hunter and Eric 13. Bcrrs 89 to the Alpha Architecture 8 1996 Digit;!\ Tccbnicll Journal Vol. No.4 Editor's Introduction Just 40 years ago, a machine called the The AlphaScrvcr 4100 cached pro demonstrate a clear performance ben TX-0-a successor to Whirlwind cessor module design is presented by efit tor decision support systems and was built at MIT's Lincoln Laboratory Mo Steinman, George Harris, Andrej online transaction processing. The to find out, among other things, if a Kocev, Ginny Lamere, <llld Roger author summarizes data that show core memory as large as 64 Kwords Pannell . Built around the Alpha 211 64 a clear benefit for a database with the could be built. Over tJ1e years mem 64-bit !USC microprocessor, the 64 Bit Option enabled running on ory sizes have grown so large that, module is the first ti·om DIGITAL the AlphaServer 8400 with 8 gigabytes in the '90s, tJ1e industry has felt the to employ a high-performance, cost of memory; in some cases, the pertor need to characterize memory in big etkctive synchronous cache rather mance increase was 200 times that machines as large. At five orders than a traditional asynchronous cache. ofrhe standard configuration. Sybase uery of magnitude greater in size than the Next, Roger Dame reviews the clock engineers T.K. Renga.rajan, Max TX -0 memory, the AlphaServer 4100 distribution system, the use of off� Berenson, Ganesan Gop�1l, I>rucc 8-gigabyte memory is indeed very the-shelf phase-locked loop circuits McCready, Sapan Panigrahi, Srikam brgc, even by today's standards. \Vhole as the basic building block to keep Subramaniam, and Marc Sugiyama databases can be designed to reside in costs low, and the signal integrity examine the technology of the memory. Very large memory technol techniques developed to optimize System 11 SQL Server that was spc ogy, or VLM, is a key to rJ1e system performance of the clock distribution citically designed for VLM systems. and application performance discussed system for a worst-case clock skew of In addition to achieving record results in this issue of the.fournal, which fea 2.2 nanoseconds, a goal which the with the SQL Server running on rhc tures the AlphaServer 4100 system, team far exceeded. A unique memory AJphaServer 8400, the engineers have database enhancements from Oracle architecture for the model 5/300£ is laid the groundwork for ti.Iturc main Corporation and !TomSybase, Inc., and the subject. of Glenn Herdeg's paper. memory database systems. extensions to the Alpha architccwre.