10Th Gen Intel® Core™ Processor Families Datasheet, Vol. 1
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10th Generation Intel® Core™ Processor Families Datasheet, Volume 1 of 2 Supporting 10th Generation Intel® Core™ Processor Families, Intel® Pentium® Processors, Intel® Celeron® Processors for U/Y Platforms, formerly known as Ice Lake July 2020 Revision 005 Document Number: 341077-005 Legal Lines and Disclaimers You may not use or facilitate the use of this document in connection with any infringement or other legal analysis concerning Intel products described herein. You agree to grant Intel a non-exclusive, royalty-free license to any patent claim thereafter drafted which includes subject matter disclosed herein. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. Intel technologies' features and benefits depend on system configuration and may require enabled hardware, software or service activation. Performance varies depending on system configuration. No computer system can be absolutely secure. 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All rights reserved. 2 Datasheet, Volume 1 of 2 Contents 1 Introduction ............................................................................................................ 12 1.1 Processor Volatility Statement............................................................................. 13 1.2 Package Support ............................................................................................... 13 1.3 Supported Technologies ..................................................................................... 13 1.3.1 API Support (Windows*) ......................................................................... 14 1.4 Power Management Support ............................................................................... 14 1.4.1 Processor Core Power Management........................................................... 14 1.4.2 System Power Management..................................................................... 14 1.4.3 Memory Controller Power Management...................................................... 14 1.4.4 Processor Graphics Power Management ..................................................... 15 1.4.4.1 Memory Power Savings Technologies........................................... 15 1.4.4.2 Display Power Savings Technologies ............................................ 15 1.4.4.3 Graphics Core Power Savings Technologies................................... 15 1.5 Thermal Management Support ............................................................................ 15 1.6 Processor Testability .......................................................................................... 16 1.7 Operating Systems Support ................................................................................ 16 1.8 Terminology and Special Marks ........................................................................... 16 2 Technologies ........................................................................................................... 20 2.1 Platform Environmental Control Interface (PECI) ................................................... 20 2.1.1 PECI Bus Architecture ............................................................................. 20 2.2 Intel® Virtualization Technology (Intel® VT) .......................................................... 22 2.2.1 Intel® Virtualization Technology (Intel® VT) for Intel® 64 and Intel® Architecture (Intel® VT-X)......................................................................................... 22 2.2.2 Intel® Virtualization Technology (Intel® VT) for Directed I/O (Intel® VT-d) .... 23 2.2.3 Intel® APIC Virtualization Technology (Intel® APICv) .................................. 26 2.3 Security Technologies ........................................................................................ 27 2.3.1 Intel® Trusted Execution Technology (Intel® TXT) ...................................... 27 2.3.2 Intel® Advanced Encryption Standard New Instructions (Intel® AES-NI) ........ 28 2.3.3 Perform Carry-Less Multiplication Quad Word (PCLMULQDQ) Instruction ........ 28 2.3.4 Intel® Secure Key .................................................................................. 28 2.3.5 Execute Disable Bit................................................................................. 29 2.3.6 Boot Guard Technology ........................................................................... 29 2.3.7 Intel® Supervisor Mode Execution Protection (SMEP) .................................. 29 2.3.8 Intel® Supervisor Mode Access Protection (SMAP) ...................................... 30 2.3.9 Intel® Software Guard Extensions (Intel® SGX).......................................... 30 2.3.10 Intel® Secure Hash Algorithm Extensions (Intel® SHA Extensions)................ 31 2.3.11 User Mode Instruction Prevention (UMIP)................................................... 31 2.3.12 Read Processor ID (RDPID)...................................................................... 32 2.4 Power and Performance Technologies................................................................... 32 2.4.1 Intel® Smart Cache Technology ............................................................... 32 2.4.2 IA Core Level 1 and Level 2 Caches .......................................................... 32 2.4.3 Intel® Turbo Boost Max Technology 3.0 .................................................... 33 2.4.4 Power Aware Interrupt Routing (PAIR) ...................................................... 34 2.4.5 Intel® Hyper-Threading Technology (Intel® HT Technology) ......................... 34 2.4.6 Intel® Turbo Boost Technology 2.0 ........................................................... 34 2.4.6.1 Intel® Turbo Boost Technology 2.0 Power Monitoring..................... 34 2.4.6.2 Intel® Turbo Boost Technology 2.0 Power Control ......................... 35 2.4.6.3 Intel® Turbo Boost Technology 2.0 Frequency............................... 35 2.4.7 Enhanced Intel SpeedStep® Technology .................................................... 35 2.4.8 Intel® Speed Shift Technology ................................................................. 36 Datasheet, Volume 1 of 2 3 2.4.9 Intel® Advanced Vector Extensions 2 (Intel® AVX2) ....................................36 2.4.10 Intel® 64 Architecture x2APIC ..................................................................36 2.4.11 Intel® GNA (GMM and Neural Network Accelerator) .....................................37 2.4.12 Advanced Vector Extensions 512 Bit (Intel® AVX-512).................................38 2.4.13 Cache Line Write Back (CLWB) .................................................................39 2.4.14 Ring Interconnect ...................................................................................39 2.5 Intel® Image Processing Unit (Intel® IPU) ............................................................40 2.5.1 Platform Imaging Infrastructure................................................................40 2.5.2 Intel® Image Processing Unit (Intel® IPU) .................................................40 2.6 Debug Technologies ...........................................................................................41 2.6.1 Intel® Processor Trace ............................................................................41 3 Power Management .................................................................................................42 3.1 Advanced Configuration and Power Interface (ACPI) States Supported ......................43 3.2 Processor IA Core Power Management ..................................................................44 3.2.1 OS/HW Controlled P-states ......................................................................44 3.2.1.1 Enhanced Intel SpeedStep® Technology .......................................44 3.2.1.2 Intel® Speed Shift Technology ....................................................44 3.2.2 Low-Power Idle States.............................................................................44 3.2.3 Requesting Low-Power Idle States ............................................................45 3.2.4 Processor IA Core C-State Rules ...............................................................45 3.2.5 Package C-States ...................................................................................46