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LC-2 Programmer's Reference and User Guide

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LC-2 Programmer's Reference and User Guide LC-2 Programmer’s Reference and User Guide University of Michigan EECS 100 Matt Postiff Copyright (C) Matt Postiff 1995-1999. All rights reserved. Written permission of the author is required for duplication of this document. Table of Contents Table of Contents . i List of Tables . iii List of Figures . v Chapter 1 Introduction to the LC-2 . 1 1.1 Notational Conventions . 3 Chapter 2 LC-2 Programmer’s Reference . 7 2.1 LC-2 Programming Model. 9 2.2 Instruction Set . 10 2.3 Summary of Instruction Formats and Semantics. 28 2.4 Addressing Modes . 31 2.5 Branching Modes. 32 2.6 The LC-2 System Calls . 33 2.7 The LC-2 Hardware Registers . 34 2.8 The LC-2 Memory Map. 35 Chapter 3 LC-2 Machine- and Assembly-Programming . 37 3.1 Introduction to Program Execution in the LC-2 . 39 3.2 The LC-2 Instruction Encoding . 40 3.3 Condition Codes in the LC-2 Processor. 41 3.3.1 Condition Field in the Instruction Encoding. 41 3.4 Keyboard Input and Console Output . 42 3.5 Programming the LC-2 in Machine Language . 43 3.5.1 Machine-Language File Formats . 43 3.6 Programming the LC-2 in Assembly Language . 46 3.6.1 Introduction. 46 3.6.2 LC-2 Assembly Language . 46 3.6.3 The Assembly Process . 49 3.6.4 Some Examples. 49 Chapter 4 LC-2 Programming Tools Guide. 51 4.1 The convert Program . 53 4.2 The assemble Program. 54 4.2.1 The Listing File. 54 4.3 The Simulator. 55 4.3.1 The Simulator Menu Bar . 56 Chapter 5 Appendices. 61 Appendix A ASCII Reference . 63 i Appendix B Simulator Script Reference . 65 Appendix C Installing the LC-2 Software . 67 ii List of Tables Table 1. Notational Conventions . 3 Table 2. The Logical Operators . 5 Table 3. Specifying when a branch occurs by the relationship between the instruction’s nzp bits and the condition codes. 14 Table 4. LC-2 Instruction Format Summary. 28 Table 5. LC-2 addressing modes . .31 Table 6. LC-2 branching modes . .32 Table 7. LC-2 System Calls . 33 Table 8. LC-2 Hardware Registers . 34 Table 9. Condition Codes in the LC-2 Processor . 41 Table 10. The Possibilities for the Condition Field in the Instruction (nzp) . 41 Table 11. The elements of a line of an LC-2 assembly language program . 46 Table 12. LC-2 Assembler reserved characters . 47 Table 13. LC-2 assembler pseudo-ops . 48 Table 14. LC-2 assembler output files . 54 Table 15. ASCII Code Reference . 63 iii List of Figures Figure 1. LC-2 Memory Map . .35 Figure 2. The binary representation of an LC-2 program (left) and its equivalent hexadecimal representation (right). 43 Figure 3. A more complicated LC-2 program . 44 Figure 4. The program of Figure 2 shown in assembly language. 49 Figure 5. The program of Figure 3 shown in assembly language. 50 Figure 6. Assembler-produced listing file for dumbadd.asm . 54 Figure 7. The LC-2 simulator . 55 Figure 8. The LC-2 console window . 56 Figure 9. The LC-2 Simulator menu bar. 57 Figure 10. The LC-2 Simulator File menu (A) and associated dialog boxes (B-D). 57 Figure 11. The LC-2 Simulator Run menu (A) and associated dialog boxes (B-D). 58 Figure 12. The LC-2 Simulator Set Values menu (A) and an associated dialog box (B). 59 Figure 13. The LC-2 Simulator Display menu (A) and an associated dialog box (B). 59 Figure 14. The LC-2 Simulator Options (A) and Help menus (B). 60 Figure 15. The LC-2 Simulator Popup menu.. 60 v CHAPTER 1 Introduction to the LC-2 The Little Computer 2 (LC-2) is a simple computer used to introduce general-purpose computing devices to first-year engineer- ing students with no previous background in computer architecture or logic design. This document introduces the use and programming of the LC-2. The remainder of this chapter defines notation used throughout this manual. The LC-2 Programmer’s Reference in Chapter 2 is a detailed reference manual for students who will write several programming assignments on the machine. Chapter 3 details LC-2 machine-language and assembly-language programming. The LC-2 Programming Tools Guide in Chapter 4 provides information concerning use of the assembler and simulator. The appendices pro- vide an ASCII character reference and some detail about the simula- tion tools. The LC-2 and accompanying materials have been used for the introductory computing course (EECS 100) at the University of Michigan since the Fall of 1995. Winter 1999 is the eighth semester in which the LC-2 has been used. The course lectures, the textbook, and this document comple- ment each other, and neither in isolation will cover the whole LC-2. 1 1.1. Notational Conventions This section summarizes the notational conventions used throughout this manual. A word is a 16-bit quantity with bit order increasing from right to left, so that the left bit is numbered 15 and the right bit is numbered 0. Bit 15 is the most significant bit, while bit 0 is the least significant bit. The following figure illustrates: 1514131211109876543210 Table 1 lists the symbols and terms used throughout the manual. Table 1: Notational Conventions Notation Meaning $Number, XNumber, The number is specified in base-16 (hexadecimal). 0XNumber, 0xNumber #Number The number is specified in base-10 (decimal). A<l:r> Denotes part of a value, specifically, the bits in positions l through r of value A (usually a register or memory location). For example, if the value in the PC is (hex) $301A = (binary) 0011 0000 0001 1010, then PC<15:9> refers to the 7 bits 0011 000. If only one bit needs to be denoted, the notation is usually abbrevi- ated as A<l>, the :r part being left off. For example, PC<2:2> is the same as PC<2>, which is the single bit found at bit position 2 of the PC (0 in this case). A @ B Concatenation of A and B. For example, if A is 0011 01 and B is 00 1100 1000, A @ B = 0011 0100 1100 1000. BaseR Base Register. one of R0..R7 whose contents specify the base address of a memory structure. COND Condition upon which a branch occurs. These are based on the processor status bits N, Z, and P. See the BR instruction. page The set of 29 consecutive memory locations which share the same high 7 address bits (bits <15:9> of the address). current page The page where the currently executing instruction resides. DR Destination Register; one of R0..R7 which specifies where the result of an instruction should be written general purpose register Any register R0..R7. 3 Table 1: Notational Conventions Notation Meaning imm5 5-bit immediate value; 5 bits in an instruction used as a literal (immediate) value; sign extended to 16 bits. Range {-16..15}. index6 6-bit immediate value; These 6 bits are zero extended and.
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