SPARC/CPU-5V Technical Reference Manual
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SPARC/CPU-5V Technical Reference Manual P/N 203651 Edition 5.0 February 1998 FORCE COMPUTERS Inc./GmbH All Rights Reserved This document shall not be duplicated, nor its contents used for any purpose, unless express permission has been granted. Copyright by FORCE COMPUTERS CPU-5V Technical Reference Manual Table of Contents SECTION 1 INTRODUCTION ....................................................................................1 1. Getting Started ..................................................................................................................................... 1 1.1. The SPARC CPU-5V Technical Reference Manual Set.................................................................. 1 1.2. Summary of the SPARC CPU-5V ................................................................................................... 2 1.3. Specifications ................................................................................................................................... 4 1.3.1. Ordering Information........................................................................................................... 6 1.4. History of the Manual ...................................................................................................................... 9 SECTION 2 INSTALLATION ....................................................................................11 2. Introduction........................................................................................................................................ 11 2.1. Caution ........................................................................................................................................... 11 2.2. Location Diagram of the SPARC CPU-5V Board ......................................................................... 12 2.3. Before Powering Up....................................................................................................................... 14 2.3.1. Default Switch Settings ..................................................................................................... 14 2.4. Powering Up................................................................................................................................... 16 2.4.1. VME Slot-1 Device ........................................................................................................... 16 2.4.2. VMEbus SYSRESET Enable/Disable............................................................................... 17 2.4.2.1. SYSRESET Input ................................................................................................ 17 2.4.2.2. SYSRESET Output ............................................................................................. 17 2.4.3. Serial Ports......................................................................................................................... 17 2.4.4. RESET and ABORT Key Enable ...................................................................................... 18 2.4.5. SCSI Termination .............................................................................................................. 18 2.4.5.1. SCSI Termination at the Front Panel................................................................... 18 2.4.5.2. SCSI Termination at P2....................................................................................... 18 2.4.6. Boot Flash Memory Write Protection................................................................................ 19 2.4.7. User Flash Memory Write Protection................................................................................ 19 2.4.8. Reserved Switches ............................................................................................................. 19 2.4.9. Parallel Port or Floppy Interface via VME P2 Connector................................................. 20 2.4.10. Ethernet via Front Panel or VME P2 Connector ............................................................ 21 2.5. OpenBoot Firmware....................................................................................................................... 22 2.5.1. Boot the System................................................................................................................. 22 2.5.2. NVRAM Boot Parameters................................................................................................. 25 2.5.3. Diagnostics......................................................................................................................... 26 2.5.4. Display System Information .............................................................................................. 30 2.5.5. Reset the System................................................................................................................ 32 2.5.6. OpenBoot Help .................................................................................................................. 32 2.6. Front Panel ..................................................................................................................................... 34 2.6.1. Features of the Front Panel ................................................................................................ 35 2.7. SPARC CPU-5V Connectors ......................................................................................................... 36 2.7.1. Ethernet Connector Pinout................................................................................................. 37 2.7.2. Serial Port A and B Connector Pinout............................................................................... 38 2.7.3. SCSI Connector Pinout...................................................................................................... 40 2.7.4. Keyboard/Mouse Connector Pinout................................................................................... 42 FORCE COMPUTERS Page i Table of Contents CPU-5V Technical Reference Manual 2.7.5. VME P2 Connector Pinout ................................................................................................ 43 2.7.6. The IOBP-10 Connectors................................................................................................... 44 2.8. Ethernet Address and Host ID........................................................................................................ 51 SECTION 3 HARDWARE DESCRIPTION .............................................................53 3. Overview ............................................................................................................................................. 53 3.1. Block Diagram ............................................................................................................................... 53 3.2. The microSPARC-II Processor ...................................................................................................... 55 3.2.1. Features of the microSPARC-II Processor ........................................................................ 55 3.2.2. Address Mapping for microSPARC-II .............................................................................. 56 3.3. The Shared Memory....................................................................................................................... 57 3.4. Memory Module MEM-5............................................................................................................... 58 3.5. SBus Participants............................................................................................................................ 59 3.5.1. Address Mapping for SBus Slots on the SPARC CPU-5V ............................................... 59 3.6. NCR89C100 (MACIO) .................................................................................................................. 60 3.6.1. Features of the NCR89C100 on the SPARC CPU-5V ...................................................... 61 3.6.2. SCSI................................................................................................................................... 62 3.6.3. SCSI Termination .............................................................................................................. 62 3.6.4. Ethernet.............................................................................................................................. 63 3.6.5. Parallel Port........................................................................................................................ 63 3.7. NCR89C105 (SLAVIO)................................................................................................................. 64 3.7.1. Features of the NCR89C105 on the SPARC CPU-5V ...................................................... 64 3.7.2. Address Map of Local I/O Devices on SPARC CPU-5V.................................................. 65 3.7.3. Serial I/O Ports................................................................................................................... 67 3.7.4. RS-232, RS-422 or RS-485 Configuration........................................................................ 67 3.7.5. RS-232 Hardware Configuration....................................................................................... 68 3.7.6. RS-422 Hardware Configuration....................................................................................... 69 3.7.7. RS-485 Hardware Configuration....................................................................................... 71 3.7.8. Keyboard and Mouse