DOCSLIB.ORG

Amorphous Silicon Thin-Film Transistors for Flexible Electronics

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Amorphous Silicon Thin-Film Transistors for Flexible Electronics Amorphous silicon thin-film transistors for flexible electronics Helena Gleskova, I-Chun Cheng, Ke Long, Sigurd Wagner, James Sturm Department of Electrical Engineering and Princeton Institute for the Science and Technology of Materials Princeton University Zhigang Suo Division of Engineering and Applied Sciences, Harvard University The work at Princeton University is supported by the United States Display Consortium. Berkeley, April 13, 2007 Flexible displays Lucent, E-Ink http://www.eink.com/iim/sale.html Transistor “backplane” and display “frontplane” Schematic cross section Amorphous silicon thin film transistor of a display generic backplane Gate Source Drain Encapsulation 1 μm - 1 mm Cr a-Si:H Display layer (LCD, PLED..) SiNx Transistor layer ~ 1 μm Passivation layer Substrate Substrate: glass, steel, plastic 10 μm - 1 mm Backplane | Frontplane Passivation layer • TFT backplane is generic for all flat panel technologies • Add display layer on top Gleskova H., Wagner S., IEEE Electron Device Letters 20 (1999), pp. 473-475. Outline • Metal versus plastic foil substrate • a-Si:H TFT deposition temperature • Overlay alignment Steel versus plastic Cheng I-C. et al., IEEE EDL 27 (2006) 166. Kattamis A.Z., Princeton University polymer foil substrate steel foil substrate < 280°C process temperature up to ~1000°C low dimensional stability > 10 times higher some visually clear no yes permeable to O2 or H2O no moderate surface roughness rough some inert to chemicals yes no electrical conductor yes Steel versus plastic Cheng I-C. et al., IEEE EDL 27 (2006) 166. Kattamis A.Z., Princeton University polymer foil substrate steel foil substrate < 280°C process temperature up to ~1000°C low dimensional stability > 10 times higher some visually clear no yes permeable to O2 or H2O no moderate surface roughness rough some inert to chemicals yes no electrical conductor yes a-Si:H TFTs made at 150ºC on Kapton Gate-to-source current current Gate-to-source I -5 Tdep = 150ºC Vds = 10 V -5 (A) 10 10 ds 0.1 V 10-7 10-7 Gate Source Drain I 10-9 ds 10-9 -11 Igs -11 10 10 gs (A) Drain-to-source current current I Drain-to-source 10-13 10-13 -10 -5 0 5 10 15 20 Gate-to-source voltage Vgs (V) 7 2 Ion/Ioff > 10 , μlin ~ 0.45 cm /Vs, VT ~ 2 V Acceptable TFT performance, but … Gleskova H. et al., J. Electrochem. Society 148 (2001), pp. G370-G374. Gleskova H. et al., J. Appl. Phys. 92 (2002), pp. 6224-6229. Bias-stress instability of a-Si:H TFTs 10-4 10-5 Stress time: 600 sec 10-6 (A) D 10-7 10-8 Initial After stress of 10-9 Vg = 20 V Drain Current I 10-10 10-11 10-12 -10 -5 0 5 10 15 20 Gate-to-Source Voltage V (V) GS Long K. et al., IEEE Electron Device Lett. 27 (2006), pp. 111-113. a-Si TFT stability rises with process temperature Glass (300°C-350°C) [2] Kapton-E (150°C) [1] 10 [1] Gleskova, IEEE TED, (V) Τ 2001 V Δ Glass (150°C) [5] [2] Cheng, IEEE Proc. Solid-State and Integrated Circuit Tech., 1998 1 Glass (350°C) [3] [3] Kanicki, APL, 1993 [4] Tsukada, JAP, 1991 Stress time: Threshold Change 600sec Glass (300°C-360°C) [4] [5] Long, Princeton Univ. 0.1 10 Stress Field (*107 V/m) ⇒ Must make a-Si:H TFTs at high process temperature a-Si:H TFTs made on clear plastic at 280ºC Cherenack K., Princeton University a-Si:H TFT stability on clear plastic substrates Kapton-E (150°C) Glass (300°C-350°C) 10 (V) Glass (150°C) Τ V Δ Clear plastic (150ºC) 1 Glass (350°C) Glass (300°C-360°C) Threshold Change 0.1 Stress time: 600sec Clear Plastic (250ºC) 10 Stress Field (*107 V/m) ΔVT depends only on process T, not on substrate material Long K. et al., IEEE Electron Device Lett. 27 (2006), pp. 111-113. Steel versus plastic Cheng I-C. et al., IEEE EDL 27 (2006) 166. Kattamis A.Z., Princeton University polymer foil substrate steel foil substrate < 280°C process temperature up to ~1000°C low dimensional stability > 10 times higher some visually clear no yes permeable to O2 or H2O no moderate surface roughness rough some inert to chemicals yes no electrical conductor yes Substrate stiffness affects dimensional stability thin film (small df) Ys⋅ds versus Yf ⋅df stiff (large Yf) compliant (small Yf) poly-Si TFT / steel substrate OLED / steel substrate Wu M. et al., APL 75 (1999) 2244 Wu C.C. et al., IEEE EDL 18 (1997) 609 stiff (large Ys) thick Ys⋅ds >> Yf ⋅df Y ⋅d >> Y ⋅d substrate s s f f (large ds) a-Si TFT / polymer substrate OTFT / polymer substrate Gleskova H., Princeton University Jackson T., Penn State Univ. compliant (small Ys) Ys⋅ds ≈ Yf ⋅df Ys⋅ds >> Yf ⋅df a-Si:H TFT process 1. Front SiNx passivation 2. Back SiN passivation 80 nm x SiNx Kapton 500 nm 3. Cr gate metal deposition 4. Cr gate patterning - mask 1 Cheng I-C. et al., J. SID 13 (2005), pp. 563-568. a-Si:H TFT process – cont. (n+) a-Si:H Cr 80 nm undoped 50 nm a-Si:H 200 nm 300 nm SiNx Substrate 5. PECVD TFT stack: 5 W SiNx 5. PECVD TFT stack: 12 W SiNx (i) a-Si:H (i) a-Si:H (n+) a-Si:H (n+) a-Si:H 6. Cr S/D deposition 6. Cr S/D deposition 7. S/D patterning – mask 2 7. S/D patterning – mask 2 Cheng I-C. et al., J. SID 13 (2005), pp. 563-568. Location of alignment marks 70 mm 52 mm 70 mm 1 2 52 mm 5 roll axis feature of mask 1: bottom gate metal layer 3 4 mask 1 & 2 40 μm feature of mask 2: S/D layer Cheng I-C. et al., J. SID 13 (2005), pp. 563-568. 2 1 5W gate SiNx ~ 52 mm shrinkage ~ 30 μm 5 40 μm 40 μm ~ 52 mm shrink. ~ 25 μm shrink. ~ 20 μm ~ 52 mm 3 4 40 μm shrinkage ~ 28 μm ~ 52 mm 40 μm 40 μm Average shrinkage ~ 500 ppm Cheng I-C. et al., J. SID 13 (2005), pp. 563-568. 1 2 12W gate SiNx ~ 52 mm stretching ~ 6 μm 5 40 μm 40 μm ~ 52 mm shrink. ~ 10 μm shrink. ~ 1 μm ~ 52 mm 3 4 40 μm 40 μm stretching ~ 3 μm ~ 52 mm 40 μm 40 μm Average change ~ 100 ppm Cheng I-C. et al., J. SID 13 (2005), pp. 563-568. Film grown on foil substrate at elevated temperature Substrate at room αs (Td –Tr ) temperature Tr Substrate at deposition temperature Td εs(Td ) Free-standing film at Td εbi εbi < 0 εf (Td ) Workpiece at Td after film growth αs > αf αf (Td –Tr ) Film and substrate at Tr if they were separated εf (Tr ) Workpiece at Tr when held flat εs(Tr ) [(α f − α s )⋅ (Tr − Td )+ εbi ] ε (T ) = ν =ν s r Y d f s 1+ s s Y f d f Gleskova H. et al., in Flexible Electronics: Materials and Applications, Gleskova H. et al., Appl. Phys. Lett. 88 (2006), 011905. Eds. Wong W.S., Salleo A., Springer-Verlag – to be published. Film release from the substrate holder Workpiece at Tr when held flat Workpiece at Tr when released from the substrate holder SiNx R Bare8 19 24 40 mW/cm2 2 ⎛ 2 ⎞ 2 ⎜ Y f d f ⎟ Y f d f ⎛ d f ⎞ 1− + 4 ⎜1+ ⎟ ⎜ 2 ⎟ Y d ⎜ d ⎟ d ⎜ Ysds ⎟ s s ⎝ s ⎠ R = s ⋅ ⎝ ⎠ Y f d f ⎛ d f ⎞ 6 ()1+ν []()α f −αs ⋅()Tr −Td +ε bi ⎜1+ ⎟ Ysds ⎝ ds ⎠ Cheng I-C. et al., J. SID 13 (2005), pp. 563-568. Suo Z. et al., Appl. Phys. Lett. 74 (1999), pp. 1177-1179. Steel foil 0.1 60 after film deposition ) Td 40 -1 o Substrate strain 0.05 250 C ε o s 200 C 20 (T o r Steel 150 C (ppm)) 0 0 -20 -0.05 compressive tensile -40 Curvature 1/R (cm 1/R Curvature built-in stress built-in stress -0.1 -60 0.01 0.005 0 -0.005 -0.01 SiNx built-in strain A rigid substrate foil is not changed much by CTE mismatch Possible to maintain reasonable overlay accuracy Gleskova H. et al., in Flexible Electronics: Materials and Applications, Eds. Wong W.S., Salleo A., Springer-Verlag – to be published. Kapton foil 1 1000 after film deposition ) Td -1 o Substrate strain 0.5 250 C 500 ε o s 200 C (T o r Kapton 150 C (ppm)) 0 0 -0.5 -500 compressive tensile Curvature 1/R (cmCurvature built-in stress built-in stress -1 -1000 0.01 0.005 0 -0.005 -0.01 SiNx built-in strain Stress built into the SiNx can compensate thermal mismatch and eliminate curvature and misalignment Gleskova H. et al., in Flexible Electronics: Materials and Applications, Eds. Wong W.S., Salleo A., Springer-Verlag – to be published. Summary • Higher deposition temperatures needed for good TFT stability • Deposition at elevated temperature changes in-plane dimensions d f d f • Changes are small if <~ 0 . 05 (steel) or <~ 0 . 001 (Kapton) ds ds • CTE mismatch change in in-plane dimensions is ~ 20 ppm for a-Si:H TFTs on 100-μm steel foil ~ 500 ppm for a-Si:H TFTs on 100-μm Kapton foil • Tailor built-in stress in the film to compensate CTE mismatch ⇒ possible to eliminate misalignment ⇒ possible to eliminate curvature of the workpiece.
Load more

Recommended publications
  • Amorphous Silicon/Crystalline Silicon Heterojunctions for Nuclear Radiation Detector Applications
    LBNL-39508 UC-406 ERNEST DRLANDD LAWRENCE BERKELEY NATIDNAL LABDRATDRY Amorphous Silicon/Crystalline Silicon Heterojunctions for Nuclear Radiation Detector Applications MAR 2 5 897 J.T. Walton, W.S. Hong, P.N. Luke, N. W. Wang, and F.P. Ziemba O STI Engineering Division October 1996 Presented at the 1996IEEENuclear Science Symposium, r Los Angeles, CA, November 12-15,1996, and to be published in the Proceedings DISCLAIMER This document was prepared as an account of work sponsored by the United States Government. While this document is believed to contain correct information, neither the United States Government nor any agency thereof, nor The Regents of the University of California, nor any of their employees, makes any warranty, express or implied, or assumes any legal responsibility for the accuracy, completeness, or usefulness of any information, apparatus, product, or process disclosed, or represents that its use would not infringe privately owned rights. Reference herein to any specific commercial product, process, or service by its trade name, trademark, manufacturer, or otherwise, does not necessarily constitute or imply its endorsement, recommendation, or favoring by the United States Government or any agency thereof, or The Regents of the University of California. The views and opinions of authors expressed herein do not necessarily state or reflect those of the United States Government or any agency thereof, or The Regents of the University of California. Ernest Orlando Lawrence Berkeley National Laboratory is an equal opportunity employer. LBNL-39508 UC-406 Amorphous Silicon/Crystalline Silicon Heterojunctions for Nuclear Radiation Detector Applications J.T. Walton, W.S. Hong, P.N.
    [Show full text]
  • Thin-Film Silicon Solar Cells
    SOLAR CELLS Chapter 7. Thin-Film Silicon Solar Cells Chapter 7. THIN-FILM SILICON SOLAR CELLS 7.1 Introduction The simplest semiconductor junction that is used in solar cells for separating photo- generated charge carriers is the p-n junction, an interface between the p-type region and n- type region of one semiconductor. Therefore, the basic semiconductor property of a material, the possibility to vary its conductivity by doping, has to be demonstrated first before the material can be considered as a suitable candidate for solar cells. This was the case for amorphous silicon. The first amorphous silicon layers were reported in 1965 as films of "silicon from silane" deposited in a radio frequency glow discharge1. Nevertheless, it took more ten years until Spear and LeComber, scientists from Dundee University, demonstrated that amorphous silicon had semiconducting properties by showing that amorphous silicon could be doped n- type and p-type by adding phosphine or diborane to the glow discharge gas mixture, respectively2. This was a far-reaching discovery since until that time it had been generally thought that amorphous silicon could not be doped. At that time it was not recognised immediately that hydrogen played an important role in the newly made amorphous silicon doped films. In fact, amorphous silicon suitable for electronic applications, where doping is required, is an alloy of silicon and hydrogen. The electronic-grade amorphous silicon is therefore called hydrogenated amorphous silicon (a-Si:H). 1 H.F. Sterling and R.C.G. Swann, Solid-State Electron. 8 (1965) p. 653-654. 2 W. Spear and P.
    [Show full text]
  • TFT Technology: Advancements and Opportunities for Improvement
    FRONTLINE TECHNOLOGY TFT Technology: Advancements and Opportunities for Improvement For fat-panel display backplane applications, oxide TFT technology has transitioned from a disruptive challenger to a maturing com- petitor with respect to a-Si:H and LTPS. Here, we explore the most recent developments and the best options among the offerings. by John F. Wager COMMERCIAL FLAT-PANEL DISPLAY BACKPLANE OPTIONS that a smaller TFT can be used. A smaller TFT has less parasitc are currently limited to three thin-flm transistor (TFT) tech- capacitance, which further improves switching speed and also nologies: hydrogenated amorphous silicon (a-Si:H), low-tem- reduces power consumpton. It also leads to a higher aperture perature polysilicon (LTPS), and oxide.¹,² As Table 1 indicates, rato in an LCD display, thus reducing backlight power consump- each technology brings a trade-of. From the perspectve of ton. The higher on current of LTPS allows for peripheral circuit this simple blue thumbs-up (good), red thumbs-down (bad), integraton, thereby reducing the need to mount external silicon gray thumbs-sidewise (intermediate) ratng system, oxide TFTs ICs around the display edge for row and column driver functons. appear to come out on top. However, the true story is a bit These consideratons mean that LTPS is an optmal backplane more complicated. choice for small- and medium-sized mobile applicatons that Oxide is listed afer a-Si:H in Table 1, because a-Si:H and require high-resoluton displays. oxide propertes are more strongly correlated than those of Another distnguishing LTPS advantage is the availability of LTPS. This a-Si:H and oxide property correlaton occurs primarily complementary metal-oxide-semiconductor (CMOS) technology because of their common amorphous microstructure, in contra- that employs both n- and p-channel TFTs.
    [Show full text]
  • High-Efficiency Triple-Junction Amorphous Silicon Alloy Photovoltaic Technology
    July 1999 • NREL/SR-520-26648 High-Efficiency Triple-Junction Amorphous Silicon Alloy Photovoltaic Technology Annual Technical Progress Report 6 March 1998 — 5 March 1999 S. Guha United Solar Systems Corp. Troy, Michigan National Renewable Energy Laboratory 1617 Cole Boulevard Golden, Colorado 80401-3393 NREL is a U.S. Department of Energy Laboratory Operated by Midwest Research Institute ••• Battelle ••• Bechtel Contract No. DE-AC36-98-GO10337 July 1999 • NREL/SR-520-26648 High-Efficiency Triple-Junction Amorphous Silicon Alloy Photovoltaic Technology Annual Technical Progress Report 6 March 1998 — 5 March 1999 S. Guha United Solar Systems Corp. Troy, Michigan NREL Technical Monitor: K. Zweibel Prepared under Subcontract No. ZAK-8-17619-09 National Renewable Energy Laboratory 1617 Cole Boulevard Golden, Colorado 80401-3393 NREL is a U.S. Department of Energy Laboratory Operated by Midwest Research Institute ••• Battelle ••• Bechtel Contract No. DE-AC36-98-GO10337 NOTICE This report was prepared as an account of work sponsored by an agency of the United States government. Neither the United States government nor any agency thereof, nor any of their employees, makes any warranty, express or implied, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any information, apparatus, product, or process disclosed, or represents that its use would not infringe privately owned rights. Reference herein to any specific commercial product, process, or service by trade name, trademark, manufacturer, or otherwise does not necessarily constitute or imply its endorsement, recommendation, or favoring by the United States government or any agency thereof. The views and opinions of authors expressed herein do not necessarily state or reflect those of the United States government or any agency thereof.
    [Show full text]
  • Solar Thermophotovoltaics: Reshaping the Solar Spectrum
    Nanophotonics 2016; aop Review Article Open Access Zhiguang Zhou*, Enas Sakr, Yubo Sun, and Peter Bermel Solar thermophotovoltaics: reshaping the solar spectrum DOI: 10.1515/nanoph-2016-0011 quently converted into electron-hole pairs via a low-band Received September 10, 2015; accepted December 15, 2015 gap photovoltaic (PV) medium; these electron-hole pairs Abstract: Recently, there has been increasing interest in are then conducted to the leads to produce a current [1– utilizing solar thermophotovoltaics (STPV) to convert sun- 4]. Originally proposed by Richard Swanson to incorporate light into electricity, given their potential to exceed the a blackbody emitter with a silicon PV diode [5], the basic Shockley–Queisser limit. Encouragingly, there have also system operation is shown in Figure 1. However, there is been several recent demonstrations of improved system- potential for substantial loss at each step of the process, level efficiency as high as 6.2%. In this work, we review particularly in the conversion of heat to electricity. This is because according to Wien’s law, blackbody emission prior work in the field, with particular emphasis on the µm·K role of several key principles in their experimental oper- peaks at wavelengths of 3000 T , for example, at 3 µm ation, performance, and reliability. In particular, for the at 1000 K. Matched against a PV diode with a band edge λ problem of designing selective solar absorbers, we con- wavelength g < 2 µm, the majority of thermal photons sider the trade-off between solar absorption and thermal have too little energy to be harvested, and thus act like par- losses, particularly radiative and convective mechanisms.
    [Show full text]
  • Single and Multi-Junction Thin Film Silicon Solar Cells for Flexible
    Single and multi-junction thin film silicon solar cells for flexible photovoltaics Thèse présentée à la Faculté des Sciences Institut de Microtechnique Université de Neuchâtel Pour l’obtention du grade de docteur ès sciences Par Thomas Söderström Acceptée sur proposition du jury : Prof. C. Ballif, directeur de thèse Dr. F.-J. Haug, rapporteur Dr. V. Terrazzoni-Daudrix, rapporteur Dr. W. Soppe, rapporteur Dr. D. Fischer, rapporteur Prof. H. Stoekli-Evans, rapporteur Soutenue le 20 mars 2009 Université de Neuchâtel 2009 iii Mots clés Cellules solaires en couches minces, silicium amorphe, silicium microcristallin, cellule micromorph tandem, piégeage de la lumière, cracks, substrats flexibles Keywords Solar cells, thin film silicon, amorphous, microcrystalline, micromorph tandem cells, light trapping, cracks, flexible substrates Abstract This thesis investigates amorphous (a-Si:H) and microcrystalline ( µc-Si:H) solar cells deposited by very high frequency plasma enhanced chemical vapor deposition (VHF- PECVD) in the substrate (n-i-p) configuration. It focuses on processes that allow the use of non transparent and flexible substrates such as plastic foil with T g < 180°C like poly- ethylene-naphtalate (PEN). In the first part of the work, we concentrate on the light trapping properties of a variety of device configurations. One original test structure consists of n-i-p solar cells deposited directly on glass covered with low pressure chemical vapor deposition (LP-CVD) ZnO. For this device, silver is deposited below the LP-CVD ZnO or white paint is applied at the back of the glass as back reflector. This avoids the parasitic plasmonic absorptions in the back reflectors, which are observed for conventional rough metallic back contacts.
    [Show full text]
  • AMORPHOUS SILICON SOLAR CELLS OBTAINED by HOT-WIRE CHEMICAL VAPOUR DEPOSITION David Soler I Vilamitjana
    DEPARTAMENT DE FÍSICA APLICADA I ÒPTICA Martí i Franquès 1, 08028 Barcelona AMORPHOUS SILICON SOLAR CELLS OBTAINED BY HOT-WIRE CHEMICAL VAPOUR DEPOSITION David Soler i Vilamitjana Memòria presentada per optar al grau de Doctor Barcelona, setembre de 2004 DEPARTAMENT DE FÍSICA APLICADA I ÒPTICA Martí i Franquès 1, 08028 Barcelona AMORPHOUS SILICON SOLAR CELLS OBTAINED BY HOT-WIRE CHEMICAL VAPOUR DEPOSITION David Soler i Vilamitjana Programa de doctorat: Tècniques Instrumentals de la Física i la Ciència de Materials Bienni: 1998-2000 Tutor: Enric Bertran Serra Director: Jordi Andreu Batallé Memòria presentada per optar al grau de Doctor Barcelona, setembre de 2004 Als meus pares This work has been carried out in the Photovoltaic Group of the Laboratory of Thin Film Materials of the Department of Applied Physics and Optics of the University of Barcelona. The Photovoltaic Group is a member of the Centre de Referència en Materials Avançats per a l’Energia de la Generalitat de Catalunya (CeRMAE). The presented work has been supervised by Dr. Jordi Andreu Batallé in the framework of the projects TIC98-0381-C02-01 and MAT2001-3541-C03-01 of the CICYT of the Spanish Government and with the aid of the project ENK5-CT2001-00552 of the European Commission, and supported by a pre-doctoral grant from the Spanish Government (Beca FPI). Amorphous Silicon Solar Cells obtained by Hot-Wire Chemical Vapour Deposition Contents Agraïments ...........................................................................................................................3 Outline of this thesis ............................................................................................................5 1. Introduction .....................................................................................................................7 1.1. Thin film technologies for photovoltaic applications.........................................7 1.2. Hydrogenated amorphous silicon as a photovoltaic material.............................9 1.3.
    [Show full text]
  • Thin-Film Crystalline Silicon Solar Cells
    Thin-filmThin-film crystallinecrystalline siliconsilicon solarsolar cellscells Kenji YAMAMOTO A photoelectric conversion efficiency of over 10% has been achieved in thin-film 750 polycrystalline silicon solar cells which consists 700 of a 2 µm thick layer of polycrystalline silicon with a very small grain size (microcrystalline 650 (mV) Astropower Mitsubishi silicon) formed by low-temperature plasma oc V 600 CVD. This has shown that if the recombina- ASE/ISFH ISE tion velocity at grain boundaries can be made 550 Kaneka Sanyo Ti Daido very small, then it is not necessarily important Neuchatel 500 3 10 4 to increase the size of the crystal grains, and 10 ETL 105 that an adequate current can be extracted 450 106 S=107cm/s even from a thin film due to the light trap- BP Tonen open circuit voltage 400 ping effect of silicon with a low absorption coefficient. As a result, this technology may 350 10-2 10-1 100 101 102 103 104 eventually lead to the development of low- grain size � ( µ m) cost solar cells. Also, an initial efficiency as high as 12% has been achieved with a tan- Fig. 1: The relationship between grain size and open circuit voltage (V ) in solar cells. dem solar cell module of microcrystalline sili- oc Voc is correlated to the carrier lifetime (diffusion length). In the figure, S indicates the con and amorphous silicon, which has now recombination velocity at the grain boundaries. In this paper, microcrystalline silicon cells correspond to a grain size of 0.1 µm or less. In the figure, Ti, BP, ASE and ISE are abbre- started to be produced commercially.
    [Show full text]
  • Amorphous Silicon Carbide for Photovoltaic Applications
    Amorphous Silicon Carbide for Photovoltaic Applications Dissertation zur Erlangung des akademischen Grades Doktor der Naturwissenschaften (Dr. rer. nat.) an der Universität Konstanz Fakultät für Physik vorgelegt von Stefan Janz geb. in Leoben/Stmk. Fraunhofer Institut für Solare Energiesysteme Freiburg 2006 Referenten: Prof. Dr. Gerhard Willeke Prof. Dr. Elke Scheer Tag der mündl. Prüfung: 8. Dezember 2006 „Der wahre Zweck des Menschen ist die höchste und proportionierlichste Bildung seiner Kräfte zu einem Ganzen.“ Wilhelm v. Humboldt Amorphous Silicon Carbide 5 AMORPHOUS SILICON CARBIDE FOR PHOTOVOLTAIC APPLICATIONS ......... 1 1 AMORPHOUS SILICON CARBIDE ............................................................................. 17 1.1 INTRODUCTION......................................................................................................................17 1.2 AMORPHOUS STRUCTURE OF SIC..........................................................................................18 1.2.1 The tetrahedral network ............................................................................................... 18 1.2.2 Hydrogenated SiC......................................................................................................... 20 1.2.3 Vibrational spectroscopy (Infrared spectra) ................................................................ 21 1.2.4 Silicon and carbon content ........................................................................................... 22 1.3 PLASMA ENHANCED CHEMICAL VAPOUR DEPOSITION (PECVD).........................................23
    [Show full text]
  • Highly Efficient 3Rd Generation Multi-Junction Solar Cells Using Silicon Heterojunction and Perovskite Tandem: Prospective Life Cycle Environmental Impacts
    Article Highly Efficient 3rd Generation Multi-Junction Solar Cells Using Silicon Heterojunction and Perovskite Tandem: Prospective Life Cycle Environmental Impacts René Itten * and Matthias Stucki Institute of Natural Resource Sciences, Zurich University of Applied Sciences, 8820 Wädenswil, Switzerland; [email protected] * Correspondence: rene.itten @zhaw.ch; Tel.: +41-58-934-52-32 Academic Editor: Jean-Michel Nunzi Received: 31 May 2017; Accepted: 14 June 2017; Published: 23 June 2017 Abstract: In this study, the environmental impacts of monolithic silicon heterojunction organometallic perovskite tandem cells (SHJ-PSC) and single junction organometallic perovskite solar cells (PSC) are compared with the impacts of crystalline silicon based solar cells using a prospective life cycle assessment with a time horizon of 2025. This approach provides a result range depending on key parameters like efficiency, wafer thickness, kerf loss, lifetime, and degradation, which are appropriate for the comparison of these different solar cell types with different maturity levels. The life cycle environmental impacts of SHJ-PSC and PSC solar cells are similar or lower compared to conventional crystalline silicon solar cells, given comparable lifetimes, with the exception of mineral and fossil resource depletion. A PSC single-junction cell with 20% efficiency has to exceed a lifetime of 24 years with less than 3% degradation per year in order to be competitive with the crystalline silicon single-junction cells. If the installed PV capacity has to be maximised with only limited surface area available, the SHJ-PSC tandem is preferable to the PSC single-junction because their environmental impacts are similar, but the surface area requirement of SHJ-PSC tandems is only 70% or lower compared to PSC single-junction cells.
    [Show full text]
  • The Future of Amorphous Silicon Photovoltaic Technology
    NREL(fP-411-8019 • UC Category: 1262 • DE95009235 The Future of rphous Silicon Photovoltaic Tech logy R. Crandall, W. Luft Submitted to Progress in Photovoltaics National Renewable Energy Laboratory 1617 Cole Boulevard Golden, Colorado 80401-3393 A national laboratory of the U.S. Department of Energy Managed by Midwest Research Institute for the U.S. Department of Energy under contract No. DE-AC36-83CH10093 Prepared under Task No. PV531101 June 1995 NOTICE This report was prepared as an account of work sponsored by an agency of the United States government. Neither the United States government nor any agency thereof, nor any of their employees, makes any warranty, express or implied, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any information, apparatus, product, or process disclosed, or represents that its use would not infringe privately owned rights. Reference herein to any specific commercial product, process, or service by trade name, trademark, manufacturer, or otherwise does not necessarily constitute or imply its endorsement, recommendation, or favoring by the United States government or any agency thereof. The views and opinions of authors expressed herein do not necessarily state or reflect those of the United States government or any agency thereof. Available to DOE and DOE contractors from: Office of Scientific and Technical Information (OSTI) P.O. Box 62 Oak Ridge, TN 37831 Prices available by calling (615) 576-8401 Available to the public from: National Technical Information Service (NTIS) U.S. Department of Commerce 5285 Port Royal Road Springfield, VA 22161 (703) 487-4650 #. �: Printed on paper containing at least 50% wastepaper, including 10% postconsumer waste THE FUTURE OF AMORPHOUS SILICON PHOTOVOLTAIC TECHNOLOGY R.
    [Show full text]
  • Crystalline and Polycrystalline Silicon PV Technology
    Crystalline and Polycrystalline Silicon PV Technology • Crystalline silicon PV cells are used in the largest quantity of all types of panels on the market, representing about 90% of the world total PV cell production in 2008. • The highest energy conversion efficiency reported so far for research crystalline silicon PV cells is 25%. • Standard industrial cells are limited to 15–18% with the exception of certain high‐ efficiency cells capable of efficiencies greater than 20%. • High‐efficiency research PV cells have advantages in performance but are often unsuitable for low‐cost production due to their complex structures and the lengthy manufacturing processes required for fabrication. • World annual production of PV cells reached more than 7.9 GWp in 2008 (10.6 GWp in 2009), and the average annual growth rate in PV cell production over the last decade has been more than 40%. • Yet the electrical power generated by all PV systems around the world is less than 0.1% of the total world electricity generation T. Saga, NPG Asia Mater. 2(3) 96–102 (2010) Typical mono‐ and polycrystalline silicon solar cells (upper), and simplified cross‐ section of a commercial monocrystalline silicon solar cell (lower) (© 2010 Sharp). T. Saga, NPG Asia Mater. 2(3) 96–102 (2010) Production of “Standard” Silicon PV Cells Standard cells are produced using one monocrystalline and polycrystalline boron‐doped p‐type silicon substrates. Cells are typically 125 mm (5 inches) or 156 mm (6 inches) square, respectively. Monocrystalline solar cells are produced from pseudo‐square silicon wafer substrates cut from column ingots grown by the Czochralski (CZ) process.
    [Show full text]