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TFT Technology: Advancements and Opportunities for Improvement FRONTLINE TECHNOLOGY TFT Technology: Advancements and Opportunities for Improvement For fat-panel display backplane applications, oxide TFT technology has transitioned from a disruptive challenger to a maturing com- petitor with respect to a-Si:H and LTPS. Here, we explore the most recent developments and the best options among the offerings. by John F. Wager COMMERCIAL FLAT-PANEL DISPLAY BACKPLANE OPTIONS that a smaller TFT can be used. A smaller TFT has less parasitc are currently limited to three thin-flm transistor (TFT) tech- capacitance, which further improves switching speed and also nologies: hydrogenated amorphous silicon (a-Si:H), low-tem- reduces power consumpton. It also leads to a higher aperture perature polysilicon (LTPS), and oxide.¹,² As Table 1 indicates, rato in an LCD display, thus reducing backlight power consump- each technology brings a trade-of. From the perspectve of ton. The higher on current of LTPS allows for peripheral circuit this simple blue thumbs-up (good), red thumbs-down (bad), integraton, thereby reducing the need to mount external silicon gray thumbs-sidewise (intermediate) ratng system, oxide TFTs ICs around the display edge for row and column driver functons. appear to come out on top. However, the true story is a bit These consideratons mean that LTPS is an optmal backplane more complicated. choice for small- and medium-sized mobile applicatons that Oxide is listed afer a-Si:H in Table 1, because a-Si:H and require high-resoluton displays. oxide propertes are more strongly correlated than those of Another distnguishing LTPS advantage is the availability of LTPS. This a-Si:H and oxide property correlaton occurs primarily complementary metal-oxide-semiconductor (CMOS) technology because of their common amorphous microstructure, in contra- that employs both n- and p-channel TFTs. To date, I would argue distncton to the polycrystalline microstructure of LTPS. Having an amorphous microstructure leads to lower cost and the ability PROPERTY a-SI:H* OXIDE LTPS to scale to larger-sized glass substrates, namely Generaton (Gen) 8+. Lower cost and ability to scale are the two essen- Cost tal advantages that make the case for choosing an a-Si:H or Scalability oxide backplane. But why choose LTPS if On current it’s costly and doesn’t scale? Table 1. Off current On-current performance is Backplane technology CMOS almost always the reason. A comparison. All fgures are higher on current leads to courtesy of the author unless * Here, a-Si:H = amorphous silicon; CMOS = complementary met- faster switching and means otherwise noted. al-oxide-semiconductor; and LTPS = low-temperature polysilicon. informationdisplay.org | 2020 March/April 9 FRONTLINE TECHNOLOGY Fig. 1. Still image from an animation video highlighting attributes of Corning Astra Glass, a new product developed for oxide thin-flm transistor (TFT) ap- plications. can be orders of magnitude smaller than that of an a-Si:H or LTPS TFT. This translates into reduced power dissipa- ton for oxide TFT technology. SIZE MATTERS How does one decide between that CMOS is not the fat-panel display backplane game-changer the three fat-panel display backplane optons? The a-Si:H tech- that it was for silicon-integrated circuit technology. Rather, the nology is mature, predictable, and available. If your applicaton is availability of CMOS means that a designer can choose to use not too demanding and cost is a critcal consideraton, choose an n-channel metal oxide semiconductor (NMOS), p-channel a-Si:H. Thus, selectng oxide or LTPS usually means that a-Si:H is (PMOS), or both n-and p-channel (CMOS) TFTs. For example, inadequate in terms of performance for your applicaton. PMOS appears to be preferred in LTPS OLED mobile applica- Selectng between oxide and LTPS boils down to a glass size tons, because of its top-emission architecture compatbility, consideraton. As noted in Table 1, oxide technology readily beter bias stress stability (compared to NMOS), and simpler scales to large glass substrate sizes, Gen 8+. Thus, oxide TFTs process complexity (two less masks than CMOS).³ dominate large-area applicatons such as OLED TVs in which Careful assessment of Table 1 reveals that oxide technology a-Si:H can’t deliver the required performance. Large-area scaling has one important distnguishing advantage compared to a-Si:H is a tremendous advantage of oxide TFT technology, because and LTPS: a low of current. Oxide TFTs employ amorphous moving to a larger glass substrate size is the most straightor- indium gallium zinc oxide (a-IGZO) and other types of amor- ward approach for reducing cost. phous oxide semiconductors as channel layers. These oxides are Corning’s announcement of Corning Astra Glass (Fig. 1) is an unipolar, supportng electron transport, but not hole transport. excitng recent development for oxide TFT technology, because In contrast, a-Si:H and LTPS are bipolar semiconductors, accom- it’s targeted specifcally at the oxide TFT market. The 725 °C modatng both electron and hole transport. strain point of Corning Astra Glass is intermediate to that of When atemptng to turn a bipolar semiconductor of by Corning EAGLE XG Glass (669 °C) and Corning Lotus NXT applying a depletng gate bias, current frst decreases with Glass (752 °C), primarily servicing a-Si:H and LTPS technolo- the depleton of majority carriers, but then grows as the result gies, respectvely. Glass substrate availability is a key consid- of an increasing density of minority carriers. This means that eraton when scaling beyond Gen 10 dimensions, given the the of current in a TFT fabricated using a bipolar semicon- trend toward colocaton of glass substrate and fat-panel display ductor such as a-Si:H or LTPS can never be as small as the of manufacturing facilites.⁴ In a Gen 10+ fabricaton plant (fab), current obtained when a-IGZO or a similar amorphous oxide the glass size is so large that shipping glass substrates from a semiconductor is used. It turns out that oxide TFT of current remote glass manufacturing plant is no longer practcal. Because excimer laser annealing and ion implantaton are required for LTPS manufacturing, scaling LTPS beyond Gen 6 tends to be challenging and expensive. Thus, the sweet spot for LTPS applicatons is small- or medium-area high-performance applicatons such as cellphones. However, the inability to readily scale to a large glass substrate size is a serious liability, because it takes away the most direct path toward future cost reducton. Furthermore, the need for nonmainstream and hard-to-scale Fig. 2. Generation (Gen) 4.5 semi-dynamic physical vapor deposition (PVD) cluster tool for oxide TFT manufacturing. This system features a rotary array deposition source and horizontal substrate movement for improved uniformity. Inc.Corning, of Courtesy 1: Figure 10 March/April 2020 | informationdisplay.org QUICK TAKE SECTION SLUG Oxide TFTs dominate large-area applications such as OLED TVs in which a-Si:H processes such as excimer laser annealing and ion implantaton TFT channel layer can’t deliver the required per- in LTPS fabricaton means that the LTPS process fow distnctly required? The formance. Large-area scaling is a difers from that of a-Si:H. In contrast, oxide and a-Si:H manufac- easy answer is that turing processes are quite similar, so that upgrading an existng TFT performance tremendous advantage of oxide fab from a-Si:H to oxide is likely to be a straightorward and demands it in TFT technology because moving sometmes atractve opton. terms of obtaining to a larger glass substrate optimal electron size is the most straight- mobility, subthresh- forward approach for old slope, turn-on volt- reducing cost. UNDERSTANDING OXIDE TFT TRENDS age, and device stability. Table 2 lists manufacturing facilites and insttutons that ofer The scientfc answer to this foundry and/or developmental services for oxide TFTs. It is evident queston is more difcult to ascertain that oxide TFT manufacturing capability contnues its rapid ramp and is open to debate. I suspect that annealing helps to heal up. Almost all of the actvity under constructon or ramping up sputer-induced damage of the as-deposited flm, and that the (green) and planned (red) is directed toward large Gen 8+ fabs. oxidizing ambient minimizes the oxygen vacancy concentraton. Most reports are vague regarding how much of a facility’s capa- Additonally, post-depositon annealing usually increases bility is to be devoted to oxides, which makes it difcult to specify the oxide thin flm’s density (from perhaps 93 to 96 percent). total oxide TFT manufacturing capability. It is encouraging to see Obtaining a fully-dense channel layer is a key aspect of foundry and developmental service availability; this indicates that optmizing oxide TFT performance and stability. As an aside, oxide TFT technology is beginning to mature. the density of a soluton-processed thin flm is typically less Fig. 2 illustrates an example of the new manufacturing than 90 percent (and ofen less than 80 percent), presentng tools being developed to support oxide TFT technology. This a serious challenge that’s likely to preclude commercializaton semi-dynamic physical vapor depositon (PVD) cluster tool is of such flms for many electronic applicatons. targeted for Gen 4.5 applicatons. It’s suitable for R&D actvites Fig. 3 pertains to recent state-of-the-art oxide TFT device constrained to a small footprint, and yet it’s scalable to Gen 6 glass substrate sizes, as required for the support of mobile MANUFACTURING FACILITY FAB SIZE applicatons. Its semi-dynamic platorm provides mura-free oxide flms, based on a proven rotary PVD architecture. Addi- BOE (B17)—Wuhan, China (a-Si:H TFT/oxide + WOLED*) Gen 10.5 tonally, the PVD tool design strategy employed makes it easy China Star (T7)—Shenzhen, China Gen 10.5 to control plasma igniton and the nature of ion bombardment (a-Si:H TFT/oxide + WOLED) for the realizaton of low-defect, high-quality thin flms.
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