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CFPRM, Coldfire ® Family Programmer™S ColdFire® Family Programmer’s Reference Manual Document Number: CFPRM Rev. 3 03/2005 How to Reach Us: Home Page: www.freescale.com E-mail: [email protected] USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 Information in this document is provided solely to enable system and +1-800-521-6274 or +1-480-768-2130 software implementers to use Freescale Semiconductor products. There are [email protected] no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the Europe, Middle East, and Africa: information in this document. Freescale Halbleiter Deutschland GmbH Technical Information Center Freescale Semiconductor reserves the right to make changes without further Schatzbogen 7 notice to any products herein. Freescale Semiconductor makes no warranty, 81829 Muenchen, Germany representation or guarantee regarding the suitability of its products for any +44 1296 380 456 (English) particular purpose, nor does Freescale Semiconductor assume any liability +46 8 52200080 (English) arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or +49 89 92103 559 (German) incidental damages. “Typical” parameters that may be provided in Freescale +33 1 69 35 48 48 (French) Semiconductor data sheets and/or specifications can and do vary in different [email protected] applications and actual performance may vary over time. All operating parameters, including “Typicals”, must be validated for each customer Japan: application by customer’s technical experts. Freescale Semiconductor does Freescale Semiconductor Japan Ltd. not convey any license under its patent rights nor the rights of others. Headquarters Freescale Semiconductor products are not designed, intended, or authorized ARCO Tower 15F for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other 1-8-1, Shimo-Meguro, Meguro-ku, application in which the failure of the Freescale Semiconductor product could Tokyo 153-0064, Japan create a situation where personal injury or death may occur. Should Buyer 0120 191014 or +81 3 5437 9125 purchase or use Freescale Semiconductor products for any such unintended [email protected] or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and Asia/Pacific: distributors harmless against all claims, costs, damages, and expenses, and Freescale Semiconductor Hong Kong Ltd. reasonable attorney fees arising out of, directly or indirectly, any claim of Technical Information Center personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent 2 Dai King Street regarding the design or manufacture of the part. Tai Po Industrial Estate Tai Po, N.T., Hong Kong +800 2666 8080 [email protected] For Literature Requests Only: Freescale Semiconductor Literature Distribution Center Freescale™ and the Freescale logo are trademarks of Freescale P.O. Box 5405 Semiconductor, Inc. All other product or service names are the property Denver, Colorado 80217 of their respective owners.© Freescale Semiconductor, Inc. 2004. All rights 1-800-441-2447 or 303-675-2140 reserved. Fax: 303-675-2150 [email protected] Document Number: CFPRM Rev. 3 03/2005 Introduction 1 Addressing Capabilities 2 Instruction Set Summary 3 Integer User Instructions 4 MAC User Instructions 5 EMAC User Instructions 6 FPU User Instructions 7 Supervisor Instructions 8 Instruction Format Summary 9 PST/DDATA Encodings 10 Exception Processing 11 S-Record Output Format A Index IND 1 Introduction 2 Addressing Capabilities 3 Instruction Set Summary 4 Integer User Instructions 5 MAC User Instructions 6 EMAC User Instructions 7 FPU User Instructions 8 Supervisor Instructions 9 Instruction Format Summary 10 PST/DDATA Encodings 11 Exception Processing A S-Record Output Format IND Index Contents Page Paragraph Title Number Number Chapter 1 Introduction 1.1 Integer Unit User Programming Model .......................................................................... 1-2 1.1.1 Data Registers (D0–D7) .............................................................................................. 1-2 1.1.2 Address Registers (A0–A7) ........................................................................................ 1-2 1.1.3 Program Counter (PC) ................................................................................................ 1-2 1.1.4 Condition Code Register (CCR) ................................................................................. 1-2 1.2 Floating-Point Unit User Programming Model .............................................................. 1-3 1.2.1 Floating-Point Data Registers (FP0–FP7) .................................................................. 1-4 1.2.1.1 Floating-Point Control Register (FPCR) ................................................................ 1-4 1.2.2 Floating-Point Status Register (FPSR) ....................................................................... 1-5 1.2.3 Floating-Point Instruction Address Register (FPIAR) ................................................ 1-6 1.3 MAC User Programming Model .................................................................................... 1-6 1.3.1 MAC Status Register (MACSR) ................................................................................. 1-7 1.3.2 MAC Accumulator (ACC) .......................................................................................... 1-7 1.3.3 MAC Mask Register (MASK) .................................................................................... 1-7 1.4 EMAC User Programming Model .................................................................................. 1-8 1.4.1 MAC Status Register (MACSR) ................................................................................. 1-8 1.4.2 MAC Accumulators (ACC[0:3]) ................................................................................ 1-9 1.4.3 Accumulator Extensions (ACCext01, ACCext23) ................................................... 1-10 1.4.4 MAC Mask Register (MASK) .................................................................................. 1-10 1.5 Supervisor Programming Model ................................................................................... 1-11 1.5.1 Status Register (SR) .................................................................................................. 1-12 1.5.2 Supervisor/User Stack Pointers (A7 and OTHER_A7) ............................................ 1-13 1.5.3 Vector Base Register (VBR) ..................................................................................... 1-13 1.5.4 Cache Control Register (CACR) .............................................................................. 1-13 1.5.5 Address Space Identifier (ASID) .............................................................................. 1-13 1.5.6 Access Control Registers (ACR0–ACR3) ................................................................ 1-14 1.5.7 MMU Base Address Register (MMUBAR) ............................................................. 1-14 1.5.8 RAM Base Address Registers (RAMBAR0/RAMBAR1) ....................................... 1-14 1.5.9 ROM Base Address Registers (ROMBAR0/ROMBAR1) ....................................... 1-14 1.5.10 Module Base Address Register (MBAR) ................................................................. 1-15 1.6 Integer Data Formats .................................................................................................... 1-15 1.7 Floating-Point Data Formats ......................................................................................... 1-16 1.7.1 Floating-Point Data Types ........................................................................................ 1-16 1.7.1.1 Normalized Numbers ............................................................................................ 1-16 1.7.1.2 Zeros ..................................................................................................................... 1-16 1.7.1.3 Infinities ................................................................................................................ 1-16 ColdFire Family Programmer’s Reference Manual, Rev. 3 Freescale Semiconductor iii Contents Page Paragraph Title Number Number 1.7.1.4 Not-A-Number ...................................................................................................... 1-17 1.7.1.5 Denormalized Numbers ........................................................................................ 1-17 1.7.2 FPU Data Format and Type Summary ..................................................................... 1-17 1.8 Multiply Accumulate Data Formats ............................................................................. 1-19 1.9 Organization of Data in Registers ................................................................................. 1-19 1.9.1 Organization of Integer Data Formats in Registers .................................................. 1-19 1.9.2 Organization of Integer Data Formats in Memory ................................................... 1-20 1.10 Hardware Configuration
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