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Fax: 303-675-2150 [email protected] Document Number: CFPRM Rev. 3 03/2005 Introduction 1 Addressing Capabilities 2 Instruction Set Summary 3 Integer User Instructions 4 MAC User Instructions 5 EMAC User Instructions 6 FPU User Instructions 7 Supervisor Instructions 8 Instruction Format Summary 9 PST/DDATA Encodings 10 Exception Processing 11 S-Record Output Format A Index IND 1 Introduction 2 Addressing Capabilities 3 Instruction Set Summary 4 Integer User Instructions 5 MAC User Instructions 6 EMAC User Instructions 7 FPU User Instructions 8 Supervisor Instructions 9 Instruction Format Summary 10 PST/DDATA Encodings 11 Exception Processing A S-Record Output Format IND Index Contents Page Paragraph Title Number Number Chapter 1 Introduction 1.1 Integer Unit User Programming Model .......................................................................... 1-2 1.1.1 Data Registers (D0–D7) .............................................................................................. 1-2 1.1.2 Address Registers (A0–A7) ........................................................................................ 1-2 1.1.3 Program Counter (PC) ................................................................................................ 1-2 1.1.4 Condition Code Register (CCR) ................................................................................. 1-2 1.2 Floating-Point Unit User Programming Model .............................................................. 1-3 1.2.1 Floating-Point Data Registers (FP0–FP7) .................................................................. 1-4 1.2.1.1 Floating-Point Control Register (FPCR) ................................................................ 1-4 1.2.2 Floating-Point Status Register (FPSR) ....................................................................... 1-5 1.2.3 Floating-Point Instruction Address Register (FPIAR) ................................................ 1-6 1.3 MAC User Programming Model .................................................................................... 1-6 1.3.1 MAC Status Register (MACSR) ................................................................................. 1-7 1.3.2 MAC Accumulator (ACC) .......................................................................................... 1-7 1.3.3 MAC Mask Register (MASK) .................................................................................... 1-7 1.4 EMAC User Programming Model .................................................................................. 1-8 1.4.1 MAC Status Register (MACSR) ................................................................................. 1-8 1.4.2 MAC Accumulators (ACC[0:3]) ................................................................................ 1-9 1.4.3 Accumulator Extensions (ACCext01, ACCext23) ................................................... 1-10 1.4.4 MAC Mask Register (MASK) .................................................................................. 1-10 1.5 Supervisor Programming Model ................................................................................... 1-11 1.5.1 Status Register (SR) .................................................................................................. 1-12 1.5.2 Supervisor/User Stack Pointers (A7 and OTHER_A7) ............................................ 1-13 1.5.3 Vector Base Register (VBR) ..................................................................................... 1-13 1.5.4 Cache Control Register (CACR) .............................................................................. 1-13 1.5.5 Address Space Identifier (ASID) .............................................................................. 1-13 1.5.6 Access Control Registers (ACR0–ACR3) ................................................................ 1-14 1.5.7 MMU Base Address Register (MMUBAR) ............................................................. 1-14 1.5.8 RAM Base Address Registers (RAMBAR0/RAMBAR1) ....................................... 1-14 1.5.9 ROM Base Address Registers (ROMBAR0/ROMBAR1) ....................................... 1-14 1.5.10 Module Base Address Register (MBAR) ................................................................. 1-15 1.6 Integer Data Formats .................................................................................................... 1-15 1.7 Floating-Point Data Formats ......................................................................................... 1-16 1.7.1 Floating-Point Data Types ........................................................................................ 1-16 1.7.1.1 Normalized Numbers ............................................................................................ 1-16 1.7.1.2 Zeros ..................................................................................................................... 1-16 1.7.1.3 Infinities ................................................................................................................ 1-16 ColdFire Family Programmer’s Reference Manual, Rev. 3 Freescale Semiconductor iii Contents Page Paragraph Title Number Number 1.7.1.4 Not-A-Number ...................................................................................................... 1-17 1.7.1.5 Denormalized Numbers ........................................................................................ 1-17 1.7.2 FPU Data Format and Type Summary ..................................................................... 1-17 1.8 Multiply Accumulate Data Formats ............................................................................. 1-19 1.9 Organization of Data in Registers ................................................................................. 1-19 1.9.1 Organization of Integer Data Formats in Registers .................................................. 1-19 1.9.2 Organization of Integer Data Formats in Memory ................................................... 1-20 1.10 Hardware Configuration