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(52) Cont~Ol Data
C) (52) CONT~OL DATA literature and Distribution Services ~~.) 308 North Dale Street I st. Paul. Minnesota 55103 rJ 1 August 29, 1983 "r--"-....." (I ~ __ ,I Dear Customer: Attached is the third (3) catalog supplement since the 1938 catalog was published . .. .·Af ~ ~>J if-?/t~--62--- G. F. Moore, Manager Literature & Distribution Services ,~-" l)""... ...... I _._---------_._----_._----_._-------- - _......... __ ._.- - LOS CATALOG SUPPLEPtENT -- AUGUST 1988 Pub No. Rev [Page] TITLE' [ extracted from catalog entry] Bind Price + = New Publication r = Revision - = Obsolete r 15190060 [4-07] FULL SCREEN EDITOR (FSEDIT) RM (NOS 1 & 2) .......•...•.•...•••........... 12.00 r 15190118 K [4-07] NETWORK JOB ENTRY FACILITY (NJEF) IH8 (NOS 2) ........................... 5.00 r 15190129 F [4-07] NETWORK JOB ENTRY FACILITY (NJEF) RM (NOS 2) .........•.......•........... + 15190150 C [4-07] NETWORK TRANSFER FACILITY (NTF) USAGE (NOS/VE) .......................... 15.00 r 15190762 [4-07] TIELINE/NP V2 IHB (L642) (NOS 2) ........................................ 12.00 r 20489200 o [4-29] WREN II HALF-HEIGHT 5-114" DISK DRIVE ................................... + 20493400 [4-20] CDCNET DEVICE INTERFACE UNITS ........................................... + 20493600 [4-20] CDCNET ETHERNET EQUIPMENT ............................................... r 20523200 B [4-14] COMPUTER MAINTENANCE SERVICES - DEC ..................................... r 20535300 A [4-29] WREN II 5-1/4" RLL CERTIFIED ............................................ r 20537300 A [4-18] SOFTWARE -
VALIDATED PRODUCTS LIST 1992 No.2
NISTIR 4820 (Supersedes NISTIR 4739) VALIDATED PRODUCTS LIST 1992 No. 2 Programming Languages Database Language SQL Graphics GOSIP POSIX Security Judy B. Kailey U.S. DEPARTMENT OF COMMERCE Technology Administration National Institute of Standards and Technoiogy Computer Systems Laboratory Software Standards Validation Group Gaithersburg, MD 20899 “QC — TOO .U56 4820 NIST 1992 N I STIR 482 (Supersedes NISTIR 4739) ' O VALIDATED PRODUCTS LIST 1992 No.2 Programming Languages Database Language SQL Graphics GOSIP POSiX Security Judy B. Kailey U.S. DEPARTMENT OF COMMERCE Technology Administration National Institute of Standards and Technology Computer Systems Laboratory Software Standards Validation Group Gaithersburg, MD 20899 April 1992 (Supersedes January 1992 Issue) U.S. DEPARTMENT OF COMMERCE Barbara Hackman Franklin, Secretary TECHNOLOGY ADMINISTRATION Robert M. White, Linder Secretary for Technology NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY John W. Lyons, Director FOREWORD The Validated Products List (formerly called the Validated Processor List) is a collection of registers describing implementations of Federal Information Processing Standards (FTPS) that have been validated for conformance to FTPS. The Validated Products List also contains information about the organizations, test methods and procedures that support the validation programs for the FTPS identified in this document. The Validated Products List is updated quarterly. lii ' " M'- v^,.^.:v;/i'fr•i•:‘fey^^?4 .•:, .V.' ini‘,r^f' isfc'^feV VihV'’, !iV.V I t: 4 #> vm- 'at' Mil! .M'? Of'S8r'»'' SIVS 'V-tv. ','V ..(Vi feiii yA ' r' ' '4: ,. = r,: 0 r^'-' ".V.^l , ;‘ • » JjTT ;»»!£ ... •':«5(4i ' |i“' T" •.(''’'ia\.':l'"' f*l, r-’i"' i'-" '.:"::'.".vi ';... '('?. .;r'H vl. '' ' " .. i.” -' f-j'" , '' '(^ • '.v;.» . -
Programming Languages, Database Language SQL, Graphics, GOSIP
b fl ^ b 2 5 I AH1Q3 NISTIR 4951 (Supersedes NISTIR 4871) VALIDATED PRODUCTS LIST 1992 No. 4 PROGRAMMING LANGUAGES DATABASE LANGUAGE SQL GRAPHICS Judy B. Kailey GOSIP Editor POSIX COMPUTER SECURITY U.S. DEPARTMENT OF COMMERCE Technology Administration National Institute of Standards and Technology Computer Systems Laboratory Software Standards Validation Group Gaithersburg, MD 20899 100 . U56 4951 1992 NIST (Supersedes NISTIR 4871) VALIDATED PRODUCTS LIST 1992 No. 4 PROGRAMMING LANGUAGES DATABASE LANGUAGE SQL GRAPHICS Judy B. Kailey GOSIP Editor POSIX COMPUTER SECURITY U.S. DEPARTMENT OF COMMERCE Technology Administration National Institute of Standards and Technology Computer Systems Laboratory Software Standards Validation Group Gaithersburg, MD 20899 October 1992 (Supersedes July 1992 issue) U.S. DEPARTMENT OF COMMERCE Barbara Hackman Franklin, Secretary TECHNOLOGY ADMINISTRATION Robert M. White, Under Secretary for Technology NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY John W. Lyons, Director - ;,’; '^'i -; _ ^ '’>.£. ; '':k ' ' • ; <tr-f'' "i>: •v'k' I m''M - i*i^ a,)»# ' :,• 4 ie®®;'’’,' ;SJ' v: . I 'i^’i i 'OS -.! FOREWORD The Validated Products List is a collection of registers describing implementations of Federal Information Processing Standards (FTPS) that have been validated for conformance to FTPS. The Validated Products List also contains information about the organizations, test methods and procedures that support the validation programs for the FTPS identified in this document. The Validated Products List is updated quarterly. iii ' ;r,<R^v a;-' i-'r^ . /' ^'^uffoo'*^ ''vCJIt<*bjteV sdT : Jr /' i^iL'.JO 'j,-/5l ':. ;urj ->i: • ' *?> ^r:nT^^'Ad JlSid Uawfoof^ fa«Di)itbiI»V ,, ‘ isbt^u ri il .r^^iytsrH n 'V TABLE OF CONTENTS 1. -
High Performance Computing for Science
Index Algorithms: 8, 15, 21, 24 Design, high-performance computers: 21 Applications programs: 8 Digital libraries and archives: 8 ARPANET: 5, 10 Digital libraries, Global Digital Library: 8 Artificial intelligence: 8, 26 Education: 8, 10, 13 Bardon/Curtis Report: 9 EDUCOM, Networking and Telecommunications Bibliographic services: 10 Task Force: 10 Black hole: 5, 6 Electronic Bulletin boards: 4, 6, 10, 11, 12 information technologies: 4, 5, 6 Journals: 6 California Institute of Technology: 29 mail: 6, 10, 12 Central processing units (CPU): 22,24, 30 Executive Office of the President: 11 Committee on Science, Engineering, and Public Policy (COSEPUP): 9 Federal Coordinating Council for Science, Engineering, Computational science: 21, 22 and Technology (FCCSET): 1, 3 Computer Federal Government Alliant: 6 budget and funding: 12, 17, 18, 19, 20, 22 Apple Macintosh: 31 funding, individual research: 12, 19 connection machines: 31 policy: 12, 16, 20, 23, 26 Control Data ETA: 22 procurement regulations: 16 Control Data 6600: 26 research and development (R&D): 3, 4, 5, 8, 11, 15, 16, Cray 1: 31 17, 18, 24,25, 26, 32 Cray X-MP computer: 7, 19 responsibilities, 11, 13, 15 data flow processors: 31 FederaI High Performance Computing and Communications design: 22, 28, 29, 30, 32 Program (HPCC): 2, 18 fuzzy logic: 31 Fifth Generation Project: 2 hypercube: 29, 31 Floating point operations (FLOPS): 31 IBM Stretch: 27 Florida State University (FSU): 7, 18 IBM 3090: 30 Fluid flow: 6 IBM 3090 computer: 6 IBM 360: 27 Gallium Arsenide: 28-29 manufacture: 22 -
Frontiers of Supercomputing
by B. L. Buzbee, N. Metropolis, and D. H. Sharp scientists two years to do may be reduced to needed for rapid progress. two months of effort. When this happens. Before presenting highlights of the con- practice in many fields of science and tech- ference we will review in more depth the nology will be revolutionized. importance of supercomputing and the These radical changes would also have a trends in computer performance that form needs. Electronic computers were developed, large and rapid impact on the nation’s econ- the background for the conference dis- in fact, during and after World War 11 to omy and security. The skill and effectiveness cussions. meet the need for numerical simulation in the with which supercomputers can be used to design of nuclear weapons, aircraft, and design new and more economical civilian The Importance of Supercomputers conventional ordnance. Today. the avail- aircraft will determine whether there is em.. ability of supercomputers ten thousand times ployrnent in Seattle or in a foreign city. The term “supercomputer” refers to the faster than the first electronic devices is Computer-aided design of automobiles is most powerful scientific computer available having a profound impact on all branches of already playing an important role in De- at a given time. The power of a computer is science and engineering—from astrophysics troit’s effort to recapture its position in the measured by its speed, storage capacity to elementary particle physics. from fusion automobile market. The speed and accuracy (memory). and precision. Today’s com- energy research to automobile design. -
VHSIC and ETA10
VHSIC and The First CMOS and Only Cryogenically Cooled Super Computer David Bondurant Former Honeywell Solid State Electronics Division VHSIC System Applications Manager ETA10 Supercomputer at MET Office - UK’s National Weather Forecasting Service Sources • “Very High Speed Integrated Circuits (VHSIC) Final Program Report 1980-1990, VHSIC Program Office”, Office of the Under Secretary of Defense for Acquisition, Deputy Director, Defense Research and Engineering for Research and Advanced Technology, September 30, 1990 • Carlson, Sullivan, Bach, and Resnick, “The ETA10 Liquid-Nitrogen-Cooled Supercomputer System”, IEEE Transactions on Electron Devices, Vol. 36, No. 8, August 1989. • Cummings and Chase, “High Density Packaging for Supercomputers” • Tony Vacca, “First Hand: The First CMOS And The Only Cryogenically Cooled Supercomputer”, ethw.org • Robert Peglar, “The ETA Era or How to (Mis-)Manage a Company According to Control Data Corp.”, April 17, 1990 Background • I graduated from Missouri S&T in May 1971 • My first job was at Control Data Corporation, the leading Supercomputer Company • I worked in Memory Development • CDC 7600 was in production, 8600 (Cray 1) was in development by Seymour Cray in Chippewa Falls, WI • Star 100 Vector Processor was in Development in Arden Hills • I was assigned to the development of the first DRAM Memory Module for a CDC Supercomputer • I designed the DRAM Module Tester Using ECL Logic Control Data Corporation Arden Hills • First DRAM Module was 4Kx32 using 128 1K DRAM Development Center - June 1971 Chips -
1. Types of Computers Contents
1. Types of Computers Contents 1 Classes of computers 1 1.1 Classes by size ............................................. 1 1.1.1 Microcomputers (personal computers) ............................ 1 1.1.2 Minicomputers (midrange computers) ............................ 1 1.1.3 Mainframe computers ..................................... 1 1.1.4 Supercomputers ........................................ 1 1.2 Classes by function .......................................... 2 1.2.1 Servers ............................................ 2 1.2.2 Workstations ......................................... 2 1.2.3 Information appliances .................................... 2 1.2.4 Embedded computers ..................................... 2 1.3 See also ................................................ 2 1.4 References .............................................. 2 1.5 External links ............................................. 2 2 List of computer size categories 3 2.1 Supercomputers ............................................ 3 2.2 Mainframe computers ........................................ 3 2.3 Minicomputers ............................................ 3 2.4 Microcomputers ........................................... 3 2.5 Mobile computers ........................................... 3 2.6 Others ................................................. 4 2.7 Distinctive marks ........................................... 4 2.8 Categories ............................................... 4 2.9 See also ................................................ 4 2.10 References -
Company Backgrounders : Fiji
Company Backgrounder by Dataquest Fuji Electric Co., Ltd. 12-1 Yurakucho 1-chome, Chyoda-ku Tokyo 100, Japan Telephone: Tokyo 211-7111 Telex: J22331 FUJIELEA or FUJIELEB Fax: (03) 215-8321 Dun's Number: 05-667-2785 Date Founded: 1923 CORPORATE STRATEGIC DIRECTION silicon diodes, thyristors, application-specific ICs (ASICs), LSIs, hybrid ICs, surge absorbers, semicon ductors, sensors, photoconductive drums for copiers, Since its founding in 1923, Fuji Electric Co., Ltd., has been supplying high-quality products to a wide printers, hard-disk drives, magnetic recording disks, variety of industries. Expanding outward while main and watt-hour meters. taining its base as a heavy electrical manufacturer, the Company has achieved leading market positions in Products in the Motors, Drives, and Controls Division products such as uninterruptible power supplies, include induction motors, variable-speed controlled inverters, high-voltage silicon diodes, and vending motors, brake and geared motors, pumps, fans and machines. blowers, inverters, servomotor systems, small preci sion motors, magnetic contractors, and molded case circuit breakers. This division accounted for Fuji Electric's business is organized into five divi 20.5 percent of total revenue, or ¥157.6 biUion sions: Heavy Electrical; Systems; Electronic Devices; (US$1.1 billion) for year ended March 1990. Motors, Drives, and Controls; and Vending Machines and Specialty Appliances. The Heavy Electrical Division manufactures ttieimal power plant equip The Vending Machines and Specialty Appliances ment, hydroelectric power plant equipment, nuclear Division accounted for 17.4 percent of revenue, total power plant equipment, electric motors, transformers, ing ¥133.7 billion (US$938.7 million) for fiscal year computer control equipment, and odier heavy electri ended March 1990. -
The Cydra 5 Departmental Supercomputer Design Philosophies, Decisions, and Trade-Offs
The Cydra 5 Departmental Supercomputer Design Philosophies, Decisions, and Trade-offs B. Ramakrishna Rau, David W.L. Yen, Wei Yen, and Ross A. Towle Cydrome, Inc. 1 groups or departments of scien- work done at TRW Array Processors and tists and engineers.’ It costs about the To meet at ESL (a subsidiary of TRW). The poly- same as a high-end superminicomputer cyclic architecture3 developed at ($500,000 to $1 million), but it can achieve price-performance TRW/ESL is a precursor to the directed- about one-third to one-half the perfor- targets for a new dataflow architecture developed at mance of a supercomputer costing $10 to Cydrome starting in 1984. The common $20 million. This results from using high- minisupercomputer, a theme linking both efforts is the desire to speed, air-cooled, emitter-coupled logic team of computer support the powerful and elegant dataflow technology in a product that includes model of computation with as simple a many architectural innovations. scientists conducted hardware platform as possible. The Cydra 5 is a heterogeneous multi- The driving force behind the develop- processor system. The two types of proces- an exhaustive-and ment of the Cydra 5 was the desire for sors are functionally specialized for the enlightening- increased performance over superminis on different components of the work load numerically intensive computations, but found in a departmental setting. The investigation into the with the following constraint: The user Cydra 5 numeric processor, based on the should not have to discard the software, company’s directed-dataflow architec- relative merits of the set of algorithms, the training, or the ture,* provides consistently high perfor- available techniques acquired over the years. -
On Some Recent Evolutions in Personal Supercomputing and Workstation Graphics J
COMMUNICAIIONS IN APPLIED NUMERICAL METHODS, Vol. 4, 373-378 (1988) ON SOME RECENT EVOLUTIONS IN PERSONAL SUPERCOMPUTING AND WORKSTATION GRAPHICS J. F. HAJJAR,* L. F. MARTHA,? T. F. O’CONNOR$ AND J. F. ABELP Program of Computer Graphics, Cornell University, Ithaca, NY 14853 U.S.A SUMMARY Recent hardware advances for both enhanced computing and interactive graphics are used to improve the effectiveness of three-dimensional engineering simulations. The two examples presented, drawn from struc- tural engineering, deal with the fully nonlinear transient dynamic analysis of frames and boundary element stress analysis. INTRODUCTION Engineers in both research and industry are currently faced with rapid changes in the hardware environment for computational mechanics. On the one hand there is the rapid development of enhanced computing devices, ranging from attached processors to innovative stand-alone vectorized or parallel computers to giant supercomputers. On the other hand, there continue to be dramatic improvements to engineering workstations which combine a devoted processor with large amounts of local memory and disk storage, with networking capabilities, and with integral high-performance graphics including hardware implementations of display algorithms. These two lines of development are strongly related when it comes to the needs of the engineer engaged in computational simulation. In particular, the combination of local processing, advanced graphics, networking and enhanced computing provides - in principle - the capability to address multidimensional problems of greater size and complexity than has previously been possible. In choosing among the sometimes bewildering number of alternatives which offer improved performance and capability, the computational engineer will be governed by his particular needs and resources. -
Multithreaded Vector Architectures
Multithreaded Vector Architectures Roger Espasa Mateo Valero Departament d’arquitectura de Computadors, Universitat Polithcnica de Catalunya, Barcelona e-mail: {roger,mateo}Qac.upc.es http://www.ac.upc.es/hpc Abstract described in [2, 181 have been devised to prefetch data from high levels in the memory hierarchy to lower The purpose of this paper is to show that multi- levels (closer to the CPU) before the data is actually threading techniques can be applied to a vector proces- needed. On top of that, program transformations such sor to greatly increase processor throughput and max- as loop blocking [27] have proven very useful to fit the imize resource utilization. Using a trace driven ap- working set of a program into the cache. proach, we simulate a selection of the Perfect Club Decoupled scalar processors [22, 21, 151 have fo- and Specfp92 programs and compare their execution cused on numerical computation and attack the mem- time on a conventional vector architecture with a sin- ory latency problem by making the observation that gle memory port and on a multithreaded vector archi- the execution of a program can be split into two differ- tecture. We devote an important part of this paper to ent tasks: moving data in and out of the processor and study the interaction between multithreading and main executing all arithmetic instructions that perform the memory latency. This paper focuses on maxamizing program computations. A decoupled processor typi- the usage of the memory port, the most expensive re- cally has two independent processors (the address pro- source in typical vector computers. -
National Bureau of Standards Workshop on Performance Evaluation of Parallel Computers
NBS NATL INST OF STANDARDS & TECH R.I.C. A111DB PUBLICATIONS 5423b? All 102542367 Salazar, Sandra B/Natlonal Bureau of Sta QC100 .1156 NO. 86- 3395 1986 V19 C.1 NBS-P NBSIR 86-3395 National Bureau of Standards Workshop on Performance Evaluation of Parallel Computers Sandra B. Salazar Carl H. Smith U.S. DEPARTMENT OF COMMERCE National Bureau of Standards Center for Computer Systems Engineering Institute for Computer Sciences and Technology Gaithersburg, MD 20899 July 1986 U.S. DEPARTMENT OF COMMERCE ONAL BUREAU OF STANDARDS QC 100 - U 5 6 86-3395 1986 C. 2 NBS RESEARCH INFORMATION CENTER NBSIR 86-3395 * 9 if National Bureau of Standards Workshop on Performance Evaluation of Parallel Computers Sandra B. Salazar Carl H. Smith U.S. DEPARTMENT OF COMMERCE National Bureau of Standards Center for Computer Systems Engineering Institute for Computer Sciences and Technology Gaithersburg, MD 20899 July 1986 U.S. DEPARTMENT OF COMMERCE NATIONAL BUREAU OF STANDARDS NBSIR 86-3395 NATIONAL BUREAU OF STANDARDS WORKSHOP ON PERFORMANCE EVALUATION OF PARALLEL COMPUTERS Sandra B. Salazar Carl H. Smith U.S. DEPARTMENT OF COMMERCE National Bureau of Standards . Center for Computer Systems Engineering Institute for Computer Sciences and Technology Gaithersburg, MD 20899 July 1986 U.S. DEPARTMENT OF COMMERCE, Malcolm Baldrige, Secretary NATIONAL BUREAU OF STANDARDS, Ernest Ambler, Director o'* NATIONAL BUREAU OF STANDARDS WORKSHOP ON PERFORMANCE EVALUATION OF PARALLEL COMPUTERS Sandra B. Salazar and Carl H. Smith * U.S. Department of Commerce National Bureau of Standards Center for Computer Systems Engineering Institute for Computer Sciences and Technology Gaithersburg, MD 20899 The Institute for Computer Sciences and Technology of the National Bureau of Standards held a workshop on June 5 and 6 of 1985 in Gaithersburg, Maryland to discuss techniques for the measurement and evaluation of parallel computers.