Quick viewing(Text Mode)

(12) United States Patent (10) Patent N0.: US 7,149,882 B2 Glew Et A]

(12) United States Patent (10) Patent N0.: US 7,149,882 B2 Glew Et A]

US007149882B2

(12) United States Patent (10) Patent N0.: US 7,149,882 B2 GleW et a]. (45) Date of Patent: *Dec. 12, 2006

(54) PROCESSOR WITH INSTRUCTIONS THAT (52) U.S. Cl...... 712/222; 712/221; 712/228; OPERATE ON DIFFERENT DATA TYPES 712/229 STORED IN THE SAME SINGLE LOGICAL (58) Field of Classi?cation Search ...... 712/221, REGISTER FILE 712/222, 4, 213, 228, 244, 208, 209, 225, 712/226, 229, 23, 1, 220, 202, 24, 217; 711/100, (75) Inventors: Andrew F. GleW, Hillsboro, OR (US); 711/153, 147; 708/204 Larry M. Mennemeier, Boulder Creek, See application ?le for complete search history. CA (US); Alexander D. Peleg, Haifa (IL); David Bistry, Cupertino, CA (56) References Cited (US); Millind Mittal, South San U.S. PATENT DOCUMENTS Francisco, CA (US); Carole Dulong, Saratoga, CA (US); Eiichi KoWashi, 3,711,692 A 1/1973 Batcher Ibaraki (JP); Benny Eitan, Haifa (IL); (Continued) Derrik Lin, Foster City, CA (US); Romamohan R. Vakkalagadda, FOREIGN PATENT DOCUMENTS Fremont, CA (US) EP 921060653 8/1992 (73) Assignee: Corporation, Santa Clara, CA (Continued) (Us) OTHER PUBLICATIONS Examiner-Initiated Interview Summary; U.S. Appl. No. 09/363,116, Notice: Subject to any disclaimer, the term of this Glew et al., Paper No. 25 (2 pgs) Date of Interview: May 5, 2004. patent is extended or adjusted under 35 U.S.C. 154(b) by 26 days. (Continued) Primary ExamineriLinh V. Nguyen This patent is subject to a terminal dis claimer. (74) Attorney, Agent, or FirmiBlakely, SokoloiT, Taylor & Zafman LLP (21) Appl. N0.: 10/844,606 (57) ABSTRACT (22) Filed: May 11, 2004 A processor with instructions to operate on di?cerent data types stored in a single logical register ?le. According to one (65) Prior Publication Data embodiment of the invention, a processor includes a number US 2004/0210741 A1 Oct. 21, 2004 of physical registers, a memory unit, and a decode/ execution unit. The memory unit is to make the number of physical Related U.S. Application Data registers appear to software as a single software-visible register ?le. The decode/execution unit is to execute on the (63) Continuation of application No. 09/363,116, ?led on contents of the single software-visible register ?le instruc Jul. 27, 1999, now Pat. No. 6,792,523, which is a tions of a ?rst instruction type and of a second instruction continuation of application No. 08/898,720, ?led on type, wherein the single software-visible register ?le is to be Jul. 22, 1997, now Pat. No. 6,170,997, which is a operated as a ?at register ?le during execution of instruc continuation of application No. 08/574,500, ?led on tions of the second instruction type and as a stack referenced Dec. 19, 1995, now Pat. No. 5,701,508. register ?le during execution of instructions of the ?rst instruction type. (51) Int. Cl. G06F 7/3 8 (2006.01) 83 Claims, 20 Drawing Sheets

@ NiYRUGTION 2

EXECUTE ms

msm‘ucmnm mmucnau US 7,149,882 B2 Page 2

US. PATENT DOCUMENTS 6,425,074 B1 * 7/2002 Meier et a1...... 712/222 6,584,482 B1 6/2003 Hansen et al. 4,161,7843723715 A “9737/1979 Chen_eta1'cushlng etal' 6,598,1496,643,765 B1*B1 11/20037/2003 CliftHansen et a1. 4,229,801 A 10/1980 WA‘PPA 6,725,356 B1 4/2004 Hansen et a1. 4,334,269 A 6/1982 Shlbasakl 6‘ 31' 6,792,523 B1* 9/2004 Glew et a1...... 712/228 4,393,468 A 7/1983 New 4,418,383 A 11/1983 DOyle et a1. FOREIGN PATENT DOCUMENTS 4,498,177 A 2/1985 Larson 4,707,800 A 11/1987 Montrone et a1. EP 931209331 12/1993 4,771,379 A 9/1988 Ando et a1. EP 96 94 4983 9/ 1999 4,972,314 A 11/1990 GetZinger et a1. JP 58080740 5/1983 4,989,168 A 1/1991 Kuroda et a1. W0 W093/0l543 l/1993 4,992,938 A 2/1991 Cooke et al. W0 PCT/US96/20572 3/1997 5,008,812 A 4/1991 Bhandarkar et al. W0 PCT/US96/20573 3/1997 5,021,993 A 6/1991 Matoba et al. W0 PCT/US96/20516 4/1997 5,095,457 A 3/1992 Jeong WO PCT/US96/20522 4/1997 5,127,098 A 6/1992 Rosenthal et al. W0 PCT/US96/20522 10/1997 5,187,679 A 2/1993 Vassiliadis et a1. W0 PCT/US96/20572 10/1997 5,241,635 A 8/1993 Papadopoulos et al. W0 PCT/US96/20573 11/1997 5,267,350 A 11/1993 Matsubara et a1. W0 PCT/US96/20516 12/1997 5,268,995 A 12/1993 Diefendorif et al. W0 PCT/US96/20522 3/1998 5,426,783 A 6/1995 Norrie et al. W0 PCT/US96/20516 4/1998 5,467,473 A 11/1995 Kahle et a1. 5,481,719 A 1/1996 Ackerman et a1. OTHER PUBLICATIONS 5’487’l59 A V1996 Byers et a1‘ .1. Shipnes, Graphics Processing with the 88]]ORlSCMicro A 211' processor, IEEE (1992), pp. 169-174, no month. 535073000 A 4/1996 Stewart ' MC8811O Second Generation RlSC User’s 5,519,841 A 5/1996 Sager et a1‘ Manual, MO101'O121 111C. 11O 111011111. 5,522,051 A 5/1996 Shamngpani Errata to MC8811O Second Generation RlSC Microproces 5,535,397 A 7/1996 Durante er a1, sor User’s Manual, Motorola Inc. (1992), pp. 1-11, no 5,537,606 A 7/1996 Byrne 111011111. 5546554 A 8/1996 Yung 61 ill MC88110 Programmer’s Reference Guide, Motorola Inc. 5,560,035 A 9/1996 Garg et a1. (1992)’ p_ 1_4’ no month 5’634’U8 A 5/1997 Blolngren i86OTM Microprocessor Family Programmer’s Reference 5’649’225 A 7/1997 Wlnte et 31' Manual, Intel Corporation (1992), Ch. 1, 3, 8, 12, no month. 5,651,125 A 7/1997 W1tt et al...... 5,657,253 A 8/l997 Dreyer et 31‘ RB. Lee, Accelerating Multimedia With Enhanced Micro 5 669 013 A 9/1997 Watanabe et a1‘ PI’OCESSOI’S, MlCI'O 22-32, 110 111011111. 5:677:36; A 10/1997 Peleg et a1, TMS32OC2x User’s Guide, (1993) pp. 5,687,336 A 11/1997 Shen et al. 3-2 through 3-11; 3-28 1111‘O11g11 3-34; 4-1 through 4-22; 5,696,955 A 12/1997 Goddard 4-41; 4-103; 4-119 through 4-120; 4-122; 4-150 through 5,701,508 A * 12/1997 GleW et al...... 712/23 4451’ no month 5,721,892 A 2/1998 Peleg et 31' L. GWennap, New PA-RlSC Processor Decodes MPEG 5’742’840 A 4/1998 Hansen et a1‘ I/ideo, Microprocessor Report (Jan. 1994), pp. 16, 17. 5,760,792 A “998 HO“ at al' SPARC Technology Business, UltraSPARC Multimedia 5,761,105 A * 6/1998 Goddard et a1...... 708/510 . . . . 5778419 A 7/l998 Hansen et a1‘ Capabilities On-Chip Support for Real-Hme I/ideo and 5379430615,794,060 A g/199g8/1998 Hansen et a1‘31‘ AdvancedY. KaWakami, Graphics, et al., LSIApplications:AS1111 Microsystems Single-Chip Digital 5,809,321 A 9/1998 Hansen et a1, Signal Processor for Voiceband Applications, Solid State 5,822,603 A 10/1998 Hansen et al. Circuits Conference, Digest of Technical Papers; IEEE 5,835,748 A * 11/1998 Orenstein et a1...... 712/217 Internationm (1980), no month 5,852,726 A * 12/1998 Lin et al...... 712/200 B_ Case, Phillips Hopes to Disploce DSPS with VLIW" i * 113532212321‘ """"""" " 712/229 Microprocessor Report (Dec. 1994), pp. 12-15. 5,938,756 A 8/1999 Van Hook et a1‘ glsounce,I EP].E,Ee1tVI al.. Archétectures W1th1n the Espr‘rt Span 5,940,859 A * 8/1999 Bistry et a1...... 711/147 rOJeCF _1°r°’n_° are" _ _ _ 5 953 241 A 9/1999 Hansen et 31‘ Graphics Floating Point Engine Fix and Float Registers 5:968:169 A * 10/1999 Pickett ...... 712/239 consolidations, IBM Technical Disclosure Bulletin, Vol 36, 5,978,901 A 11/1999 Luedtke et al. NO. 12, dated D60. 1993. 6,006,318 A 12/1999 Hansen et a1. L. GWennap, UltraSparc Adds Multimedia Instructions, 6,145,049 A 11/2000 Wong Microprocessor Report (Dec. 1994) pp. 16-18. 6,170,997 Bl* l/200l Glew et a1...... 712/217 N_ Margulisa i860 Microprocessor Architecture, MCGraW 6,247,106 B1: 6/2001 W111 ...... 711/203 Hill’ Inc' (1990)’ Ch' 6, 7, 8, 10, 11, no Inonth~ 6’266’686 Bl 7/2001 Blstry et 31' """"""" " 708/204 Pentium Processor User ’s Manual, V01. 3; Architecture and 6,295,599 B1 9/2001 Hansen et a1. . . 6,339,823 B1 V2002 Loper, Jr‘ ProgrammingManual, Intel Corporatron (1993), Ch. 1,3, 4, 6,378,060 B1 4/2002 Hansen et a1. 6, 8, and 18> 110 month 6,3g5,716 B1 5/2002 Henry et a1, i86OTM Microprocessor Family Programmer’s Reference 6,405,305 B1* 6/2002 Meier et a1...... 712/222 Manual, Intel Corporation (1992), Ch. 2, 9, 10, 11, no 6,412,065 B1 6/2002 Loper, Jr. 111011111. US 7,149,882 B2 Page 3

Keith Diefendorlf, et al., “Organization of the Motorola Texas, Austin Division, Civil Action No. A-01-CA-602-SS 88110 Superscalar RISC Microprocessor”, IEEE Micro, pp. (Consolidated With Civil Action No. A-02-CA-420-SS), 40-63, Apr. 1992. dated Apr. 2, 2003; total pages: 46. RD. Dixon, “A Stack-Frame Architecture Language Pro VIA Technologies Inc., and , Inc., v. Intel cessor”, The Journal of Forth Application and Research, Corporation v. VIA-, Inc. and VIA Technologies, Inc. Proceedings of the 1987 Rochester Forth Conference, vol. 5, (US), “VIA Parties’ Notice Under 35 USC § 282,” In the No. 1, pp. 11-25, no month. United States District Court for the Western District of Linley GWennap, “UltraSparc Adds Multimedia Instruc Texas, Austin Division, Civil Action No. A-01-CA-602-SS, tions, Other NeW Instructions Handle Unaligned and Little dated Mar. 7, 2003; total pages: 21. Endian Data”, Microprocessor Report, pp. 16-18, Dec. 5, VIA Technologies Inc., and Centaur Technology, Inc., v. Intel 1994. Corporation v. VIA-Cyrix, Inc., VIA Technologies, Inc. (US), L. Kohn, et al., “The Visual Instruction Set (V IS) in and IP First, L.L.C., “VIA Parties’ Motion For Summary UltraSPARCTM”, IEEE Computer Society Press, pp. 462 Judgment That US. Patent No. 5,835,748 Is Invalid For 469, Los Alamitos, California, 1995, no month. Failure To Disclose The Best ModeiFiled Under Seal,” In Philip Koopman, Jr., “Stack Computers the neW Wave”, the United States District Court for the Western District of Mountain VieW Press, pp. 3-234, La Honda, California, Texas, Austin Division, Civil Action No. A-01-CA-602-SS 1989, no month. (Consolidated With Civil Action No. A-02-CA-420-SS), Centaur’s Reply to Intel’s Counterclaims of May 16, 2002, dated Mar. 17, 2003; total pages: 106 (including tabs). In the United States District Court for the Western District VIA Technologies Inc., and Centaur Technology, Inc., v. Intel of Texas, Austin Division, Civil Action No. A-01-CA-602 Corporation v. VIA-Cyrix, Inc., and VIA Technologies, Inc. SS, J/ia Technologies, Inc., a Corporation, and (US), and IP First, L.L.C., “Intel’s Opposition To The VIA Centaur Technology, Inc. vs. Intel Corporation vs. J/ia Parties’ Motion For Summary Judgment of Invalidity of Cyrix, Inc., a Texas Corporation, and Ida Technologies, Inc. US. Patent No. 5,835,748 Based On Best Mode,” In the (US), ?led May 31, 2002 (12 pgs.). United States District Court for the Western District of Reply of Intel to Centaur’s Counterclaim, In the United Texas, Austin Division, Civil Action No. A-01-CA-602-SS States District Court for the Western District of Texas, (Consolidated With Civil Action No. A-02-CA-420-SS), Austin Division, Civil Action No. A-01-CA-602-22, I/ia ?led Mar. 24, 2003; total pages: 31 (including tabs). Technologies, Inc., a Taiwan Corporation, and Centaur VIA Technologies Inc., a Taiwan Corporation, and Centaur Technology, Inc. vs. Intel Corporation vs. J/ia-Cyrix, Inc., a Technology, Inc., a California Corporation, v. Intel Corpo Texas Corporation, and Wm Technologies, Inc. (US), ?led ration, a Delaware Corporation, “The VIA Parties’ Reply Jun. 13, 2002 (4 pgs). To Intel’s Opposition To The VIA Parties’ Motion For Defendants’ Particulars of Objections, In the High Court of Summary Judgment That US. Patent No. 5,835,748 Is the Hong Kong Special Administrative Region (Hong Invalid For Failure To Disclose The Best ModeiFiled Kong), Court of First Instance of No. 4265 of 2001, Case Under Seal,” In the United States District Court for the No. HCA 4265/2001, Intel Corporation vs. J/ia Technologies Western District of Texas, Austin Division, Civil Action No. Inc.; TrendElectronics (HK) Limited, dated Dec. 27, 2001 (4 A-01-CA-602-SS, dated Mar. 27, 2003; total pages: 44 pgs) (including tabs). Defence and Counterclaim, In the High Court of Justice VIA Technologies Inc., and Centaur Technology, Inc., v. Intel Chancery Division Patents Court (United Kingdom), Case Corporation, “Order: That . . . VIA Parties’ Motion For No. HC 01 No. C04136, Intel Corporation vs. Via Tech Summary Judgment That US. Patent No. 5,835,748 Is nologies Inc. (a company incorporated in Taiwan), J/ia Invalid For Failure To Disclose The Best Mode [#356] is Technologies (Europe) Limited, Realtime Distribution Lim Denied . . . , signed by Sam Sparks, United States District ited, dated Dec. 12, 2001 (pp. 1-13); Annex 1 to the Defence Judge,” In the United States District Court for the Western and Counterclaim (2 pgs); Annex 2 to the Defence and District of Texas, Austin Division, Case No. A-01-CA-602 Counterclaim (4 pgs.); Cover page (1 pg). SS, dated Mar. 31, 2003; total pages: 23. Defendants’ Particulars of Objections, In the High Court of VIA Technologies Inc., and Centaur Technology, Inc., v. Intel Justice Chancery Division Patents Court (United Kingdom), Corporation v. VIA-Cyrix, Inc. and VIA Technologies, Inc. Case No. HC 01 No. C04136, Intel Corporation vs. I/ia (US), and IP First, L.L.C., “Expert Report of Harold Stone Technologies Inc. (a company incorporated in Taiwan), J/ia (2),” In the United States District Court for the Western Technologies (Europe) Limited, Realtime Distribution Lim District of Texas, Austin Division, Civil Action No. A-01 ited, dated Dec. 12, 2001, (4 pgs). CA-602-SS (Consolidated With Civil Action No. A-02-CA VIA Technologies Inc., a Taiwan Corporation, and Centaur 420-SS), dated Mar. 17, 2003; total pages: 89 (including Technology, Inc., a California Corporation, v. Intel Corpo tabs). ration, a Delaware Corporation, “VIA’s and Centaur’s VIA Technologies Inc., and Centaur Technology, Inc., v. Intel Short Statement Regarding Their Non-Infringement and Corporation v. VIA-Cyrix, Inc., VIA Technologies, Inc. (US), Invalidity Defenses -Filed Under Seal (Redacted),” In the and IP First, L.L.C., “Rebuttal Expert Report of Dr. V. United States District Court for the Western District of Thomas Rhyne Regarding The Validity of US. Patent Nos. Texas, Austin Division, Civil Action No. A-01-CA-602-SS, 5,701,508; 5,835,748 and 5,201,043,” In the United States ?led Jan. 24, 2002; total pages: 14. District Court for the Western District of Texas, Austin VIA Technologies Inc., and Centaur Technology, Inc., v. Intel Division, Civil Action No. A-01-CA-602-SS (Consolidated Corporation v. VIA-Cyrix, Inc. and VIA Technologies, Inc. With Civil Action No. A-02-CA-420-SS), dated Mar. 24, (US), “VIA Parties’ Second Supplemental Responses to 2003; total pages: 73 (including tab). Intel’s Interrogatory (No. 3) and Third Supplemental Intel Corporation (a company incorporated in the state of Response to Intel’s Interrogatory (No. 6) (Redacted),” In the Delaware USA) vs. (1) VIA Technologies Inc. (a company United States District Court for the Western District of incorporated in Taiwan), (2) VIA Technologies (Europe) US 7,149,882 B2 Page 4

Limited, (3) Realtime Distribution Limited, “Intel’s Opening Intel Corporation (a company incorporated in the state of Skeleton Argument (Redacted),” In the High Court of Jus Delaware USA) vs. (1) VIA Technologies Inc. (a company tice Chancery Division Patents Court (United Kingdom), incorporated in Taiwan), (2) VIA Technologies (Europe) Case No. HC 01 No. C04136, dated Feb. 25, 2003; total Limited, (3) Realtime Distribution Limited, “Expert Report pages: 100. of Michael David May (Redacted),” In the High Court of Intel Corporation (a company incorporated in the state of Justice Chancery Division Patents Court (United Kingdom), Delaware USA) vs. (1) VIA Technologies Inc. (a company Case No. HC 01 No. C04136, dated Dec. 23, 2002; total incorporated in Taiwan), (2) VIA Technologies (Europe) pages: 268 (including tabs). Limited, (3) Realtime Distribution Limited, “Intel’s Closing Intel Corporation (a company incorporated in the state of Skeleton Argument (Redacted),” In the High Court of Jus Delaware USA),vs. (1) VIA Technologies Inc. (a company tice Chancery Division Patents Court (United Kingdom), incorporated in Taiwan), (2) VIA Technologies (Europe) Case No. HC 01 No. C04136, dated Feb. 13, 2003; total pages: 148. Limited, (3) Realtime Distribution Limited, “Expert Report Intel Corporation vs. VIA Technologies Inc. (a company of Michael David May: Exhibits MDM-l to MDM-ll incorporated in Taiwan), VIA Technologies (Europe) Lim (Redacted),” In the High Court of Justice Chancery Division ited, Realtime Distribution Limited, r‘Intel Corporation V. Patents Court (United Kingdom), Case No. HC 01 No. VIA Technologies, Inc., and others; Defendants’ Opening C04136, dated Dec. 23, 2002; total pages: 367 (including Skeleton Argument iIntroduction to the Proceedings tabs). (Redacted),” In the High Court of Justice Chancery Division Intel Corporation (a company incorporated in the state of Patents Court (United Kingdom), Case No. HC 01 No. Delaware USA) vs. (1) VIA Technologies Inc. (a company C04136, dated Jan. 27, 2003; total pages: 99 (including incorporated in Taiwan), (2) VIA Technologies (Europe) tabs). Limited, (3) Realtime Distribution Limited, “Bundle Intel Corporation vs. VIA Technologies Inc. (a company XiExhibits Produced At Trial,” In the High Court of incorporated in Taiwan), VIA Technologies (Europe) Lim Justice Chancery Division Patents Court (United Kingdom), ited, Realtime Distribution Limited, r‘Intel Corporation v. Case No. HC 01 No. C04136, dates produced: Feb. 5, VIA Technologies, Inc., and others; Defendants’ Closing 2003-Feb. 11, 2003; total pages: 139 (including tabs). Skeleton Argument (Redacted),” In the High Court of Jus Intel Corporation (a company incorporated in the state of tice Chancery Division Patents Court (United Kingdom), Delaware USA) vs. (1) VIA Technologies Inc. (a company Case No. HC 01 No. C04136, dated Feb. 13, 2003; total incorporated in Taiwan), (2) VIA Technologies (Europe) pages: 70 (including tabs). Limited, (3) Realtime Distribution Limited, “Order Before Intel Corporation (a company incorporated in the state of the Honorable Mr. Justice Pumfrey, Monday Feb. 3, 2003: Delaware USA) vs. (1) VIA Technologies Inc. (a company Claimant has leave to amend the Speci?cation of United incorporated in Taiwan), (2) VIA Technologies (Europe) Kingdom Patent No. GB 2 326 494 . . . ”, In the High Court Limited, (3) Realtime Distribution Limited, “Expert’s Report of Justice Chancery Division Patents Court (United King of Simon Richard Jones (Redacted),” In the High Court of dom), Case No. HC 01 No. C04136, dated Feb. 3, 2003; total Justice Chancery Division Patents Court (United Kingdom), pages: 2. Case No. HC 01 No. C04136, dated Dec. 20, 2002; total pages: 109 (including tabs). * cited by examiner U.S. Patent Dec. 12, 2006 Sheet 1 0f 20 US 7,149,882 B2

[- 100 F- PROCESSOR 105 F- FLOATING POINT UNIT 135

FLOATING POINT rues 150 {- REGISTEFIS145

TAG R7 SIGNIE MANTISSA

OS 132

STORAGE DEVICE 110

- KEYBOARD 120

DISPLAY l‘llllllll‘lll 125 FP STATUS REGISTER ; 155 ms (160

+- STATUS REGISTER m mew mém F( 1 P.I g.“ . 0 r M t ) U.S. Patent Dec. 12, 2006 Sheet 2 0f 20 US 7,149,882 B2

START Z0

RECEIVE AN INSTRUCTION KB

IS THE OPCODE VALID? 210 YES GENERATE AN INVAUD OPCODE EXCEPTION FLOATING POINT 215 INSTRUCTION? EXECUTE THE INSTRUCTION 25

GENERATE A DEVICE NOT AVAILABLE EXCEPTION 235

ARE THERE ANY PENDING ERRORS FROM PREVIOUS FLOATING POINT INSTRUCTIONS THAT CAN GENERATE A PENDING FLOATING POINT ERROR EXCEPTION 245

EXECUTE THE FLOATING POINT INSTRUCTION, ALTERING THE TAGS AS NECESSARY AND HOLDING ANY NUMERIC ERRORS PENDING an Fig. 2 (Prior Art) U.S. Patent Dec. 12, 2006 Sheet 3 0f 20 US 7,149,882 B2

FP STATUS REGISTER 340 3/50 fwmssazo I 1 T105 I j

FLOATING POINT 300 P07

PD TAGS 330 \ PACKED DATA REGISTERS s10 3 A I

FP 'push' ST = STO PP ‘009' 4/

Case a: TOS : 0 Case b: TOS = 2 Outer circle I: FP mglstel's logical location relativa to TOS Inner circle = FPIMM tags = MM register‘: location = FP registers physical location Figure 3B Figure 3C U.S. Patent Dec. 12, 2006 Sheet 4 0f 20 US 7,149,882 B2

386 FD \1...".||||1|1!.

mm.m_ MU m3% m3/w. m NU_ Mw/ F P m S Cm N S W S m N W m .m U Cm N S lllTlllllllll1 P1 m/Jwm? T M E 8Jim111 Figure 3D

1520

1510 ; PD INSTRUCTIONS TIME 1 T1: FP WRITE INSTRUC'HON 1500 Figure 15A

1550

1540 ,4 FP INSTRUCUONS TIME l T1: mm w m F .w. u r e 1 5 B U.S. Patent Dec. 12, 2006 Sheet 5 0f 20 US 7,149,882 B2

START 400

RECEIVE AN INSTRUCTION 402

IS THE OPCODE VALID? 4

INSTRUCTION TYPE? 408 EXECUTE THE FLOATING INSTRUCTIONPOM IISIEBCISI‘

Y GENERATE AN INVALID OPCODE EXCEPTION 406

GENERATE A DEVICE NOT AVAILABLE EXCEPTION 416

' THERE ANY PENDING ' E THERE ANY PENDING ERRORS FROM PREVIOUS ERRORS FROM PREVIOUS FLOATING POINT FLOATING POINT STRUCTIONS THAT CAN

GENERATE A PENDING FLOATING POINT ERROR42 ‘EXCEPTION U.S. Patent Dec. 12, 2006 Sheet 6 0f 20 US 7,149,882 B2

EXECUTE THE FLOATING POINT INSTRUCTION. ALTERING THE TAGS AS NECESSARY AND HOLDING ANY NUMERIC ERRORS PENDING 426

IS THE PACKED DATA INSTRUCTION THE EMMS NSTRUCTION?

SET ALL TAGS = NON EMPTY 434

YES DOES THE PACKED DATA INSTRUCTION CAUSE THE PROCESSOR TO WRITE TO ANY ' LIASED REGISTERS

IN THE SIGN NO v P NENT FIELDS OF EACH AUASED SET ALI. Tigzs = EMPTY REGISTER WRITTEN TO 438 L

EXECUTE THE PACKED DATA INSTRUCTION WITHOUT REOOGNIZING ANY NUMERIO EXCEPTIONS 440

SET TOS = 0 ' 442 Fig. 4B U.S. Patent Dec. 12, 2006 Sheet 7 0f 20 US 7,149,882 B2

j PROCESSOR 505

DECODEIEXECUTION UNIT 575 $515 FINSTHUCTION SET 5B0 PACKED DATA INSTRUCTIONS MEMORY UNIT FF INSTRUCTIONS GS 585 GENERAL PURPOSE 535 INSTRUCTIONS PACKED DATA INSTRUCTION SET UNIT 560 HOWNE ? 540

4-’ BUS 4-’ STORAGE DEVICE c223"; uNrr 510 545

44.’. KEYBOARD 520

EVENT HANDUNG ‘- MEMORY MANAGEMENT 570 565 525

H NETWORK 530 I,“ U.S. Patent Dec. 12, 2006 Sheet 8 0f 20 US 7,149,882 B2

‘- FLOATING POINT UNIT s05 FLOATING POINT FTAGS 520 f’ REGISTERS 615 19 78 s4 s3 0 TAG H SIGN I EXPONENT' MANTISSA R6 I l 645 R5 I I 640 " FM | | 14- 1 R3 | l l m I I | R? T I no 1 J‘ I I E 1" _ _ _ _FF STATUS_. _ J FLOATING f f REGISTER B25 POINT STACK REFERENCE 635 UNIT 630 A TRANSITION UNIT 600 V {PACKED DATA UNIT 610 rPACKED DATf; REGISTERS 650

PACKED DATA STATUSBESEGIS‘I'ER SPECULATIVE EMMS INDICATION S70 INDICATION 685 2 PACKED DATA IJIII I 1 NONSTACK V REFERENCE DIRTY ‘ EXCEPTION UNIT INDICATIONS STATUS INDICATION 56D 665 MODE INDICATION 675 Fig. 6A U.S. Patent Dec. 12, 2006 Sheet 9 0f 20 US 7,149,882 B2

+- FLOATING POINT STACK HEFERENCE UNIT 630 FTAG MODIFIER UNIT s90 FTAes 620 wnrrg

O Q 0 0 0 O

CHECK/MODIFICA‘HON UNIT wan-E 698 ’\¢645

O = O:

Wang

‘Q. '/ ~-—TosADJUSTMENT ‘-—-——-——-—| UNITS ' 696 l ' l ' l ' | ' l ' |

l _ _ ._ _ -_ _ _ -l 494 H ms

000 n " mono OP UNES s92 MICROOPS

Fig. 6B U.S. Patent Dec. 12, 2006 Sheet 10 0f 20 US 7,149,882 B2

RECEIVE AN INSTRUCTION 7C2

IS THE N0 OPCODE VALID? YES

OTHER INSTRUCTION TYPE? ms EXECUTEINSTRUCTION THE “Esme PACKED DATA @ YES 11o INSTRUCTION INSTRUCTION No GENERATE AN INVALID OPCODE EM=1 YES YES 8 1 EXCEPTION AND/OR = 106 Ts =1? \18 112 NO NO GENERATE A DEVICE NOT AVAILABLE EXCEPTION 11s

ARE THERE ANY PENDING ERRORS FROM PREVIOUS FLOATING YES POINT INSTRUCTIONS HAT CAN BE SERVICED NOW?

No GENERATE A PENDING FLOATING POINT ERRO’; EXCEPTION 4 Q Fig. 7A U.S. Patent Dec. 12, 2006 Sheet 11 0120 US 7,149,882 B2

MODE INDICATION = FLOATING POINT MODE? 7% YES TRANSITION FROM THE PACKED DATA MODE TO THE FLOATING POINT MODE 728 I MICRO RESTAHT: RESTART THE INSTRUCTION 730 Y EXECUTE THE FLOATING POINT INSTRUCTION, ALTERING THE TAGS AS NECESSARY AND HOLDING ANY NUMERIC'ERROFIS PENDING 732

Fig. 7B U.S. Patent Dec. 12, 2006 Sheet 12 or 20 US 7,149,882 B2

STATUS INDICATION = PACKED DATA? FROM THE FLOATING POINT MODE TO THE PACKED DATA MODE TRANSITION 734 SET THE SPECULATIVE INDICATION TO INDICATE l THE FP TO PD MICRQ RESTART; TRANSITION IS NO LONGER RESTART THE INSTRUCTION SPECULATIVE 13s 73s

NO THE PACKED DATA INSTRUCTION THE MMS INSTRUCTION v 140 SET THE EMMS YES INDICATION = LAST PD INSTRUCTION wAs NoT SET THE EMMS EMMS INDICATION = LAST 7“ PD INSTRUCTION WAS THE EMMS INSTRUCTION 742

DOES THE PACKED DATA YES INSTRUCTION CAUSE THE PROCESSOR TO WRITE TO ANY ALIASED REGISTERS? 746 SET THE ALIASED REGISTER'S CORRESPONDING DIRTY INDICATION = DIRTY 748

EXECUTE THE PACKED DATA INSTRUCTION WITHOUT RECOGNIZING ANY NUMERIC EXCEPTIONS 75) Fig.7C U.S. Patent Dec. 12, 2006 Sheet 13 0f 20 US 7,149,882 B2

FROM STEP 722

' RE THERE ANY PENDING YES ERRORS FROM PREVIOUS FLOATING POINT INSTRUCTIONS THAT CAN BE SERVICED NOW? ED PENDING FLOATING POINT ERROR EXCEPTION 724 COPY THE DATA STORED IN THE MANTISSA FIELDS OF THE FLOATING POINT REGISTERS INTO THE PACKED DATA REGISTERS 804 I SET THE EMMS INDICATION = LAST PD INSTRUCTION WAS NOT THE EMMS INSTRUCTION 815 I SET ALL DIRTY INDICATIONS CLEAN KB I SET THE SPECULATIVE INDICATION TO INDICATE THE FP TO PD TRANSITION IS SPECULATIVE 810 I SEI' THE MODE INDICATION = PACKED DATA MODE 812

I TO STEP736 Fig‘ 8 U.S. Patent Dec. 12, 2006 Sheet 14 0f 20 US 7,149,882 B2

FROM STEP 726 +_ 723 l

DOES THE SPECULATIVE INDICATION : THE FP TO PD YES TRANSITION IS SPECULATIVE'?

YES DOES THE EMMS INDICATION = LAST PD INSTRUCTION WAS THE MS INSTRUCTIO

SET ALL TAGS = EMPTY 904 SET ALL TAGS = NON-EMPTY 93

COPY THE CONTENTS OF THE PACKED DATA REGISTERS INTO THE MANTISSA FIELDS OF ‘II-IE FLOATING POINT REGISTERS QB

SET TOS : 0 910

STORE 1's IN THE SIGN AND EXPONENT FIELDS OF THOSE FLOATING POINT REGISTERS WHOSE CORRESPONDING DIRTY INDICATIONS = DIRTY 912 1 SET THE MODE INDICATION = FLOATING POINT MODE 914 S I TO STEP 730 9

U.S. Patent Dec. 12, 2006 Sheet 16 0f 20 US 7,149,882 B2

START 1100

RECEIVE AN INSTRUCTION 11m

IS THE OPCODE VALID? 1104 YES INsERT AN EVENT SIGNAL MICRO OP(s) INDICATING THE INVAUD OPCODE EXCEPTION 1105 I

INSTRUCTION TYPE? 1108 EXECUTE THE FLOATING PACKED INSTRUCTION POINT DATA 1110 INSTRUCTION INSTRUCTION

INSERT AN EVENT SIGNAL MICRO OPISI INDICATING THE DEVICE NOT AVAILABLE EXCEPTION 1116

._—Y_, REGISTER RENAMING REGISTER RENAMING 1120 1114

Fig. 11A