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VIA Technologies Inc. Confidential N D a R Equired Embedded System Platform VIA Eden-N VIAProcessor Technologies Inc. Confidential Datasheet N D A R equired VIA TECHNOLOGIES, INC. Revision 0.92 October 22, 2004 VIA Eden-N Processor Datasheet October 22, 2004 This is Version 0.92 of the VIA Eden-N Processor Datasheet. © 2003-2004 VIA Technologies, Inc All Rights Reserved. VIA reserves the right to make changes in its products without notice in order to improve design or performance characteristics. This publication neither states nor implies any representations or warranties of any kind, including but not limited to any implied warranty of merchantability or fitness for a particular purpose. No license, express or implied, to any intellectual property rights is granted by this document. VIA makes no representations or warranties with respect to the accuracy or completeness of the con- tents of this publication or the information contained herein, and reserves the right to make. changes at any time, without notice. VIA disclaims responsibility for any consequences resulting from the use of the information included herein. Inc Cyrix and VIA C3 are trademarks of VIA Technologies, Inc. s CentaurHauls is a trademark of Centaur Technology Corporation. e AMD, AMD K6, and Athlon are trademarks of Advanced Micro Devices, Inc. Microsoft and Windows are registered trademarks of Microsoftgi Corporation. l o a Intel, Pentium, Celeron, and MMX are registered trademarks of Intel Corporation.i d Other product names used in this publication are for identification purposes only and maye be trade- marks of their respective companies. nt r hnol i c ide qu e e LIFE SUPPORT POLICY nf T VIA processor products are not authorized for use as componentso in life Rsupport or other medical devices or systems (hereinafter life support devices)A unless a specificC written agreement pertaining to such intended use is executed be- tween the manufacturer and anI officer of VIA. A 1. Life support devices are devices which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to Vperform, when properly used in accordanceD with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. This policy covers any component of a life support deviceN or system whose failure to perform can cause the failure of the life support device or system, or to affect its safety or effectiveness. October 22, 2004 VIA Eden-N Processor Datasheet Revision History Document Release Date Revision Initials 0.7 11/12/03 For internal use only CJH 0.8 11/28/03 Release Candidate CJH Modified Table 3-2 BR[1:0] renamed to BREQ[1:0] Added IERR# Added Vcc_Sense Added Vss_Sense . Added Vref_cmos Modified Figure 5-1 and Table 5-1 and 5-2 nc Renamed ball A-18 as Vref_cmos I Renamed ball G-17 as RSVD (was sPREQ) Renamed ball N-17 as IERR (wase RSVD) Renamed ball K-5 as Vss_sensegi (was Vss)l Renamed ball P-7 as Vcc_senseo (was Vcc)a Renamed ball U-12 as RSVD (was BSEL1)i d e Renamed ball U-13 as RSVD (wasnt BSEL0) r Fixed Table linkhnol in notes of Table 4-4 i Adjusted formattingc in Sectionde 4 0.9 6/1/04 Updated tables 4-8, 4-12 i qu JW e e 0.91 7/30/04 UpdatedT POWERGOODnf information in figures 4-5, 4-6 and table JW 3-2 o R 0.92 10/22/04A Updated tableC 4-12 JW I A V D N Revision History i VIA Eden-N Processor Datasheet This page is intentionally left blank. October 22, 2004 VIA Technologies Inc. Confidential ii N D A R equired Revision History October 22, 2004 VIA Eden-N Processor Datasheet Table of Contents INTRODUCTION.................................................................................................... 1-1 1.1 DATASHEET OUTLINE ....................................................................................................................................1-1 1.2 BASIC FEATURES ...........................................................................................................................................1-2 1.3 PROCESSOR VERSIONS...................................................................................................................................1-2 1.4 COMPATIBILITY.............................................................................................................................................1-3 PROGRAMMING INTERFACE ............................................................................. 2-1 2.1 GENERAL ......................................................................................................................................................2-1 2.2 ADDITIONAL FUNCTIONS...............................................................................................................................2-3 2.3 MACHINE-SPECIFIC FUNCTIONS.....................................................................................................................2-4. 2.3.1 General ........................................................................................................................nc ............................2-4 2.3.2 Standard CPUID Instruction Functions...........................................................................................I .......2-4 2.3.3 Extended CPUID Instruction Functions........................................................................................... .......2-6 2.3.4 Centaur Extended CPUID Instruction Functions...................................................................................s .2-8 2.3.5 Processor Identification.......................................................................................................e ....................2-9 2.3.6 EDX Value after Reset..........................................................................................................gi l ...................2-9 2.3.7 Control Register 4 (CR4).......................................................................................................o a ................2-10 2.3.8 Machine-Specific Registers.....................................................................................................i d...............2-10 2.4 OMITTED FUNCTIONS ...............................................................................................................................nt re ...2-11 HARDWARE INTERFACE ....................................................................................hnol i 3-1 3.1 BUS INTERFACE...............................................................................................................................c de ..............3-1 3.1.1 Clarifications .................................................................................................................e i qu ..........................3-2 3.1.2 Omissions......................................................................................................................nf e ...........................3-2 BALL DESCRIPTION ...............................................................................................................................T ........3-3 3.2 o R 3.3 POWER MANAGEMENTA............................................................................................................................... ...3-6 3.4 TEST & DEBUG...............................................................................................................................C A ...............3-8 3.4.1 BIST ...........................................................................................................................I ..............................3-8 3.4.2 JTAG...........................................................................................................................V D .............................3-8 3.4.3 Debug Port .....................................................................................................................N .........................3-8 ELECTRICAL SPECIFICATIONS ......................................................................... 4-1 4.1 AC TIMING TABLES........................................................................................................................................4-1 4.2 DC SPECIFICATIONS.....................................................................................................................................4-11 4.2.1 Recommended Operating Conditions ....................................................................................................4-11 4.2.2 Maximum Ratings ..................................................................................................................................4-12 4.2.3 DC Characteristics ................................................................................................................................4-13 4.2.4 Power Dissipation .................................................................................................................................4-14 Table of Contents i VIA Eden-N Processor Datasheet October 22, 2004 MECHANICAL SPECIFICATIONS........................................................................ 5-1 5.1 NANOBGA PACKAGE....................................................................................................................................5-1 THERMAL SPECIFICATIONS .............................................................................. 6-1 6.1 INTRODUCTION .............................................................................................................................................6-1 6.2 TYPICAL ENVIRONMENTS ..............................................................................................................................6-1
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