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MOSFET & IC Basics – GATE Problems

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MOSFET & IC Basics – GATE Problems MOSFET & IC Basics – GATE Problems (Part - II) 1. In MOSFET devices the N-channel type is better than the P – Channel type in the following respects. (a) It has better immunity (d) It has better drive (b) It is faster capability (c) It is TTL compatible [GATE 1988: 2 Marks] Soln. In N – Channel MOSFETs the charge carriers are electrons while in P – channel MOSFETs holes are the charge carriers. The mobility of electrons is always greater than the mobility of holes. i.e. 흁풏 > 흁풑 Thus, N – Channel MOSFETs are faster Option (b) 2. In a MOSFET, the polarity of the inversion layer is the same as that of the (a) Charge on the GATE – EC – electrode (b) Minority carries in the drain (c) Majority carriers in the substrate (d) Majority carries in the source [GATE 1989: 2 Marks] Soln. In a MOSFET the polarity of inversion layer is the same as that of majority carriers in the source. For example, for N – MOSFETs the source is of N – type and inversion layer formed is of electrons. Option (d) 3. Which of the following effects can be caused by a rise in the temperature? (a) Increase in MOSFET current (IDS) (b) Increase in BJT current (IC) (c) Decrease in MOSFET current (IDS) (d) Decrease in BJT current (IC) [GATE 1990: 2 Marks] Soln. The current equation for BJT is 푰푪 = 휷 푰풃 + (ퟏ + 휷)푰푪푶 As temperature increases, the leakage current ICO increases, so the current IC increases in BJT. Since mobility decreases as temperature increases. So in MOSFETs current IDS decreases with rise in temperature Option (b) and (c) 4. When the gate – to – source voltage (VGS) of a MOSFET with threshold voltage of 400 mV, working in saturation is 900 mV, the drain current is observed to be 1 mA. Neglecting the channel width modulation effect and assuming that the MOSFET is operating at saturation, the drain current for an applied VGS of 1400 mV is (a) 0.5 mA (c) 3.5 mA (b) 2.0 mA (d) 4.0 mA [GATE 2003: 2 Marks] Soln. Given, 푽푻 = ퟒퟎퟎ 풎푽 = ퟎ. ퟒ 푽 Voltage applied at gate 푽푮푺 = ퟗퟎퟎ 풎푽 =0.9 V 푰푫푺 = ퟏ 풎푨 Find the drain current for 푽푮푺 = ퟏퟒퟎퟎ 풎푽 MOSFET is operating in saturation ퟐ 푰푫푺 = 푲 (푽푮푺 − 푽푻) 풐풓, ퟏ × ퟏퟎ−ퟑ = 푲 (ퟎ. ퟗ − ퟎ. ퟒ)ퟐ ퟏퟎ−ퟑ 푨 풐풓, 푲 = = ퟒ × ퟏퟎ−ퟑ (ퟎ.ퟓ)ퟐ 푽ퟐ For VGS = 1.4 V ퟐ 푰푫푺 = 푲 (푽푮푺 − 푽푻) = ퟒ × ퟏퟎ−ퟑ (ퟏ. ퟒ − ퟎ. ퟒ)ퟐ 푰푫푺 = ퟒ 풎푨 Option (d) 5. The drain of an n – channel MOSFET is shorted to the gate so that 푉퐺푆 = 푉퐷푆 . The threshold voltage (VT) of MOSFET is 1 V. If the drain current (ID) is 1 mA for VGS = 2 V, then for 푉퐺푆 = 3 푉, ID is (a) 2 mA (c) 9 mA (b) 3 mA (d) 4 mA [GATE 2004: 2 Marks] Soln. Given, 푽푮푺 = 푽푫푺 Then the device is in saturation. ퟐ So, 푰푫푺 = 푲 (푽푮푺 − 푽푻) For 푰푫푺 = ퟏ 풎푨 , 푽푮푺 = ퟐ푽 , 푽푻 = ퟏ푽 ퟏ = 푲 (ퟐ − ퟏ)ퟐ 풐풓, 푲 = ퟏ 풎푨⁄푽ퟐ Again, ퟐ 푰푫 = 푲 (푽푮푺 − 푽푻) For 푽푮푺 = ퟑ 푽 ퟐ 푰푫 = ퟏ × (ퟑ − ퟏ) 푰푫 = ퟒ 풎푨 Option (d) 6. An n – channel depletion MOSFET has following two points on its 퐼퐷 − 푉퐺푆 curve (i) 푉퐺푆 = 0 푎푡 퐼퐷 = 12 푚퐴 푎푛푑 (ii) 푉퐺푆 = −6 푉 푎푡 퐼퐷 = 0 Which of the following Q point will give the highest transconductance gain for small signals? (a) 푉퐺푆 = −6 푉 (c) 푉퐺푆 = 0 푉 (b) 푉퐺푆 = −3 푉 (d) 푉퐺푆 = 3 푉 [GATE 2006: 2 Marks] 휹 푰푫 Soln. Transconductance (품풎) = for 푽푫푺 = 풄풐풏풔풕풂풏풕 휹 푽푮푺 The characteristics is plotted. 푰푫(풎푨) 12mA VGS -6V 0 As ID increases VGS also increases Larger VGS will have high transconductance Thus, Option (d) 7. In the C MOS inverter circuit shown if the transconductance parameters of N MOS and P MOS transistor are 푊푛 푊푝 2 퐾푛 = 퐾푝 = 휇푛퐶푂푋 = 휇푝퐶푂푋 = 40 휇퐴⁄푉 퐿푛 퐿푝 and threshold voltages are 푉푇 = 1푉 the current I is 5 V P M O S 2 . 5 V N M O S (a) 0 A (c) 45 µA (b) 25 µA (d) 90 µA [GATE 2007: 2 Marks] Soln. Given ퟐ 푲풏 = 푲풑 = ퟒퟎ 흁푨⁄푽 푽푻 = ퟏ 푽 The device is in saturation. So the current is given by 푲 푰 = 풏 (푽 − 푽 )ퟐ 푫푺 ퟐ 푮푺 푻 ퟒퟎ ퟐ ퟐ (ퟐ. ퟓ − ퟏ) = ퟐퟎ × (ퟏ. ퟓ) = ퟒퟓ 흁푨 ퟐ Option (c) 8. Two identical N MOS transistors M1 and M2 are connected as shown below. 푉푏푖푎푠 Chosen so that both transistor are in saturation. The 휕 퐼표푢푡 equivalents 푔푚 of the pair is defined to be at constant푉표푢푡. The 휕 푉푖 equivalent 푔푚 of the pair is 푽풐풖풕 푰풐풖풕 푽풃풊풂풔 M2 푽풊 M1 (a) The sum of individual 푔푚 of two transistors. (b) The product of individual 푔푚 of the transistors. (c) Nearly equal to the 푔푚 of M1 (d) Nearly equal to 푔푚⁄푔0 of M2 [GATE 2008: 2 Marks] Soln. As per the principle of transconductance ퟏ ퟏ ퟏ = = 품풎 품풎ퟏ 품풎ퟐ 품 품 풎ퟏ 풎ퟐ 풐풓, 품풎 = ≅ 품 품 +품 풎ퟏ 풎ퟏ 풎ퟐ Option (c) 9. The measured Transconductance 푔푚 of an NMOS transistor operating in the linear region is plotted against voltage VG at a Constant drain voltage VD. Which of the following figures represents the expected dependence of 푔푚 on VG . gm (a) (b) V VG (c) (d) [GATE 2008: 2 Marks] Soln. Drain current ID in the linear region is given by 푽ퟐ 푰 = 푲 [(푽 − 푽 )푽 − 푫푺] 푫 풏 푮푺 푻 푫푺 ퟐ 흏 푰푫 풂풏풅 품풎 = = 푲풏(푽푮푺 − 푽푻)푽푫푺 흏 푽푮푺 푺풐, 품풎 ∝ 푽푮푺 So, linear characteristic Option (c) 10. Consider the following two situations about the internal conditions in an n – channel MOSFET operating in the active region. S1: The inversion charge decreases from source to drain S2 : The channel potential increases from source to drain Which of the following is correct? (a) Only S2 is true (b) Both S1 and S2 are false (c) Both S1 and S2 are true but S2 is not a reason for S1 (d) Both S1 and S2 are true and S2 is reason for S1 [GATE 2009: 2 Marks] Soln. MOSFET is also considered as gate – controlled resistor. When +ve gate voltage in an n – channel MOSFET exceeds VT, electrons are induced in p – type substrate. This channel is also connected to n+ source and drain regions. Channel looks like induced n – type resistor. With increase in gate voltage the channel becomes more conducting. The drain current increase (linear region). When more drain current flows, there is more ohmic voltage drop along the channel. The channel potential varies near zero from source to the potential at drain end. The voltage difference between gate and channel reduces from VG (near source) to (푽푮 − 푽푫) near drain. When drain bias is increased (푽푮 − 푽푫) = 푽푻, the channel is piched off. When VD increase further the drain current is in saturation. So, S1 & S2 are true and S2 is reason for S1 Option (d) (Refer: Streetman) 10 3 11. The source of a silicon (푛푖 = 10 푝푒푟 푐푚 ) n – channel MOS transistor has an area 1 sq µm and a depth of 1 µm. If the dopant density in the source is 1019/푐푚3 the no. of holes in the source region with above volume is approx. (a) 107 (c) 10 (b) 100 (d) 0 [GATE 2012: 2 Marks] Soln. Given, ퟏퟎ ퟑ 풏풊 = ퟏퟎ ⁄풄풎 푨풓풆풂 (푨) = ퟏ × ퟏퟎ−ퟏퟐ/풎ퟐ 풅풆풑풕풉 (풅) = ퟏퟎ−ퟔ 풎 푽풐풍풖풎풆 = 푨 . 풅 = ퟏ × ퟏퟎ−ퟐ × ퟏퟎퟔ 풎ퟑ −ퟏퟖ ퟑ = ퟏퟎ /풎 −ퟏퟐ ퟑ = ퟏퟎ /풄풎 ퟏퟗ ퟑ 푵푫 = 풏 = ퟏퟎ /풄풎 ퟐ ퟐퟎ 풏풊 ퟏퟎ ퟑ 풑 = = ퟏퟗ = ퟏퟎ⁄풄풎 푵푫 ퟏퟎ So, Holes in volume V is 푯 = 풑 . 푽 = ퟏퟎ−ퟏퟐ × ퟏퟎ = ퟏퟎ−ퟏퟏ Since not integer number ≅ ퟎ Option (d) 12. A depletion type N – channel MOSFET in biased in its linear region for use as a voltage controlled resistor . Assume threshold voltage 푉푇퐻 = −8 2 0.5푉 , 푉퐺푆 = 2.0푉 , 푉퐷푆 = 5푉 , 푊⁄퐿 = 100, 퐶푂푋 = 10 퐹/푐푚 and 2 휇푛 = 800 푐푚 ⁄푉 − 푠. The value of the resistance of the voltage controlled resistor (푖푛 Ω) is __________ [GATE 2014: 2 Marks] Soln. Given, Depletion type MOSFET (N – Channel) In linear region 푽푻푯 = ퟎ. ퟓ푽 푽푮푺 = ퟐ. ퟎ푽 푽푫푺 = ퟓ푽 푾/푳 = ퟏퟎퟎ −ퟖ ퟐ 푪푶푿 = ퟏퟎ 푭⁄풄풎 The value of voltage controlled resistor is given by ퟏ 풓 = 풅풔 푾 흁 푪 (푽 − 푽 ) 풏 푶푿 푳 푮푺 푻 ퟏ 풓 = 푫푺 ퟖퟎퟎ × ퟏퟎ−ퟖ × ퟏퟎퟎ[ퟐ − (−ퟎ. ퟓ)] 풓푫푺 = ퟓퟎퟎ 훀 Answer: ퟓퟎퟎ 훀 13. For the n – channel MOS transistor shown in figure, the threshold voltage VTH is 0.8V. Neglect channel length modulation effects. When the drain voltage VD = 1.6, the drain current ID was found to be 0.5 mA. If VD is adjusted to be 2V by changing the values of R and VDD, the new value of ID (in m A) is 푽푫푫 R D G S (a) 0.625 (c) 1.125 (b) 0.75 (d) 1.5 [GATE 2014: 2 Marks] Soln. Given, 푽푻푯 = ퟎ. ퟖ 푽 푽푫 = ퟏ. ퟔ 푽 푰푫 = ퟎ. ퟓ 풎푨 For the given figure we notice that Gate is connected to drain So, 푽푮푺 = 푽푫푺 = 푽푫 In saturation ID is given by ퟐ 푰푫푺 = 푲(푽푮푺 − 푽푻) ퟐ 푰푫ퟐ [푽푮푺ퟐ−푽푻] 푺풐, = ퟐ 푰푫ퟏ [푽푮푺ퟏ−푽푻] ퟐ 푰푫 (ퟐ − ퟎ.
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