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SIMD Extensions
SIMD Extensions PDF generated using the open source mwlib toolkit. See http://code.pediapress.com/ for more information. PDF generated at: Sat, 12 May 2012 17:14:46 UTC Contents Articles SIMD 1 MMX (instruction set) 6 3DNow! 8 Streaming SIMD Extensions 12 SSE2 16 SSE3 18 SSSE3 20 SSE4 22 SSE5 26 Advanced Vector Extensions 28 CVT16 instruction set 31 XOP instruction set 31 References Article Sources and Contributors 33 Image Sources, Licenses and Contributors 34 Article Licenses License 35 SIMD 1 SIMD Single instruction Multiple instruction Single data SISD MISD Multiple data SIMD MIMD Single instruction, multiple data (SIMD), is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing elements that perform the same operation on multiple data simultaneously. Thus, such machines exploit data level parallelism. History The first use of SIMD instructions was in vector supercomputers of the early 1970s such as the CDC Star-100 and the Texas Instruments ASC, which could operate on a vector of data with a single instruction. Vector processing was especially popularized by Cray in the 1970s and 1980s. Vector-processing architectures are now considered separate from SIMD machines, based on the fact that vector machines processed the vectors one word at a time through pipelined processors (though still based on a single instruction), whereas modern SIMD machines process all elements of the vector simultaneously.[1] The first era of modern SIMD machines was characterized by massively parallel processing-style supercomputers such as the Thinking Machines CM-1 and CM-2. These machines had many limited-functionality processors that would work in parallel. -
Liečba Firmy Krízovým Manažérom
SEPTEMBER- OKTÓBER 2016 Ročník VIII. Magazín o ekonomike, biznise a spoločnosti Cena: 2,20 € LIEČBA FIRMY KRÍZOVÝM MANAŽÉROM Neľahká cesta z červených do čiernych čísel Trendy a výzvy európskej logistiky Firemný blog: robte ho poriadne alebo vôbec Stalo sa, opravíte s naším poistením majetku. Poistenie majetku MÔJ DOMOV Postavte sa s odvahou všetkým nepred- vídaným situáciám, ktoré ohrozujú váš domov. Najoceňovanejšie poistenie majetku Môj domov ich za vás vyrieši rýchlo a fér. allianzsp.sk Infolinka 0800 122 222 VZDELÁVANIE Podchyťme všetky talenty, Magazín o ekonomike, biznise a spoločnosti lebo Európa ich potrebuje V deťoch sa ukrýva veľký potenciál, príliš často však zostáva nevyužitý. Registrované ako periodická tlač Ministerstvom kultúry Slovenskej To je niečo, čo si Európska únia jednoducho nemôže dovoliť: plytvanie republiky pod registračným číslom EV 3451/09, ISSN 1337-9798 ľudskými zdrojmi, ktoré robí ľudí nešťastnými a je takisto kolektívnym Vydanie september – október 2015 zlyhaním. Vydáva: Nemám pritom na mysli len nadanie na štúdium. Je načase uznať ši- Goodwill Publishing, s. r. o. rokú škálu talentu a zručností. Známe sú práce amerického výskumní- IČO: 44 635 770 LB)PXBSEB(BSEOFSB LUPSâJEFOUJmLPWBMWFĔBESVIPWJOUFMJHFODJFPE interpersonálnej po muzikálnu, od priestorovej po jazykovú, logickú Adresa redakcie: alebo intrapersonálnu. Azda všetci súhlasia s tým, že až príliš často sa GOODWILL, Nevädzová 5, 821 01 Bratislava talent hodnotí na základe pevných kritérií, ktoré neodrážajú jeho boha- UFMGBYtHPPEXJMM!HPPEXJMMFVTL tosť ani zložitosť. Musíme sa otvoriť koncepcii talentu a vidieť ďalej, za Ing. Juraj Filin študijné výsledky. Žiaľ, školy majú stále sklon sústrediť sa na úzku ideu šéfredaktor a konateľ spôsobilosti – na akademickú prácu. mMJO!HPPEXJMMFVTLtSFEBLDJB!HPPEXJMMFVTL Potrebujeme talenty pre vyššie vzdelávanie, ale aj pre oblasti odbor- tel.: 0907 78 91 64 ného vzdelávania a prípravy. -
The Economic Impact of Moore's Law: Evidence from When It Faltered
The Economic Impact of Moore’s Law: Evidence from when it faltered Neil Thompson Sloan School of Management, MIT1 Abstract “Computing performance doubles every couple of years” is the popular re- phrasing of Moore’s Law, which describes the 500,000-fold increase in the number of transistors on modern computer chips. But what impact has this 50- year expansion of the technological frontier of computing had on the productivity of firms? This paper focuses on the surprise change in chip design in the mid-2000s, when Moore’s Law faltered. No longer could it provide ever-faster processors, but instead it provided multicore ones with stagnant speeds. Using the asymmetric impacts from the changeover to multicore, this paper shows that firms that were ill-suited to this change because of their software usage were much less advantaged by later improvements from Moore’s Law. Each standard deviation in this mismatch between firm software and multicore chips cost them 0.5-0.7pp in yearly total factor productivity growth. These losses are permanent, and without adaptation would reflect a lower long-term growth rate for these firms. These findings may help explain larger observed declines in the productivity growth of users of information technology. 1 I would like to thank my PhD advisors David Mowery, Lee Fleming, Brian Wright and Bronwyn Hall for excellent support and advice over the years. Thanks also to Philip Stark for his statistical guidance. This work would not have been possible without the help of computer scientists Horst Simon (Lawrence Berkeley National Lab) and Jim Demmel, Kurt Keutzer, and Dave Patterson in the Berkeley Parallel Computing Lab, I gratefully acknowledge their overall guidance, their help with the Berkeley Software Parallelism Survey and their hospitality in letting me be part of their lab. -
Curtiss-Wright to Display Rugged COTS Modules and System Solutions at Intel Developer Forum 2016
NEWS RELEASE FOR IMMEDIATE RELEASE Contact: John Wranovics (925) 640-6402 Curtiss-Wright to Display Rugged COTS Modules and System Solutions at Intel Developer Forum 2016 INTEL DEVELOPER FORUM 2016 (IDF16) – SAN FRANCISCO, Calif. (Booth #329) – August 16-18, 2016 – Curtiss-Wright’s Defense Solutions division will highlight its industry-leading open architecture rugged commercial-off-the-shelf (COTS) processing modules and subsystems along with its OpenHPEC™ Accelerator Suite of High Performance Embedded Computing (HPEC) software development tools for the aerospace and defense market at Intel Developer Forum 2016 San Francisco (IDF16: Booth #329). Featured will be demonstrations of glass cockpit applications running on rugged Intel processing modules and the industry’s first VITA 48.8-compliant Air Flow Through (AFT) rugged OpenVPX™ chassis. Curtiss-Wright will also display its Intel® Xeon® processor D-based 3U VPX CHAMP-XD1 and 6U VPX CHAMP-XD2 Digital Signal Processor (DSP) modules, which bring supercomputing-class processing to very compute-intensive C4ISR aerospace and defense applications such as radar processing, Signal Intelligence (SIGINT), and Electronic Warfare (EW). The broad range of Intel-based rugged COTS solutions displayed will include: Rugged Single Board Computer and DSP Modules: 3U VPX and XMC Mobile Xeon processor E3 v5 Modules: At IDF16 Curtiss-Wright is introducing two new small form factor COTS Single Board Computers (SBCs) based on Intel’s latest generation Mobile Xeon processor E3 v5 (formerly known as “Skylake-H”). The new rugged modules, the 3U OpenVPX™ VPX3-1220 and XMC-121 XMC processor mezzanine card, feature a low-power version of the Xeon processor to provide high performance quad-core x86 processing with integrated graphics at typically 50% the power levels of previous solutions. -
Upgrading and Repairing Pcs, 21St Edition Editor-In-Chief Greg Wiegand Copyright © 2013 by Pearson Education, Inc
Contents at a Glance Introduction 1 1 Development of the PC 5 2 PC Components, Features, and System Design 19 3 Processor Types and Specifications 29 4 Motherboards and Buses 155 5 BIOS 263 UPGRADING 6 Memory 325 7 The ATA/IDE Interface 377 AND 8 Magnetic Storage Principles 439 9 Hard Disk Storage 461 REPAIRING PCs 10 Flash and Removable Storage 507 21st Edition 11 Optical Storage 525 12 Video Hardware 609 13 Audio Hardware 679 14 External I/O Interfaces 703 15 Input Devices 739 16 Internet Connectivity 775 17 Local Area Networking 799 18 Power Supplies 845 19 Building or Upgrading Systems 929 20 PC Diagnostics, Testing, and Maintenance 975 Index 1035 Scott Mueller 800 East 96th Street, Indianapolis, Indiana 46240 Upgrading.indb i 2/15/13 10:33 AM Upgrading and Repairing PCs, 21st Edition Editor-in-Chief Greg Wiegand Copyright © 2013 by Pearson Education, Inc. Acquisitions Editor All rights reserved. No part of this book shall be reproduced, stored in a retrieval Rick Kughen system, or transmitted by any means, electronic, mechanical, photocopying, Development Editor recording, or otherwise, without written permission from the publisher. No patent Todd Brakke liability is assumed with respect to the use of the information contained herein. Managing Editor Although every precaution has been taken in the preparation of this book, the Sandra Schroeder publisher and author assume no responsibility for errors or omissions. Nor is any Project Editor liability assumed for damages resulting from the use of the information contained Mandie Frank herein. Copy Editor ISBN-13: 978-0-7897-5000-6 Sheri Cain ISBN-10: 0-7897-5000-7 Indexer Library of Congress Cataloging-in-Publication Data in on file. -
Intel® Technology Journal the Original 45Nm Intel Core™ Microarchitecture
Volume 12 Issue 03 Published October 2008 ISSN 1535-864X DOI: 10.1535/itj.1203 Intel® Technology Journal The Original 45nm Intel Core™ Microarchitecture Intel Technology Journal Q3’08 (Volume 12, Issue 3) focuses on Intel® Processors Based on the Original 45nm Intel Core™ Microarchitecture: The First Tick in Intel’s new Architecture and Silicon “Tick-Tock” Cadence The Technical Challenges of Transitioning Original 45nm Intel® Core™ 2 Processor Performance Intel® PRO/Wireless Solutions to a Half-Mini Card Power Management Enhancements Greater Mobility Through Lower Power in the 45nm Intel® Core™ Microarchitecture Improvements in the Intel® Core™ 2 Penryn Processor Family Architecture Power Improvements on 2008 Desktop Platforms and Microarchitecture Mobility Thin and Small Form-Factor Packaging for Intel® Processors Based on Original 45nm The First Six-Core Intel® Xeon™ Microprocessor Intel Core™ Microarchitecture More information, including current and past issues of Intel Technology Journal, can be found at: http://developer.intel.com/technology/itj/index.htm Volume 12 Issue 03 Published October 2008 ISSN 1535-864X DOI: 10.1535/itj.1203 Intel® Technology Journal The Original 45nm Intel Core™ Microarchitecture Articles Preface iii Foreword v Technical Reviewers vii Original 45nm Intel® Core™ 2 Processor Performance 157 Power Management Enhancements in the 45nm Intel® Core™ Microarchitecture 169 Improvements in the Intel® Core™ 2 Penryn Processor Family Architecture 179 and Microarchitecture Mobility Thin and Small Form-Factor Packaging -
New Intel-Powered Classmate Pc Design
Intel Corporation 2200 Mission College Blvd. P.O. Box 58119 Santa Clara, CA 95052-8119 News Fact Sheet CONTACTS: Agnes Kwan Nor Badron 408-398-2573 +86 21 5460-4510 ext 2228 [email protected] [email protected] INTEL PROVIDES SNEAK PEEK OF NEW INTEL-POWERED CLASSMATE PC DESIGN INTEL DEVELOPER FORUM, San Francisco, Aug. 20, 2008 – Intel is expanding its offerings for the Intel-powered classmate PC category by introducing a design that has tablet, touch screen and motion-sensing interaction features. There are a vast number of different education needs among the 1.3 billion students in the world; the new classmate PC design aims to create more choices to meet these varying learning needs. “Understanding that there is no one-size-fits-all when it comes to education, we are passionate about transforming the way students learn,” said Lila Ibrahim, general manager of Intel’s Emerging Markets Platform Group. “We want to offer more choices to meet the diversity of student learning needs across the world. “Our ethnographic research has shown us that students responded well to tablet and touch screen technology,” Ibrahim added. “The creativity, interactivity and user-friendliness of the new design will enhance the learning experiences for these children. This is important for both emerging and mature markets where technology is increasing being seen as a key tool in encouraging learning and facilitating teaching.” New Design, Same Philosophy The new design is based on findings from ethnographic research and pilots from the past two years. The research pointed out that students naturally collaborate to learn in groups, and – more – Intel/Page 2 they will benefit from the mobility and flexibility of notebooks versus being tethered to their desks. -
AI Chips: What They Are and Why They Matter
APRIL 2020 AI Chips: What They Are and Why They Matter An AI Chips Reference AUTHORS Saif M. Khan Alexander Mann Table of Contents Introduction and Summary 3 The Laws of Chip Innovation 7 Transistor Shrinkage: Moore’s Law 7 Efficiency and Speed Improvements 8 Increasing Transistor Density Unlocks Improved Designs for Efficiency and Speed 9 Transistor Design is Reaching Fundamental Size Limits 10 The Slowing of Moore’s Law and the Decline of General-Purpose Chips 10 The Economies of Scale of General-Purpose Chips 10 Costs are Increasing Faster than the Semiconductor Market 11 The Semiconductor Industry’s Growth Rate is Unlikely to Increase 14 Chip Improvements as Moore’s Law Slows 15 Transistor Improvements Continue, but are Slowing 16 Improved Transistor Density Enables Specialization 18 The AI Chip Zoo 19 AI Chip Types 20 AI Chip Benchmarks 22 The Value of State-of-the-Art AI Chips 23 The Efficiency of State-of-the-Art AI Chips Translates into Cost-Effectiveness 23 Compute-Intensive AI Algorithms are Bottlenecked by Chip Costs and Speed 26 U.S. and Chinese AI Chips and Implications for National Competitiveness 27 Appendix A: Basics of Semiconductors and Chips 31 Appendix B: How AI Chips Work 33 Parallel Computing 33 Low-Precision Computing 34 Memory Optimization 35 Domain-Specific Languages 36 Appendix C: AI Chip Benchmarking Studies 37 Appendix D: Chip Economics Model 39 Chip Transistor Density, Design Costs, and Energy Costs 40 Foundry, Assembly, Test and Packaging Costs 41 Acknowledgments 44 Center for Security and Emerging Technology | 2 Introduction and Summary Artificial intelligence will play an important role in national and international security in the years to come. -
Asuspro B9440 Business Notebook the World's Lightest 14
ASUS recommends Windows 10 Pro. ASUSPRO B9440 BUSINESS NOTEBOOK THE WORLD’S LIGHTEST 14” BUSINESS NOTEBOOK. The ASUSPRO B9440 offers what modern managers need for the maximum computing performance anytime and anywhere in the world. Weighing just 1 Kg, it is the world’s lightest 14” business notebook with enterprise durability and is MIL-STD 810G graded. TRAVEL EASY WITH NO WORRIES. on-the-go. The ultra-narrow bezel of 5.4mm wide at the top and on both sides of the notebook also provides the advantage of a wide 14” screen Business travel is made easy with this world’s lightest 14” business but with an overall size which is smaller than conventional 13” notebooks. notebook. Not to mention the notebook’s ultra-compact design’s footprint which is no larger than many 13” notebooks making it ultra-convenient The slim, ergonomic and spill-resistant keyboard is designed with a tilting to carry or work while on-the-go. angle, featuring a tilting hinge mechanism, which allows the keyboard to shift to the optimum angle for the ideal typing position each time the Heavy duty robustness is critical for any business notebook and the notebook is opened. The sculpted keycaps along with its long 1.5mm ASUSPRO B9440 is built with enterprise durability in a tough all-metal travel distance on the glass-covered backlit keyboard also give a much chassis crafted from Magnesium alloy. It is also MIL-STD 810G graded more comfortable user experience. and has passed the stringent reliability standards of ASUSPRO to ensure the dependable operation for the notebook in any environment. -
New Centrino Tech Headed for Desktops, Too 11 May 2007
New Centrino Tech Headed for Desktops, Too 11 May 2007 Part of the significance of Intel's new mobile It's all part of a paradigm shift from static hardware platform is that it will also allow manufacturers to to mobility in the PC industry, according to IDC design newer, more powerful, smaller form factor analyst, Richard Shim. "It's a very telling tale of the desktop PCs as well. times," he said, referring to what's now known as mobile on desktop movement (MoDT) - or what Intel has long expressed interest in developing some IDC analysts call "mobile attrition." products for a broad range of computing devices. While the new Centrino Duo and Pro will be "Back in the day, it was desktop parts used in primarily used for notebooks, Claudine Mangano, mobile platforms," Shim explained. "That was in an Intel spokeswoman, confirmed that aspects of order to get to certain price points." the next-generation mobile technology will also find their way into smaller, cooler, and quieter desktops But as the world shifts to mobility, the industry is very soon. now seeing the dominance of notebooks, Shim said. Because manufacturers are getting into "…These new desktop systems will not brand or thinner and thinner designs and having to deal with use 'Centrino Duo' per se, but [use] a combination thermal issues, using mobile technology in desktop of the new mobile technologies," Mangano said, PCs is beginning to make more and more sense - such as the processor, chipset, and other optional especially when one considers today's favorable components. -
Ram K. Krishnamurthy Senior Principal Engineer
High Performance Energy Efficient Near Threshold Circuits: Challenges and Opportunities 2012 MICRO Near Threshold Computing Workshop Keynote December 2012 Ram K. Krishnamurthy Senior Principal Engineer Circuits Research Lab, Circuits & Systems Research, Intel Labs Intel Corporation, Hillsboro, OR 97124, USA [email protected] Acknowledgements: Intel Circuits Research Lab, Vivek De, Rick Forand, Wen-Hann Wang, Shekhar Borkar, Greg Taylor, IPR Bangalore Design Lab, Stefan Rusu, Jim Held Era of Tera-scale Computing Teraflops of performance operating on Terabytes of data Entertainment, learning and virtual travel Model-based Apps Recognition TIPS Financial Analytics Mining Synthesis Models GIPS Personal Media Creation and 3D & Management Video Mult- Terascale Performance MIPS Media Multi-core Text KIPS Single-core Health Kilobytes Megabytes Gigabytes Terabytes Dataset Size 2 Tera-scale Platform Vision Special Integrated IO Cache Cache Cache Purpose Engines devices Scalable On-die Interconnect Fabric Last Level Last Level Last Level Integrated Off Die Cache Cache Cache Memory Controllers interconnect Socket High Bandwidth IO Inter- Memory Connect 3 Silicon Process Technology Innovation 65nm 45nm 32nm 22nm 14nm 10nm 7nm 2005 2007 2009 2011 2013 * 2015 * 2017 * 2019+ MANUFACTURING DEVELOPMENT RESEARCH Hi-K Tri-Gate *projected Process innovation leads to energy efficient performance and predictable 2-year technology cycles 4 22nm Performance and Energy Scaling 5 M. Bohr, Intel Developer Forum 2012 Silicon Integration Providing Greater End-User Value • More transistors/area: enables substantial system-on-chip integration opportunities Extreme Scale (Exa-Scale) Computing Research 2W – 100 GigaFLOPS 20MW - ExaFLOPS 10 year goal: ~300X Improvement in energy efficiency Equal to 20 pJ/FLOP at the system level J. -
Unpacking the Intel Unleashed Video
Apr. 2, 2021 Unpacking the Intel Unleashed Video By Jean S. Bozman Intel CEO Pat Gelsinger packed a lot of information into the Intel Unleashed – Engineering the Future video. Packed into the first 11 minutes of the Intel Unleashed presentation is a wide-ranging vision of a new and emerging pattern for Intel investments, partnerships and product focus. Clearly, the company is making deep investments in its manufacturing capacity in the U.S. and Europe – starting with a $20 billion commitment to fund two new manufacturing facilities in Arizona. The sites will support commercial and government demand for semiconductor customization, while adding capacity in the U.S. and Europe. The investment in manufacturing sites is bound to get deeper, because Intel’s plans to build more foundry sites will be announced next year. Beyond that, the design philosophy for Intel is changing, moving from SOC point- products (system-on-chip) to flexible platforms (system on package, or SoP) that can, and will, add functionality, as customer requirements from Intel’s OEMs and partners change. This approach will shorten product design cycles, and get new systems into production faster than before. Looking Ahead The Intel ecosystem is morphing – opening a global foundry business, even as Intel products continue to compete across many market segments, including semiconductors and memory. Some would even call it a co-opetition model. With $77.9 billion in FY2020 Intel revenue, Intel plans to grow its top-line revenue through longtime partnerships with hardware OEMs – and with new customers based on the newly announced Intel Foundry Services business.