Summer 2007 PC/104 and Small Form Factors ©2007 Opensystems Publishing

y nl t O rin e P gl in r S Fo

Volume 11 • Number 3

COLUMNS FEATURES 8 Focus on Form Factors HARDWARE: Big trends in small SBCs CompactRIO: shift for embedded system design By Todd Dobberstein 12 PC/104: making room for greater performance 10 European Technology By Steve Potocny and Cliff Moon, Kontron America On the way to sports, boards, and boats By Hermann Strass 16 Designing a marine control and HMIy computer 46 Editor’s Insight By Kjell Brunberg, Hectronic l Hello PC/104 Consortium? We’ve gotta talk n By Chris A. Ciufo O TECHNOLOGY: t Graphics solutions DEPARTMENTS 20 Multimedia,n not just graphics, display capability By iManish Singh, Genesis Microchip 36 Editor’s Choice Products r By Don Dingee P26 Network display technology breaks through 42 New Products VGA/DVI limitations By Chad Lumsden e gl By Jason Slaughter, DisplayLink in E-CASTS SPECIAL: Driving flat panels S 30 Connecting flat panels with the Embedded Panel Interface IMS and IP network r By Martin Danzer, congatec August 15, 2 p.m. EST o Software-definedF radio: what you need to know August 21, 2 p.m. EST PRODUCT GUIDE www.opensystems-publishing.com/ecast 38 Nonbackplane SBCs

EVENTS Freescale Technology Forum June 25-28 • Orlando, FL E-LETTER www.freescale.com Summer: www.smallformfactors.com/eletter  Getting off the bus to expand I/O On the cover: By Earle Foster, Sealevel Systems Small Form Factor (SFF) modules such as PC/104 and many others form the core of various consumer appliances like this airport kiosk used in the iPoint Travel Network  VIA Pico-ITX form factor: “small is beautiful” (a collaboration of Clear Channel Airports and Impart Media Group). The embedded By VIA Technologies electronics need to provide PC-like capabilities, including networking, human-machine interface, and most importantly, eye-popping graphics. In this month’s issue, we feature a bevy of articles relating SFFs to graphics, imaging, and displays. (Image courtesy of Impart Media Group, www.impartmedia.com.) WEB RESOURCES Subscribe to the magazine or E-letter at: www.opensystems-publishing.com/subscriptions Industry news: Published by: OpenSystems Publishing™ Read: www.smallformfactors.com/news Submit: www.opensystems-publishing.com/news/submit © 2007 OpenSystems Publishing © 2007 PC/104 and Small Form Factors All registered brands and trademarks in PC/104 and Small Form Factors are property of their respective owners. Submit new products at: www.opensystems-publishing.com/vendors/submissions/np / Summer 2007 PC/104 and Small Form Factors ©2007 OpenSystems Publishing. Not for distribution. y nl t O rin e P gl in r S Fo

©2007 OpenSystems Publishing. Not for distribution. A n O p e n S y s t e m s P u b l i c a t i o n Military & Aerospace Group n DSP-FPGA.com Resource Guide n DSP-FPGA.com n DSP-FPGA.com E-letter n Military Embedded Systems n Military Embedded Systems E-letter n PC/104 and Small Form Factors n PC/104 and Small Form Factors E-letter n PC/104 and Small Form Factors Resource Guide n VME and Critical Systems n VME and Critical Systems E-letter Group Editorial Director Chris Ciufo [email protected] Contributing Editor Don Dingee [email protected] Associate Editor Jennifer Hesse [email protected] Senior Editor (columns) Terri Thorson O [email protected] Assistantt Editor Sharon Schnakenburg nCopy Editor Robin DiPerna Europeani Representative Hermann Strass r [email protected] P Art Director Steph Sweet Senior Web Developer Konrad Witte e Graphic Specialist David Diomede RSC# 01 @ www.smallformfactors.com/rsc l Circulation/Office Manager Phyllis Thompson g [email protected]

n OpenSystems i Publishing™ OpenSystems Publishing S Editorial/Production office: r 16872 E. Ave. of the Fountains, Ste 203 Fountain Hills, AZ 85268 o Tel: 480-967-5581 n Fax: 480-837-6466 F Website: www.opensystems-publishing.com Publishers John Black, Michael Hopper, Wayne Kristoff Vice President Editorial Rosemary Kristoff Communications Group Editorial Director Joe Pavlat Assistant Managing Editor Anne Fisher Senior Editor (columns) Terri Thorson Technology Editor Curt Schwaderer European Representative Hermann Strass Embedded and Test & Analysis Group Editorial Director Jerry Gipper Editorial Director Don Dingee Technical Editor Chad Lumsden Associate Editor Jennifer Hesse Special Projects Editor Bob Stasonis European Representative Hermann Strass

ISSN Print 1096-9764, ISSN Online 1550-0373 Publication Agreement Number: 40048627 Canada return address: WDS, Station A, PO Box 54, Windsor, ON N9A 615 PC/104 and Small Form Factors is published five times a year by OpenSystems Publishing LLC, 30233 Jefferson Ave., St. Clair Shores, MI 48082. Subscriptions are free upon request to persons interested in PC/104 and other small form factor single board computer technology. For others inside the US and Canada, subscriptions are $35/year. For 1st class delivery outside the US and Canada, subscriptions are $50/year (advance payment in US funds required). POSTMASTER: Send address changes to PC104 and Small Form Factors RSC# 02 @ www.smallformfactors.com/rsc 16872 E. Ave. of the Fountains, Ste 203, Fountain Hills, AZ 85268

RSC# @ www.smallformfactors.com/rsc ©2007 OpenSystems Publishing. Not for distribution. Primary target applications: In-vehicle data acquisition, data logging, and control; machine condition monitoring and protection; embedded system prototyping; + high-speed machine control; custom multiaxis motion control; batch and discrete control Sponsors: National Instruments Year of specification release: 2004 Year of latest major update: 2007, new real-time controllers with 400 MHz Freescale MPC5200 real-time processor and Wind River’s VxWorks RTOS y Design and product information: www.ni.com/compactrio l Dimensions: n 4-slot system: 179.6 mm x 88.1 mm x 88.1 mm O (7.07" x 3.47" x 3.47") t 8-slot system: 274 mm x 88.1 mm x 88.1 mm (10.79" x 3.47" x 3.47") in Mounting: r n Screw mounting holes in chassis P n Panel, DIN-rail, and rack-mounting options Power input: le 9-35 Vdc on power-up, 6-35 Vdc during operation g Real-time controller features: n n 10/100BASE-T Ethernet port with built-in FTP/HTTPi servers and LabVIEW remote panel Web server S CompactRIO: shift for embedded system design n Full-speed USB host port for USB-based storage media r By Todd Dobberstein n Up to 2 GB of nonvolatile DiskOnChip storage n o CompactRIO product manager, National Instruments RS-232 serial port for peripheral devices F CompactRIO is an advanced embedded control and data acquisition system I/O modules feature direct connectivity to sensors and actuators, with designed for applications that require high performance and reliability. connection options including screw terminal, spring terminal, BNC, and With the system’s open architecture, small size, extreme ruggedness, and D-Sub connectors. An SD card module with two card slots for up to flexibility, engineers and embedded developers can use COTS hardware 4 GB of storage per module is available. Customers also can design to quickly build custom embedded systems. CompactRIO is powered and build custom I/O modules. by National Instruments LabVIEW FPGA and LabVIEW Real-Time technologies, giving engineers the ability to quickly design, program, and customize the CompactRIO embedded system with easy-to-use graphical programming tools for industries such as automotive, mil/aero, industrial and machine control, and embedded systems prototyping.

CompactRIO combines a unique system architecture including an embedded real-time processor, high-performance FPGA, and hot-swappable I/O modules. The I/O modules contain built-in isolation, signal condition- ing, and connectivity and are connected directly to the embedded FPGA. Because each module is independently connected to the FPGA, engineers and designers can use the FPGA to perform custom timing, digital processing, and control on a per-module basis. CompactRIO rugged specifications: n -40 °C to +70 °C (-40 °F to +158 °F) operating temperature Both the real-time processor and FPGA are programmable with graphical n Up to 2,300 Vrms isolation (withstand) LabVIEW tools. While built-in graphical function blocks perform integer- based (FPGA) and floating-point (real-time processor) analysis, processing, n 50 g shock rating and control within LabVIEW, data mechanisms transfer data between I/O n International safety, EMC, and environmental certifications modules, the FPGA, and the real-time processor. Users can also leverage n Class I, Division 2 rating for hazardous locations and integrate existing C/C++ code on the real- n Dual 9-35 Vdc supply inputs, low power consumption time processor and VHDL code on the FPGA (7-10 W typical) within their LabVIEW code.

Small Form Factors (SFFs), which took event. Lane and direction signaling must 674 exhibitors displayed their products center stage earlier this year at one of the be coordinated with available parking and production processes to more than biggest trade shows in Europe, are stepping lots, freeway interchanges, and other 24,000 visitors from many countries. One up to handle tasks both large, such as steer- traffic variables to avoid congestion and of the highlights was a live production, ing soccer-frenzied drivers through traffic, accidents. packaging, and assembly line. At the end of and small, such as cooling components in the line, fully assembled SFF boards (two a radio-controlled model speedboat. The master computer operates like a soft boards on one lPCB)y were produced (see Programmable Logic Control (PLC) com- Figure 1,n courtesy of Technology Consult- Area of Sports puter system to provide the required level ing, Germany). TCI GmbH, Germany, has supplied a of safety. The A19 industrial computer O road traffic control system to the Area system from TCI was selected because itt of Sports stadium, home of the Borussia is very robust (IP65) and compact. Table 1 Moenchengladbach soccer club, located defines the safety requirements ioutlinedn in western Germany close to the Dutch under Ingress Protection 67 inr accordance and Belgian borders. Soccer, which is with the international standardP IEC 60529. called football outside the United States, is the most popular sport in Europe and An outdoorl racke enclosure mounts the South America, drawing the largest large 19-inch touch panel, which is avail- crowds compared to any other athletic able ing a stainless steel version. The ther- event. For this reason, controlling car inmally preconditioned, antireflective glass traffic to and from stadiums is a very panel protects the display and electronics critical application. Football fans Shave from water and dust. The optimized traffic their minds on their teams’ performance,r control software reduces unnecessary and thus pay less attentiono to the car traffic searches, saves energy, and mini- ahead, changing signals, or traffic signs. mizes environmental pollution while Borussia, which wonF many German and providing quick entrance and exit before European championships in the past, is and after an event. Figure 1 currently at the lower end of the premier league, making their fans even more con- TCI operates an in-house ElectroMagnetic cerned with the team and less aware of Interference (EMI) lab to guarantee maxi- The boards contained components down the world around them. mum immunity against RF emission from to 0.01" x 0.005", embedded capacitors, other devices and avoidance of RF emis- coils, ICs and switches, quad flat packs, Signalbau Huber GmbH, one of the larg- sion. Automatic EMI testing and recording quad flat no-leads, integrated sensors, est traffic control equipment providers in of test results also includes temperature bonded chips (chip-on-chip and chip-on- Europe, has planned the traffic control testing in a climate-controlled tempera- board), and stacked components, all of system at the Area of Sports. TCI sup- ture chamber. which were inserted, soldered (lead-free), plied the Pentium M-based SFF industrial assembled, and tested using automatic computers, which consist of a central SMT/Hybrid/Packaging 2007 optical inspection. Buried passive com- panel PC and six satellite PCs. Brodersen The well-attended System Integration in ponents (not visible in Figure 1), die- Automation, Germany, programmed the Micro Electronics Exhibition & Confer- attached components, and inline wire traffic control and visualization system ence is Europe’s largest event of its kind. bonds were also mounted on the boards, with software that allocates multilane At this year’s show, which took place and special housing components were traffic differently before and after a major April 24-26 in Nuernberg, Germany, used in the boards’ production. Eleven

Digit Protection Hazard Tested Meaning 6 = 1st digit Against small solid objects Dust-tight (totally protected Dust chamber with under-pressure Accidental touch by small wire against dust) 5 = 2nd digit Against liquids Jetting 6.3 mm diameter nozzle from 2.5 m to Low-pressure water jets from all 3 m distance, 12.5 l/min. for 3 minutes directions, limited ingress Table 1

10 / Summer 2007 PC/104 and Small Form Factors ©2007 OpenSystems Publishing. Not for distribution. The optimized was patented in 1999. One application feet. These feet were actually thermal vias example – cooling hot components, mostly into the inner layer of the multilayer board, traffic control at the power amplifier stage on the control which had the water pipes etched out. This software reduces board for an electrically powered radio- type of computer application uses an inert controlled model speedboat – has won fluid and a closed system with a small unnecessary traffic several competitions. A water flow of pump and heat exchanger or externally only 20 ml/minute through an FR4 PCB supplied cooling liquid. searches, saves substrate dissipates about 30 W of heat energy. In this speedboat application, water For more information, contact Hermann energy, and minimizes from a lake was filtered but otherwise left at [email protected]. environmental unchanged, then pressed through the pipes in the PCB onto the cooling plate’s wet pollution while providing quick entrance and exit before and after y an event. nl companies on the production line and O 17 additional companies and institutes t contributed equipment to this demon- n stration. ri Exhibitors showed several types of 3D P components, some mounted on SFF boards including sensors, interconnect- le ing 3D circuit traces, and bionic sensors with fluidic interfaces. The fluidic chan- g nels let blood or other biological fluids in flow through and past electronic sensors for real-time analysis. r S ILFA, Germany, presentedo its award- winning PCBs, which may have built-in tunnels for coolingF liquid or compressed air between the layers of regular multilayer PCBs. The ILFAcool technology

RSC# 1101 @ www.smallformfactors.com/rsc RSC# 1102 @ www.smallformfactors.com/rsc

By Steve Potocny and Cliff Moon

Today’s x86 processors can indeed fit into PC/104 footprints with proper care and feeding. Kontron shares their perspective on working independently. Many processors feature with past and present Intel processor technology within the limitations of thermal diodes, thermistors, or thermo- PC/104 and calls for continued adaptation in the standard to embrace couples in addition to thermal control PCI Express (PCIe). circuitry, detecting temperature variations and reacting before the system degrades or overheats. Instead of simply shutting Since the release of its first specification and high level of relative performance down or slowing, newer processors sup- in 1992, the PC/104 form factor has been such processors offered because they had port sophisticated algorithms in an effort growing in popularity, with embedded no way to dissipate processor power on the to dynamically change the chip’s thermal systems architects continually pushing small board or within the system. behavior. It is desirable that this operation the limits of PC/104 designs. More than be transparent lto ythe user, maintaining a a decade ago, the technology presented At the same time, user demands contin- comparablen level of system performance challenges with regard to fitting Intel 486 ued to multiply along with the growth of and noise. processors – then much larger, slower, embedded computing. Given consumers’ O and consuming less power – onto a small increasing dependence on mobile elec-t When designing a system, it is important board. tronics and the attention this has brought to consider the thermal and mechanical to hardware designers, it is foreseeablein implications of each processor package In contrast, the technology available today that mobile technology advancementsr type. Pin, land, and ball grid arrays have forces designers to be creative in populat- will transfer to embeddedP computing. been standard during the past several ing the tight space with numerous small The range of system applications will years. Land grid arrays are more rugged components, many of which consume far continue to lexpande because designers will prior to installation because the danger of more power than the previous generations. have more hardware options to include in bending or otherwise damaging a pin is As personal and industrial computing con- compactg systems. transferred to the less expensive board, tinues to raise the bar for users, embedded in though this arrangement comes with the computing solutions are expected to oper- Thermal and mechanical cost of operating temperature limitations. ate at a similar level, incorporating the Slatest considerations Pin arrays typically are composed of x86 processors for comparabler graphics Naturally, faster clock rates, graphics ceramic or thermally superior plastic. and data processing. o processing, and memory transfers increase switching and require more power. Hot Especially in the case of ball grid arrays, This can be dauntingF to a designer who operating environments lead to lower ensuring reliable contact between the now faces power-management challenges performance, making cooling a critical chip and board as well as the chip and in addition to new mechanical, thermal, design consideration. In a race for the its cooling device can lead to more and electrical considerations. Incorporat- fastest processor in the Pentium D age, stringent board flatness requirements. ing the latest x86 processors and emerging power consumption in some designs has As the environmental implications of bus types in PC/104 CPU boards offers risen to as much as 15 times the 8 W of manufacturing, assembly, and electronics tremendous potential for unprecedented popular 400 MHz processors. In addi- use become more visible worldwide, performance, but many factors must be tion to hot processors, it has been notably RoHS has convinced many companies addressed in the initial design phase. difficult to control graphics chips’ ther- to eliminate lead-based solder and other mal behavior. The dilemma of cooling harmful chemicals from use. This means Facing the wall both of these large, older components, the method of attachment for computing It is well known that no universal comput- especially those with less efficient power components will introduce additional ing solution exists, but rather each appli- consumption, has been compounded with variables to mechanical and thermal cation is accompanied with a unique set the 0.6" height requirement of PC/104. design considerations. of system requirements. Thus, peripheral An example of a Pentium M PC/104-Plus speed and bandwidth considerations are SBC, the Kontron MOPS-PM, is pictured necessary throughout all stages of sys- in Figure 1. tem design. Graphics applications today require more processing power than ever Passive cooling has not provided an ade- before, whereas data-intensive applica- quate solution in most cases, and active tions require greater bandwidth and lower cooling methods have continued to evolve latency. As processors such as Intel’s and address the thermal challenges of Pentium D became faster and consequently PC/104 systems. Advanced Configuration hotter and more power-hungry, PC/104 and Power Interface (ACPI) has provided designers ran into a wall of sorts. They the industry with guidance to power could not take full advantage of the speed management, which has been improved Figure 1

12 / Summer 2007 PC/104 and Small Form Factors ©2007 OpenSystems Publishing. Not for distribution. Next wave: Intel Core 2 Duo Processor designers have been hard at work to solve some of the problems faced by designers who want to push the enve- lope with unprecedented performance in small form factor systems. Pentium desktop processors required up to 130 W, an unmanageable figure for PC/104 and other similar form factors such as EPIC. The demand for reduced power and con- sistently improving performance in small packages is no longer unreasonable, but instead is recognized as an important factor in the definition of future computing and thus the parameters of processor design. Introduction of Intel’s Core line of processors shifted the design goal from increasing clock rates to maximizing resource utilization efficiency. Much of the power reduction comes from inte- grating intelligent thermal control within ly the processor, as accomplished with n SpeedStep in the earlier Pentium M processors. The result is a line of processors O incredibly well suited for the embedded t environment. in The Intel Core 2 Duo (Figure 2) at least r halves the thermal footprint of the Pentium P with new models achieving as low as 17 W with lower supply voltage and a le reduced core speed option. Instead of re- maining powered, an adaptive monitoring g system allows voltage and core frequency in to be adjusted dynamically. Power is only applied where it is necessary, and S the frequency is adjusted to matchr the application requirements. Ino fact, the tremendous power savings from implementing such schemes resultF in a minimal loss of performance compared to previous designs that allowed for either maximal performance through maximal power or minimal power consumption that resulted in minimal performance.

The Core 2 Duo employs two thermal sensors that continually monitor each core’s temperature and provide key inputs used by the power-management policies and chipset to set the fan speed. Processes can switch execution seamlessly between

RSC# 13 @ www.smallformfactors.com/rsc Figure 2

cores and run in a way that maintains uniformity in the chip temperature. This improvement in power utilization ensures “Whether overcoming optimal system performance and extends the processor’s lifetime. the processor barrier

Multiple core processors can bring many with a custom solution or advantages. Intel is introducing dual cores with its new 65 nm process, and incorporating a powerhouse quad cores are following quickly with from the Intel Core product 45 nm and smaller processes. These new processes allow for multiple cores to line, current drawbacks of reside in the same size packages used by previous designs while making room for PC/104, such as ISA and additional features. Board space is then free for more memory and other inter- PCI bus interfaces’ inherent faces, potentially reducing the number of speed limitations, must be boards needed in a system. ly addressedn to balance the In addition to being designed for multi- tasking and multithreading, today’s pro- O system design.” cessors have faster front side buses andt can handle 128 bits of information at once, redefining computing capabilitiesin for processor-intensive applications.r PC/104 has been a popular form factor for Cache and memory Pmanagement are use in environments that require rugged implemented with maximal efficiency, hardware and high reliability for maxi- pre-fetchingl datae to a single location for mal uptime where repair or replacement use by either core. Designers may choose may not be possible. Space constraints from ga variety of chipsets for optimal and suitability for low-power applica- inperformance in data- or graphics-intensive tions have created a niche for PC/104 in applications. applications that would not require game- S quality graphics processing, though that is r PC/104 adaptability by no means the extent to which the size of o Many designers have been tempted to PC/104 makes it desirable. The military, stray from x86 in favor of custom pro- aerospace, and medical industries are F cessors that deliver more speed for less especially interested in using PC/104 power. While that may be a solution for systems in signal, image, and data- custom applications, the capabilities of processing applications, particularly with the system remain only as good as the real-time processing and data transfer. interface by which it operates. Whether overcoming the processor barrier with At 33 MHz, the PCI bus lacks more than a custom solution or incorporating a just speed. Data transfer does not provide powerhouse from the Intel Core product for data synchronization or prioritiza- line, current drawbacks of PC/104, such tion, thus subjecting important signals as ISA and PCI bus interfaces’ inherent to bottlenecks on the bus, especially speed limitations, must be addressed to when there is more traffic than the bus is balance the system design. designed to support. A protocol other than PCI or ISA will be necessary to achieve In 1992, PC/104 emerged with the ISA this goal, and PC/104 is again called upon bus, providing 104 signals with a unique to incorporate changes that allow it to pin and socket stacking design that elimi- prevail as the form factor of choice. nated the need for a backplane. Develop- ment in peripherals and processors trended With current processor capabilities and to PCI, so PC/104-Plus was created to increasing peripheral demands within provide an ISA-to-PCI bridge, enabling a system, PCIe has emerged as a strong a PC/104 board to interface with both competitor for the bus of choice. As it ISA and PCI boards. Further change was has done in the past, the PC/104 stan- implemented in PCI-104 to eliminate the dard must adapt to provide competitive ISA bus entirely, thereby saving valuable solutions for embedded system designs. board space for additional components Specifically, PC/104 must find a way to RSC# 14 @ www.smallformfactors.com/rsc with pure PCI interface. interface with the newer PCIe standard to

14 / Summer 2007 PC/104 and Small Form Factors ©2007 OpenSystems Publishing. Not for distribution. match the bandwidth of the bus with the Cooperation from processor innovators speed of the processor within a PC/104- like Intel alleviates many barriers design- based system. ers encountered, beginning with the Pentium processors and including others PCIe’s potential that compete in the race for speed. Mobile The PCIe 2.0 standard was released last computing and portable consumer elec- fall, defining an even more powerful tronics have aided tremendously in this interface than that which helped the initial advancement because those markets standard gain popularity so quickly. PCIe demand smaller, faster devices with low offers numerous solutions to the short- power consumption realized through comings of PCI. Most importantly, the extended battery life. The shift toward new specification doubles the intercon- maximizing resource efficiency within nect bit rate. This increase in bandwidth the processor and making chipsets more allows designers to reduce costs in imple- tailored to a particular application can menting narrower interconnect links for only allow for the expansion of PC/104 greater performance. With a theoretical form factor applications. peak bandwidth of 16 GBps in a 16-lane system, it is clear what draws attention to As processes shrink to 65 nm and less, the standard. locating even more features with the ly cores in the processor will become pos- n In addition to its speed, the methods sible. With so many processor options for handling serial signals with parallel available and the prospect of compatibil- O connections attract designers. Bits are ity with PCIe, PC/104 is on the brink oft not required to arrive simultaneously, surpassing limitations and redefining its alleviating the need for data synchroni- place in embedded computing. i ➤n zation. Prioritized data serves to avoid r bottlenecks common in overloaded PCI SteveP Potocny is a systems. Handshaking and error detec- software engineering tion ensure the integrity of each transfer, lemanager for Kontron which can be especially useful in the America. With more presence of noise. g than 25 years in the in industry, Steve has PCIe has the added advantage of trans- worked at Kontron parency to operating systems, makingS for 10 years and has it fully backward compatibler with PCI more than 10 years of real-time operating software. However, electricalo modifica- software and BIOS experience. He earned tions are required to interface PCI with his BA and MA degrees in Mathematics at PCIe. PC/104 hasF +5 V, -5 V, +12 V, and the University of California, Santa Cruz -12 V supplies, but PCIe uses two pairs of and San Diego. differential 2.5 V LVDS signals in each lane to transmit and receive on the bus. Cliff Moon is the Novel connectors have been proposed director of product for directly stacking PCIe I/O boards in marketing for a PC/104 system. Using PCIe as the base, Kontron America, PC/104 ISA cards can be stacked to create where he is respon- a system with a height of four. sible for embedded computer products. PC/104 is working on a standard by Cliff has more than which PCIe can be integrated in the long 20 years of experience in engineering, line of interfaces. Given the availability product marketing, and sales and served of a PCIe chipset in Intel’s Core line, the as a PC/104 Consortium Technical prospect of encapsulating the two inter- Committee Chairman. faces in a single standard makes PC/104 a candidate for applications beyond its To learn more, contact Steve or current reach. Cliff at: RSC# 15 @ www.smallformfactors.com/rsc Still more room for innovation Kontron America PC/104 will remain a dominant form 14118 Stowe Drive factor as long as its adaptability continues, Poway, CA 92064-7147 embracing new features and processing 858-623-3000 technology so users can continue to ad- [email protected] vance performance and function in their [email protected] www.kontron.com applications.

By Kjell Brunberg

Space-constrained marine applications often entail rigorous demands for environmental compliance and rugged performance. Developing a platform that meets both marine certifications and application requirements presents a challenge, especially when faced with a short development window. Using a three-board stack approach, the stack adds unique interface circuits such as four isolated CAN, five isolated designers in this case study demonstrate how a Pentium M PC/104 RS-232/422/485 serial, three Ethernet, module with a custom-designed carrier board fits the bill for this and three USB ports, Digital I/O, DVI, type of system. and CRT, and provides power supply for 24 V input. A socket for CompactFlash When a world-leading offshore and ship- Three-board stack approach is also mounted on the board, more as ping equipment supplier reviewed its Normally, high reliability and low cost a factory-mountedly option than as user- supplier network, it became apparent demands result in a full custom design. swappablen media. Most of the interfaces that the company needed to downsize its But in this case, the wide range of perfor- have LED indicators with light pipes up number of suppliers, increase quality, and mance requirements for different applica- toO the front-panel surface of the cabinet. improve the price and performance of its tions, from the lowest-possible 200 MHzt embedded computer systems. Finding the control function unit up to a high- appropriate solution incorporating total performance 1.4 GHz Pentiumi Mn LV, life-cycle support and high-level software could not be handled by simplyr chang- services was a challenge considering ing the CPU speed andP memory sizes. the stringent requirements involved in Therefore, designers opted for a separate designing a marine-certified SBC. CPU modulel eand carrier board design, even though interconnect costs added to Maritime and offshore approval certifi- the entry-levelg unit. Subsequent volume cations call for strict adherence to high inincreases for each model could provide standards in areas such as vibration, tem- incentive for conversions to full custom Figure 1 perature, humidity, and EMC. Table S 1 designs of certain models in the future. shows a list of the various systemr requirements. Given these constraints,o designers Basic demands such as passive cooling The top board is equipped with external had to develop a compact, high-reliability and a fully EMC sealed enclosure for wall interface connectors, EMC ground plane system with scalableF performance and a or cabinet mounting resulted in a design and filters, overvoltage protection, and number of special interfaces that com- approach with a three-board stack solu- isolation components providing fully gal- plied with all international marine class tion (Figure 1). In this design, the CPU vanic isolation and protection for external directives as well as RoHS, UL, and other module is mounted at the bottom of the serial and fieldbus interfaces. Changing similar regulations. stack with passive heat transport through the top board and enclosure faceplate the bottom plate, utilizing the specified added design capabilities for other Other demands included service-free mounting requirements on cabinet walls. models with different interface demands, lifetime, passive cooling, and low-priced The bottom plate acts both as a heat sink such as heavy-duty connectors or fiber- entry-level models. The product also had and mounting plate. The middle board in optic interfaces. to be tested and launched within a short timeframe at competitive cost levels. Marine control computer requirements

Though these requirement levels set the CPU performance 300-1,400 MHz bar high, after several commercial and Temperature -25 °C to +50 °C technical reviews, evaluation, and pre- Vibration and shock 4 g ambles, designers came up with a marine- certified control computer platform based EMI Veritas, Lloyds on x86 architecture and embedded Linux Size As small as possible that met the extensive demands for I/O Two to three Ethernet, three USB, four RS-485, CRT, DVI, COM, custom-designed hardware, BIOS, and four relay ports operating system drivers. The solution, a board-to-board PC/104 module with a Life cycle Five years full custom carrier board, incorporated Software Windows and Linux a multitude of interface options and DC Modularity/growth potential Flexible power as well as a contact board with all connectors and filters. Table 1

16 / Summer 2007 PC/104 and Small Form Factors ©2007 OpenSystems Publishing. Not for distribution. To compensate for mechanical tolerances, Two different PC/104 boards with board- Different tests performed on the heat the top cover is adjustable on the rear- to-board connectors achieved the required spreader and rear-plate materials resulted mounting plate to comply with recom- 300-1,400 MHz performance range. A in a selected Al-alloy with high thermal mended EMC pressure toward connector 300 MHz Geode board served as the low- conductivity and a thin, high-quality heat faceplates and rear-mounting plates. The price entry model, a Celeron M 1.0 GHz grease. The larger rear plate was mounted internal board stack has fixed-length ULV served as the mid-range perfor- toward a wall or cabinet that provides spacers toward the bottom heat spreader/ mance model, and a Pentium M 1.4 GHz good heat transportation. mounting plate and accommodates flex- served as the high-end model. Tests ible tolerance for front-cover depth. This were also performed with a Pentium M All environmental and mechanical tests combines the best thermal contact for the 1.8 GHz CPU, but its higher power dis- proved successful the first time, though to CPU board toward the mounting plate sipation reduced the total system operat- pass the EMC qualification tests, design- with full EMC contact pressure for all ing temperature range to an impractical ers had to make some minor BIOS adjust- front-plate connectors without any EMC. level. Because the difference between the ments for sensitive marine RF bands. The 1.4 GHz CPU’s performance and that of high-speed 1.4 GHz CPU did not cause CPU module selection the 1.8 GHz model is minimal, the latter any EMC problems because the PC/104 Because COM Express boards with model was not released. CPU module’s PCB design has ground entry-level to mid-range alternatives were not available, designers determined that ETX and PC/104 boards were the best CPU module options. These alternatives provided the same performance range ly and price levels. The five-year life-cycle n requirement was not an issue because both these board types have full BIOS O and life-cycle control capabilities. t Though PC/104 does not typically support in docking to carrier boards, mounting all r I/O interface connectors in a way that P enables docking to a carrier board and using a thermal distribution plate alle- le viated this problem. Figure 2 shows a PC/104 board-to-board model with a g thermal plate. in r S Fo

Figure 2

The requirements for a -25 °C to +50 °C temperature range and thermal control were easier to solve with a smaller and more mechanically stable PC/104 board, which has pin connectors on all sides of the board enabling a reliable pressure toward the heat distribution plate. Demands for 4 g vibration withstanding also pointed toward the choice of PC/104, as did previous experience using rock drill equipment, which demonstrated PC/104’s good survival record during shock and vibration tests. RSC# 17 @ www.smallformfactors.com/rsc

A reliable board-to-board LVDS interface for TFT panels. With a solution Celeron M 1 GHz ULV or Pentium M The H6036 (Figure 3) from Hectronic, 1.4 GHz LV CPU, the solution can rely which is based on an Intel 855GME/ entirely on passive cooling. ICH4 chipset with support for Celeron M and Pentium M, fulfills the requirements for space-constrained marine applications. The H6036 is configured as a board-to-board only solution with rugged and extremely reliable pin-down connectors, making it suitable for harsh environmental conditions. The H6036 has a true 16-bit ISA bus, a 32-bit PCI bus in a miniature, proprietary connector for carrier board designs, and an Figure 3

layers on the top and bottom of the board One commonlyl yoccurring problem in that reduced emission and minimized the a systemn design with many serial inter- need for extra system design work. faces is earth currents for nongalvanic- allyO isolated ports. Multiple internal Software platform t DC/DC converters and optical isola- Because the described hardware platform tors add to the total heat loss; however, was intended for different controli nappli- magnetic isolators with lower power cations with fieldbus communicationr dissipation can remedy this. using a small real-timeP kernel and larger applications with TCP/IP communication Unit cost can be kept low using enclo- and Human-Machinele Interface (HMI) sures for effective EMC countermea- graphics, designers had to adopt Linux sures and heat transport. Instead of using distribution.g With power-supply inter- several interface filters with other types inrupts or shutdowns, the application envi- of expensive cooling solutions like heat ronment did not suit the standard Linux pipes or fans, the described PC/104 Sfile system, so designers used a Linux board-to-board system enclosure design r toolchain kit for downscaling and ROM solved these issues at a low cost. Periodic o image generation. service was not needed, and without any moving parts, the system could maintain F Designers fine-tuned Linux drivers for the low operating temperature through all different system interfaces to work the course of its life cycle. ➤ with the different CPU module alternatives and provided training on handling Kjell Brunberg is the Linux toolkit for application software founder, CTO, and development and support. Abstraction business develop- layers were added on top of the operat- ment manager of ing system, and the total system enabled Hectronic AB. He developers to handle application software has worked in the without having to know the different electronics industry hardware models or laboring with the for almost 30 years, platform software. including experience in medical electronics at Siemens, datacom products Handling heat at Upnod, and consulting at Datalab. For embedded systems in demanding Kjell has an MsSc in Technical applications, many small decisions can Physics from Uppsala University. either make a project successful or cause technical problems. The most important To learn more, contact Kjell at: RSC# 18 @ www.smallformfactors.com/rsc questions to consider when planning a complex system design are the power Hectronic AB dissipation and heat transportation Box 3002 method and the EMC shielding and fil- SE-750 03 Uppsala tering method. In many projects, these Sweden aspects are difficult to combine but must +46-18-660700 be solved in a satisfactory way before the [email protected] rest of the requirements can be fulfilled. www.hectronic.se

RSC# 19 @ www.smallformfactors.com/rsc

By Manish Singh

Graphics display glossary AUX CH Auxiliary Channel Robust multimedia content not only requires fast, high-resolution DVI Digital Visual Interface displays, but also calls for relatively new capabilities such as secure EDID Extended Display Identification Data transmission of rights-managed audio and video streams. DisplayPort, HDCP High-bandwidth Digital Content Protection with a new specification version recently approved by VESA, seeks to HPD Hot-Plug Detect redefine the display interface for more robust functionality. LCD Liquid Crystal Display LVDS Low Voltage Differential SCSI RGB Red, Green, Blue The PC and consumer electronics indus- applications. DisplayPort supports both VESA Video Electronics Standards Association tries continue to demand increased LCD external (box-to-box) and internal (chip- resolution, color depth, and higher refresh to-chip) connections. rates driven by their desire to deliver ly immersive, high-quality, high-resolution DisplayPort overview the Policyn Maker Layer, Link Layer, and video and gaming experiences. This, Sink functionality is defined as the Physical Layer. in turn, creates the demand for a high- capability to support the reception of a O bandwidth, scalable, display interconnect DisplayPort stream, such as shown int The DisplayPort Physical Layer link standard. As PCs integrate high-definition Figure 1. A Sink device contains one consists of the Main Link, AUX CH, and DVD playback and support Internet-based sink function and at least one renderingin HPD signal line. The Main Link provides HD video services, digital interconnect function. Rendering is ther function of a scalable, forward drive channel and technology is needed to securely transmit displaying or processingP stream data. For implements a micropacket architecture copyrighted audio and video streams to example, video displays and speakers are that can support variable color depths, high-resolution displays. consideredl renderinge functions. Source refresh rates, and display resolutions. functionality is defined as the capability AUX CH is a bidirectional return channel Legacy display interface technologies to transmitg a DisplayPort stream. A that also implements micropacket archi- have several limitations. These restrictions inSource device contains one or more tecture for flexible control and status include the necessary bandwidth capacity source functions. information delivery. to scale to higher resolutions and Scolor depths, as well as cable lengthr and content Branch devices are located between The layered architecture decouples the protection limitations, oall of which raise Source and Sink devices. Some examples Physical Layer evolution from the Link concerns about the interface technologies’ of branch devices include: Layer such that future enhancements viability for futureF use. Existing standards to the Physical Layer can be supported also add complexity by requiring volt- n Repeater (one DisplayPort in, one seamlessly, thus adding to DisplayPort’s age translations, resulting in additional DisplayPort out) extensibility. processing and cost. These requirements n Replicator (one DisplayPort in, indicate that PCs must often support multiple DisplayPorts out) Policy Maker Layer multiple display interconnect standards, n Concentrator (multiple DisplayPorts The Policy Maker Layer manages data which add to system complexity and cost. in, one DisplayPort out) streams and the link. The standard is flex- Clearly, the PC and consumer electronics ible about its implementation. industries need a single standard that can To support the market as it transitions support future needs based on a new set of from legacy standards to DisplayPort, the Link Layer technologies. standard defines two additional branch The Link Layer manages the isochronous devices – legacy-to-DisplayPort converter transport and link device services. Isochro- DisplayPort, an extensible digital display and DisplayPort-to-legacy converter. nous transport services in a Source device interconnect standard adopted by VESA, map the audio and video streams into the overcomes current standards’ limitations Layered architecture Main Link such that streams can be recon- by accommodating new display features DisplayPort, based on a layered archi- structed properly by the Sink device. Link and applications. DisplayPort aims to tecture as shown in Figure 2, consists of service is used for discovering, configuring, reduce device and system design complexity and to provide performance scalability Main Link for next-generation LCDs. To that end, Source Device (Isochronous Streams) Sink Device DisplayPort is an open, industry-standard, DisplayPort AUX CH DisplayPort digital interface developed for a wide (Link Management, Device Control) range of applications. The DisplayPort Tx Rx Hot-Plug Detect (IRQ) specification defines a scalable, digital display interface with optional audio and content protection capability for various Figure 1

20 / Summer 2007 PC/104 and Small Form Factors ©2007 OpenSystems Publishing. Not for distribution. Source Device Sink Device DPCD EDID will determine whether the link rate is set to 2.7 Gbps or 1.62 Gbps per lane.

Stream Link Link Stream Stream Stream Policy Policy Policy Policy Source(s) Sink(s) The Main Link has one, two, or four lanes. Maker Maker Maker Maker The number of lanes is decoupled from Link EDID/ Link Discovery/ Link Discovery/ EDID/ the pixel bit depth (bits per pixel) and MCCS/... Init/Maintenance Init/Maintenance MCCS/... Link Layer Layer component bit depth (bits per component). Isochronous AUX CH AUX CH AUX CH AUX CH Isochronous Component bit depths of 6, 8, 10, 12, and Transport Device Link Link Device Transport 16 are supported with the colorimetric Services Services Services Services Services Services RGB and YCbCr444/422 formats, regardless of the number of Main Link lanes.

PHY Layer PHY Layer All lanes carry data, and there is no dedi- Main Link AUX CH HPD HPD AUX CH Main Link cated channel for the forwarding clock.

Hot-Plug Detect signal The link clock is extracted from the data stream encoded with ANSI 8B/10B Command/Data-> <-Status/Data coding rule (specified in ANSI X3.230- 1994, clause 11).ly Serialized and Encoded Data Excludingn the 20 percent channel-coding Figure 2 overhead, DisplayPort’s Main Link pro- videsO for the application bandwidth (also and maintaining the link by accessing the The standard supports two link rates:t called link symbol rate) as shown: Sink device’s DisplayPort configuration 2.7 Gbps and 1.62 Gbps per lane. The data over AUX CH. The device service link rate is decoupled from thei npixel Link rate = 2.7 Gbps supports device-level applications such rate, which is regenerated fromr the link as EDID access and monitor control com- symbol clock. The capabilitiesP of the n One lane = 270 MBps mand set over the AUX CH. DisplayPort transmitter and receiver and n Two lanes = 540 MBps the quality ofl thee channel (that is, a cable) n Four lanes = 1,080 MBps At the Link Layer level, both the Main Link and AUX channel support a micro- g packet architecture in which data streams in are packed into transfer units. These transfer units are then mapped to the MainS Link or AUX link. In addition rto enabling support for variable coloro depths, refresh rates, and display pixel formats, this architecture enables DisplayPortF to extend its functionality to adopt new data types and thus new features for legacy and emerging applications, adding another dimension to DisplayPort’s scalability.

Physical Layer The Physical Layer comprises the Main Link, AUX CH, and HPD signal. The logical functions supported at this layer include scrambling/descrambling and ANSI 8B/10B/Manchester II encoding/ decoding. SERDES, differential current driving/receiving, and preemphasis/ equalization functions are supported at the electrical level.

Main Link The Main Link is a unidirectional, high- bandwidth, low-latency channel used for transporting isochronous streams such as uncompressed video and audio. The Main Link consists of AC-coupled, doubly terminated differential pairs called lanes and can be scaled from one to four lanes. RSC# 21 @ www.smallformfactors.com/rsc

DisplayPort devices may freely trade coding for AUX CH. As is the case with signal is used to notify the connection of pixel bit depths with the resolution and the Main Link, the clock is extracted from a Sink device and the Source device of frame rate of a stream within the available the data stream. AUX CH transaction starts any change in link status. bandwidth. Audio and other secondary with synchronization transmission. data packets may be transported during Channel coding and device support the main video stream’s horizontal and AUX CH is a low-latency interface with a DisplayPort precludes a dedicated clock vertical blanking period. transaction period of < 500 ms. It provides channel to minimize clock-related EMI. for 1 Mbps of data rate over the supported In addition, the clock and data are AUX CH cable lengths. AUX CH syntax is defined scrambled and then encoded in the ANSI A half-duplex, bidirectional channel used in a way that seamlessly supports I2C 8B/10B (Main Link) or Manchester II for link management and device control, transaction over AUX CH. (AUX CH) format, further minimizing AUX CH consists of an AC-coupled, EMI. DisplayPort Sink devices support doubly terminated differential pair. Man- The HPD signal also serves as an inter- link frequency down spreading to further chester II coding is used as the channel rupt request by the Sink device. This reduce EMI, which is optional in Source devices. Alternative display interconnect standards do not provide such a compre- hensive framework for mitigating EMI as effectively. y nl The DisplayPort interface is AC coupled, enablingO the Source and Sink devices to t support independent common mode voltage such that each IC can be implemented in in the process technology best suited to r the application requirements. For exam- P ple, graphics processors can be implemented in a 65 nm process while timing le controllers can be implemented in 350 nm and still interface seamlessly. LVDS and g DVI standards lack this capability. in Unlike DVI and LVDS, DisplayPort S natively supports secure audio data trans- r mission. This is key for the new genera- o tion of multifunction monitors targeted at F video and gaming applications. DisplayPort incorporates the HDCP version 1.3 standard for securing copy- protected content. This is an important feature for PCs that are becoming multimedia hubs used for playback of high-resolution, premium content like HD movies.

Mechanical features The DisplayPort specification also includes a mechanical specification that defines a small, external connector with an optional latch on the plug for robust connectivity with long cable lengths. Figure 3 shows a DisplayPort cable and connector. DisplayPort- compliant Source and Sink devices will interoperate over a 15-meter cable- connector assembly. The connector, which is optimized for use on thin profile notebooks, includes four forward RSC# 22 @ www.smallformfactors.com/rsc lanes and allows up Figure 3

22 / Summer 2007 PC/104 and Small Form Factors ©2007 OpenSystems Publishing. Not for distribution. to four connectors on a graphics card. A standard panel connector for internal applications is also defined within the mechanical section of the specification. In addition, the DisplayPort connector for a box-to-box connection has a power pin for powering either a DisplayPort repeater or a DisplayPort-to-legacy converter.

Innovation through collaboration VESA is one of the PC industry’s most influ- ential sources of display-related standards. The organization, which has 145 member companies including representatives from every part of the PC ecosystem, has launched more than 60 standards in display-related fields. VESA’s objective in developing DisplayPort was to enable members of the display industry to influ- ence and contribute to its specification. ly Unlike closed, proprietary standards, n DisplayPort provides a fair, open standard approval process that solicits input from O all VESA members. This enables broad t adoption and initiates a cycle of innovation through collaboration. VESA mem- in bers approved DisplayPort Version 1.1 in r April 2007. P Companies within both the PC and con- le sumer electronics industries recognize DisplayPort’s unique capabilities as an g open standard that comprehensively in serves their demands by providing a high- bandwidth, scalable, and secure digitalS interface for chip-to-chip or rbox-to-box connectivity. ➤ o FManish Singh is senior director of marketing at Genesis Microchip, Inc. Prior to joining Genesis Microchip, Manish was VP of marketing at Mobilygen, senior director of marketing at NVIDIA, and VP of marketing at MediaQ before it was acquired by NVIDIA. His experience also includes senior marketing and technical positions at Sun Microsystems and Synplicity. Manish holds an MS in Electrical Engineering from Rice University.

To learn more, contact Manish at:

Genesis Microchip, Inc. 2525 Augustine Drive Santa Clara, CA 95054 408-919-8400 [email protected] www.gnss.com RSC# 23 @ www.smallformfactors.com/rsc

By Jason Slaughter

Graphics display glossary DVI Digital Visual Interface Standard display interfaces such as VGA and DVI have been a good HDMI High-Definition Multimedia Interface thing for the industry, allowing monitors to connect to computers quickly HRE Hardware Rendering Engine and easily. However, this 1:1 ratio of ports in close proximity is changing LCD Liquid Crystal Display with the popularity of docking stations for laptops, multiple monitor LVDS Low Voltage Differential SCSI configurations, and monitors physically separated from the computer. PAN Personal Area Network The next generation of USB display solutions shows potential for VGA Video Graphics Array surmounting these new challenges. VGC Virtual Graphicsly Card Since the development of the PC, devel- six monitors (seven including a VGA- and no supportn for DVD video playback. opers have used graphics cards with VGA- connected monitor). This configuration is Resolutions were frequently limited to like connectors as the primary means of ideal for increasing productivity through 800O x 600 and only 16-bit color, resulting connecting displays to host computers. extended screen real estate or for monitor-t in a significantly inferior experience and Now, the industry is at a crossroads – one ing separate applications across a virtual quality to a standard VGA monitor. path is a continuation of this technology video wall of monitors. This technologyin with DVI, DisplayPort, and HDMI; the furthers the growing secondaryr display When considering a second-generation other path is a new connectivity method market by allowing P multiple monitors USB display solution, developers should that uses network display technology. to be added economically without addi- consider three key factors: Network displays use standard network tional graphicsle cards. Elimination of the interfaces – USB 2.0, Ethernet, Wi-Fi, bulky VGA port and cable is an especially n Display quality: The optimal Wireless UWB, and WiMedia – to connect importantg feature for small form factors solution should support the ability to displays to computers and offer new capa- inand notebook designs because the moni- show smooth, full frame rate DVD- bilities for small form factor designs and tor can be connected through an existing quality movies without ghosting or the rest of the computing industry. SUSB port and displays can be daisy- jittering playback. The technology r chained up to 15 meters through USB 2.0 should also offer resolution and color Traditional display connectoro technology hubs using lightweight and inexpensive depth comparable to a high-quality requires a dedicated graphics card for USB cables. VGA-connected display, meaning each display unlessF a costly multiheaded crisp graphics at 1600 x 1200 graphics card is used. Small form factor Network display technology resolution and support for 32-bit and notebook displays are even more takes off true color. limited in their display expansion pos- The market for network display technol- n Interactivity: Screen response to sibilities because of space constraints. ogy has recently gained momentum with mouse movements and input via the The cost and complexity of today’s dis- the debut of second-generation USB 2.0 keyboard must be instantaneous, play connection technology has inhib- products with VGA-like image quality and usually less than 5 ms over USB 2.0. ited updates to multimonitor computing, DVD-quality video playback. This core Without an adequate real-time despite the proven productivity benefits of technology has fueled the development response, mouse movement and using multiple monitors. The most promis- of new products including USB-to-VGA data input become cumbersome ing possibility for bridging this complex- dongles, universal notebook docking and divert attention from working ity gap comes from display connections stations, and even USB-connected moni- to watching what appears on the over Personal Area Networks (PANs). In a tors such as the Samsung Ubisync 940UX. screen to ensure tasks were PAN configuration, displays are connected The market is poised for a slew of new done correctly. using point-to-point or close-range net- capabilities, including wireless connectiv- n Ease of use: The product should work technologies such as USB, Wireless ity through Wireless USB and WiMedia support quick hot plugging and USB, and WiMedia. using the same basic architecture. unplugging of displays through a simple USB cable, but ease of A market for secondary PC displays is This generation of network display use should go a step beyond. While emerging with new technologies such technology overcomes the significant the VGA cable is relatively simple, as DisplayLink’s multimonitor solution, limitations of first-generation USB and intelligence is not built in. A USB- which can demonstrate up to six monitors Ethernet-connected displays. Until now, connected display can be smarter, attached to a PC through one USB 2.0 displays connected wirelessly or over which should be apparent in any connection. Each USB 2.0 connected USB 2.0 were marked by problems with second-generation display device. display can run its own application poor display responsiveness to mouse When connecting a new monitor, or extend the Windows desktop over and keyboard input, poor image quality, the optimal resolution should be

26 / Summer 2007 PC/104 and Small Form Factors ©2007 OpenSystems Publishing. Not for distribution. automatically selected based on The VGC is composed of two key ele- the monitor’s extended display ments. The first part is a driver that identification data to ensure the best communicates with the Windows graph- picture possible. When a device is ics API to accept the pixel stream. The unplugged, the windows on that second component is a Windows ser- screen should automatically return vice that manages connected displays, Figure 1 to the primary display, for instance, remembers display configurations, and when a notebook PC is undocked. converts data to a lossless transport The hardware component, the HRE, is Most importantly, when plugging protocol to send over USB 2.0. The stan- a silicon chip that decodes the graphics in a previously used USB monitor, dard Windows USB interfaces are used to stream into a pixel stream for display on the location of the monitor should connect, disconnect, and send data over a monitor. In a typical board design, the return to wherever it was last used. the USB 2.0 interface, ensuring com- HRE is connected on the far side of the For example, if a user has a USB patibility across a range of standard network interface, allowing it to be used docking station at home with a interfaces including Wireless USB. over both wired and wireless networks. monitor to the right and two USB monitors at work on the left, these exact locations should be maintained when moving from one location to ly another. This allows for a significantly n improved experience when moving locations, hot desking, or docking and O undocking a notebook PC. t Resolving technical difficulties in The challenge is to take the large amount r of data that comes from a high-resolution P graphical PC display and transport it over a USB 2.0 connection with limited le bandwidth. A high-resolution monitor requires several gigabits of data per g second compared to USB 2.0, which in offers a maximum of 400 Mbps of bandwidth, and Wireless USB or WiMedia, S which offers a typical data rater anywhere from 70-400 Mbps dependingo on network conditions. Delivering a quality image across a standardF network interface requires a very high-performance and low-latency compression algorithm to deliver the immense amount of image data across the more limited data links.

DisplayLink solves this challenge by taking a system-level approach with two major components: a software application that runs on the host PC called the Virtual Graphics Card (VGC) and a high-speed decoder chip on the display side called the Hardware Rendering Engine (HRE), shown in Figure 1.

The VGC is an application and driver installed on a host PC that converts the pixel stream into the lossless transport protocol and transports these frames across the network link. Nearly invis- ible to the user, this software is silently installed using Microsoft digitally signed drivers and runs in the background, allowing users to adjust their monitor properties using the standard Windows Display Properties control panel. RSC# 27 @ www.smallformfactors.com/rsc

The chip also supports a keyboard, network displays today focuses on the Making the link mouse, or touch-screen ports. The HRE USB 2.0 connection, the same architec- This type of network display technology can be used in a wide range of system ture can be applied to alternative PAN provides a COTS alternative to VGA/DVI designs, from USB docking stations to interfaces including wireless. WiMedia technology when multiple monitors are a Wireless USB or USB to VGA/DVI is quickly becoming the preferred wire- needed or when the design must replace dongle. The HRE also can be embed- less standard for reliable point-to-point video, keyboard, and mouse ports with a ded directly into a monitor or projector network connections, and the VGC/HRE single USB port. As PC/104 designs are by connecting either through a monitor technology has been demonstrated over often ruggedized or deployed in the field, scaler or directly to the LCD panel or Wireless USB with an underlying WiMedia attaching a VGA monitor can be incon- projector lamp through LVDS. connection. As WiMedia and Wireless venient because of the fragile connector USB interfaces become increasingly pins and thumbscrews on the connector. Most importantly, the VGC/HRE archi- abundant, network displays will enable a A USB connection is a robust and easy tecture makes the connection agnostic. wide range of new applications requiring connection method through a connector While the primary target for secondary wireless displays. that is often already available.

Network display technology breaks the 1:1 computer-to-display barrier imposed by traditional ldisplayy technology while at the samen time meeting the important performance and image-quality metrics. USBO connectors allow for an easier, t cheaper, and quicker alternative for multiple monitor connections, and Wireless in USB and WiMedia provide a path to r wireless over the same basic architec- P ture. As PC/104 systems evolve into data-intensive applications where dis- le play connectivity is important, network display solutions offer a good option that g saves space and cost while maintaining in great performance. ➤ S Jason Slaughter r is a senior o product manager at DisplayLink, where F he is responsible for product development and marketing of the company’s network display technology products. Prior to DisplayLink, he served as a product manager for video and multimedia at ATI, where he specialized in high-quality graphics and video playback on PCs. Jason built his semiconductor product marketing experience with positions at V3 Semiconductor (now QuickLogic) and Actel. He has a BASc in Electrical Engineering from the University of Waterloo in Canada.

To learn more, contact Jason at:

DisplayLink 480 South California Avenue Suite 304 Palo Alto, CA 94306 650-838-0481 [email protected] www.displaylink.com RSC# 28 @ www.smallformfactors.com/rsc

By Martin Danzer

FLAT PANEL glossary CRT Cathode-Ray Tube Flat-panel interfacing can be a nightmare, considering the lack of a DDC Display Data Channel standard between panel interfaces. EPI seeks to change that, allowing DVI Digital Visual Interface for easy and direct flat-panel display control with maximum flexibility EDID Extended Display Identification Data on a defined interface. The result is a manufacturer-independent EEPROM Electrically Erasable Programmable “plug-and-display” solution that enables free display interchangeability Read-Only Memory with computers supporting the interface. EPI Embedded Panel Interface LCD Liquid Crystal Display LDI LVDS Digital Interface Connecting flat panels to an embedded Unfortunately, mobile chipsets are de- LVDS Low Voltage Differential SCSI system can often be a difficult task. Most signed to meet the needs of notebook RGB Red, Green, Blue typical peripheral devices in computers panels with their typical 18-bit inter- y TFT Thin Filml Transistor use a properly defined standard interface faces. Desktop panels typically imple- VESA nVideo Electronics Standards Association for connection, yet the flat-panel connec- ment 24-bit interfaces. Because of the tor is still usually a proprietary solution. most common LVDS mapping scheme, OVGA Video Graphics Array called conventional mapping, scalingt The main reason for this is that so many between these two color depths is not because the display or CPU board is different interface solutions are on the easy to implement. Figure 1 showsin how unlikely to be changed. flat-panel side of the interface. CRT-based the additional six color bitsr are trans- monitors use the 15-pin analog RGB ferred to the panel. P With desktop monitors, regardless if it’s VGA connector, and TFT devices tend to a CRT or TFT monitor, a much more implement the DVI connector more and If the 24-bitl einterface is not supported flexible approach must be used because more. But there’s no such visible trend by the chipset’s graphics configuration, so many different devices are offered in when it comes to direct LCD flat-panel this incompatibilityg can only be solved today’s market. In the past, simple jump- control, though several different proposals inby external hardware usually located on ers and presets solved configuration. were made in the past. the panel adapter. Efforts to develop more Now, ease of maintenance drives module Sflexible solutions, such as the Open LDI manufacturers to find a flexible and auto- Data bits don’t line up r standard from National Semiconductor, matic configuration mechanism. Why have flat panels beeno so challenging? have not been widely successful. The graphics chipsets used for LCD panels The modern plug-and-play mechanism are often designedF for the mobile market Configuration scheme implementation is based on the VESA in devices such as notebooks. Most of also needed DDC/EDID definition. A serial I2C inter- these devices have a dedicated flat-panel In addition to the data definition, a stan- face transmits basic display parameters interface based on LVDS, which not only dard interface should also offer solutions to the host computer. This data is used describes the physical signal properties for its configuration. Several solutions are to calculate the chipset configuration. but also a certain multiplexing and data- already available today. For several reasons, EDID Revision 1.3 mapping scheme. has become the industry standard for Notebook manufacturers typically put this task. This approach has some strong techno- the panel and chipset-dependent configu- logical advantages that have led to its ration data into the BIOS during system The EDID 1.3 protocol assumes some success and the broad availability of all integration. In this situation, future modi- local intelligence is inside the display kinds of LVDS displays. Differential and fications do not need to be supported device, adapting several module-specific multiplexed data transmission results in extremely low noise and a relatively CLK simple cable connection, a plus for industrial environments. CH1 G0 R5 R4 R3 R2 R1 R0 On the other hand, different markets lead to different display requirements. Note- CH2 B1 B0 G5 G4 G3 G2 G1 book panels must be thin and lightweight and should consume as little power as possible. Their desktop counterparts do CH3 DE VS HS B5 B4 B3 B2 not suffer from these restrictions and are therefore brighter and have better contrast CH4 B7 B6 G7 G6 R7 R6 and viewing angles, making them much more suitable for industrial applications. Figure 1

properties and reproducing a compatible EPI Interface interface. To describe a flat-panel display for an embedded application, some addi- Signal name tional parameters must be implemented, EPI ETX COM Express Signal description such as number of pixels per clock, data- spec. 2.7 spec. 1.0 mapping scheme, color depth, and so on. LCD_DDC_DAT JILI_DAT LVDS_I2C_DAT Serial I2C interface for reading the display VESA and other organizations have tried parameter table to enhance these definitions in terms LCD_DDC_CLK JILI_CLK LVDS_I2C_CLK Serial I2C interface for reading the display of extension blocks, resulting in the cre- parameter table ation of a completely revised standard LCDD0....19 LCDD0....19 LVDS_A0..A3+ Display data, different mappings and called EDID 2.0. Because of its high com- LVDS_A0..A3- levels are possible plexity, this proposal has not yet been LVDS_B0..B3+ successful. LVDS_B0..B3- LVDS_A_CK+ Creating a standard for LVDS_A_CK- COM-to-panel LVDS_B_CK+ ly Given these problems, it’s now time to LVDS_B_CK- n create an industry standard that will find LCD_VSYNC VSYNC – VSYNC signal broad acceptance in embedded markets. LCD_HSYNC HSYNC – OHSYNC signal One approach is EPI, a specification that t describes the signals and data format. A LCD_VDD_EN DIGON LVDS_VDD_EN Display power enable, typically used to specific connector has not been defined in switch the display power because this depends on the embedded LCD_BKLT_EN BLON# rLVDS_BKLT_EN Backlight enable, typically used to switch application. The EPI concept is illustrated P the backlight inverter in Figure 2, and the defined signal names DETECT# DETECT# – Display plug detection, active low (static) for two types of COM modules are shown le in Table 1. g Table 1 in r S Fo

Figure 2

EPI, which is also based on EDID 1.3, based on. Implementation and execution adds only the necessary parameters by in most cases will be simple. Header using a reserved area inside the EDID structure called the Detailed Timing An EPI data set with the format shown in Descriptor Block 4. The resulting code Table 2 used to describe flat-panel display remains compatible with EDID 1.3 as control can be created easily using the shown in Figure 3. information found in the display’s data- sheet. This can be accomplished using a Besides the fact that EPI’s additional data tool such as congatec’s CGOS32. With set has a very small and constant foot- this tool, the newly created data set can be print, its other major advantage is that written to a reserved area in the congatec StandardParameter Panel most BIOS versions and chipsets already embedded BIOS. support the EDID 1.3 functionality it’s 4th DTD

128-byte EDID 1.3 Frame yEPI Data nl t O Checksum in Figure 3 r Practical experience indicates that similar P flat-panel displays can often be operated with the same EPI data set. To provide le the ability to freely exchange flat-panel displays, a small connector adapter is g equipped with an EEPROM that stores the in specific EPI data and is connected to the S CPU module via LVDS and the I2C bus. r The EPI data set describes the flat panel o independently from the video controller. Its data is interpreted by the BIOS of the F CPU board or module to set the correct

EPI resources EPI Consortium: www.epi-standard.org E-EDID Implementation Guide Version 1.0: www.vesa.org/public/ EEDIDguideV1.pdf VESA 17-inch Wide Notebook Standard Panel Version 1: www.vesa.org/Standards/ summary/2004_6d.htm Open LDI Standard V0.95: www.national.com/appinfo/ fpd/0,2132,228,00.html Digital Display Dual-EDID Implementation Guide Revision 1.0: www.ddwg.org/downloads.asp SPWG v3.8 Specification from the Standard Panels Working Group: www.spwg.org RSC# 34 @ www.smallformfactors.com/rsc

34 / Summer 2007 PC/104 and Small Form Factors ©2007 OpenSystems Publishing. Not for distribution. EDID 1.3 DTD Block 4 Description (Refer to VESA E-EDID Implementation Guide 1.0) Address Bytes Value Description 6Ch 2 00h Flag = 00h when used as descriptor video parameters. The end result is a 6Eh 1 00h Flag = 00h when used as descriptor manufacturer-independent plug-and- 6Fh 1 0Eh Identifier for EPI Extended EDID Data Field display solution that enables free display 70h 1 00h Flag = 00h when used as descriptor and COM interchangeability. 71h 13 EPI Extended EDID Data Field Open for broader use Extended EDID Data Field Definition, 13 Byte EPI’s market success not only depends Byte No. Offset Bit Content Description on its technical merit, but also on its Offset in 128 Byte EDID 1.3 Data acceptance as a standard in the embed- Byte 0 71h Bit [0:2] Digital Interface Data Format 00h = 18bit ded industry. For this reason, EPI will 01h = 24bit be offered as an open standard, meaning 02h = 30bit members of the embedded industry can 03h = 36bit join the EPI interest group to help refine a competent solution that can be imple- 04h = 48bit mented as a true industry standard. 05h = reserved 06h = reserved Companies such as Advantech, IBSmm, y 07h = reservedl MarekMicro, Evalue Technology, and Bit [3:4] Two Pixel per Clock n00h = single bit/clock MSC, are already supporting EPI. Addi- tionally, the VESA committee has started O01h = double bit/clock internal discussions about EPI, and Intel t 10h = quad bit/clock has implied that if the specification gains 11h = reserved recognition and acceptance within the in Bit [5:6] Data Color Mapping 00h = conventional (LDI) embedded industry, the company will r consider implementing EPI support into P 01h = non-conventional (FPDI) its embedded drivers. ➤ 02h = reserved le 03h = reserved For more information on g Bit [7] Reserved for later use EPI and the EPI Consortium, visit nByte 1 72h Bit [0:2] Display Type 00h = TFT www.epi-standard.org. i 01h = DSTN S 02h = LVDS r 03h = TDMS Martin Danzer o 04h = reserved is a product Fmanager for 05h = reserved embedded 06h = reserved graphics at 07h = reserved congatec AG. Bit [4] DE Polarity (high active) 00h = DE high active He has more than seven years of 01h = DE low active experience with display interfaces, Bit [5] FPSCLK Polarity 00h = FPSCLK not inverted including previous roles at Kontron 01h = FPSCLK inverted and JUMPtec AG. Martin earned his Bit [6:7] Reserved for later use degree in Electrical Engineering from the University of Applied Sciences Byte 2 73h Bit [0] Configuration Pin up/down 00h = low Deggendorf in 2000. 01h = high Bit [1] Configuration Pin right/left 00h = low 01h = high To learn more, contact Martin at: Bit [2:7] Reserved for later use Byte 3 74h Bit [0:7] Total Power On Sequencing Delay 10ms units (optional) congatec AG Auwiesenstrasse 5 Byte 4 75h Bit [0:7] Total Power Off Sequencing Delay 10ms units (optional) 94469 Deggendorf Byte 5 76h Bit [0:5] Backlight Brightness Control Step Resolution Germany Bit [6] Backlight Enable 00h = off +49 (991) 2700-0 01h = on [email protected] Bit [7] Reserved for later use www.congatec.com Byte [6:12] 77h Bit [0:7] Reserved for later use

Table 2

c s

/ r

1 o 0 t 4 c a a f nd m ¸ sm l for al EDITOR’S CHOICE PRODUCT

Pico-ITX redefines small Outwit, outplay, outstore p

c s

/ r First Mini, then Nano, now Pico-ITX for even smaller Sometimes USB memory sticks get 1 o 0 t 4 c a form factor designs – VIA Technologies has done it again, crushed like twigs when subjected to a f nd m ¸ sm l for pushing the limits of size for embedded designs to a bit of rough usage. I’ve snapped al new levels. off plastic covers, bent connectors, andEDIT OR’S CHOICE similarly mutilated more than one PRODUCTS In a 10 cm x 7.2 cm format with half the area of the of mine. Nano-ITX form factor, Pico-ITX shrinks real estate for designs based on VIA Eden or VIA C7 processors. Pico-ITX Corsair has a solution – the new is sure to help designers pack a lot of processing power Flash Survivor line of USB 2.0 flashly into applications where larger boards just can’t go. drives. Designed and engineeredn to be the industry’s toughestO USB drive, Flash Survivort is water resistant, computern numeric control milled aluminumri encased, and shock proof to safely store users’ information and files in the most demanding Penvironments. le Corsair g www.corsair.com RSC# 33369 VIA Technologies in www.via.com.tw S RSC# 33367 r Stabilizing force Fo for images Blurry images are of little CAN-do data logging use, especially in machine vision applications. This Automotive applications are among the world’s most small system combines a demanding physical environments for electronics. A new gyrosensor, lens assembly PC/104 data logger designed for this environment is with a charge coupled going to work, capturing data from CAN interfaces in device, DSP, and software to real time. provide image stability with zero loss in resolution or field of view. Along with a CAN interface, the ePC-QUAD-LOG has a fast 16-bit A/D for capturing signals, as well digital input Capable of handling vibrations up to 100 Hz, the channels. Data is recorded to a CompactFlash device in Energen Image Stabilization System can achieve a DIADEM format, and USB image stability to 35 µrad, depending on the and Ethernet interfaces are application. Applications include anything with a available to share data. The camera – telescopes, reconnaissance aircraft, UAVs, unit powers from 9-36 Vdc. and machine vision systems.

BMC Messsysteme GmbH Energen www.bmcm.de www.energeninc.com RSC# 33368 RSC# 33370

Editor’s Choice Products are drawn from OSP’s product database and press releases. Vendors may add their new products to our website at www.opensystems-publishing.com/vendors/submissions/np/ and submit press releases at www.opensystems-publishing.com/news/submit. OSP reserves the right to publish products based on editors’ discretion alone, and does not guarantee publication of any product entries.

Company name/ CPU type Form factor Description Model number Acrosser Technology www.acrosser.com AR-B1622 AMD Geode LX800 PC/104 PC/104 form factor SBC with AMD low-power Geode LX800 500 MHz CPU AR-B1652 VIA Mark CoreFusion 3.5" 3.5" SBC built with power-efficient VIA Mark CoreFusion processor and VT82C686B chipset, embedded fanless VIA Mark 533/800 processor ACTIS Computer www.actis-computer.com CSBX-3545 Freescale PowerQUICC III 3U CompactPCI 3U CompactPCI SBC • PowerQUICC III MPC8545E up to 1.2 GHz with up to 1 GB of MPC854SE soldered DDR memory with ECC support ESBX-4440 AMCC PPC4440GX 5.51" x 8.27" Solution for packet-switching applications in communication, with the AMCC (140 mm x 210 mm) PPC4440GX processor at 667 MHz, typically in 1U rack enclosure ADLINK Technology www.adlinktech.com NuPRO-796 AMD Geode GX533 PCI PCI half-size AMD Geode GX533 SBC with LAN, LVDS, SATA, and CompactFlash • Integrated AMD Geode GX533 processor with ultra-low power consumption NuPRO-851 Intel Pentium 4 13.31" x 4.80" Full-size Intel Pentium 4 (LGA775) processor SBC with DDR2, VGA, dual GbE, SATA, and (338 mm x 122 mm) USB 2.0 • 800 MHz FSB with Hyper-Threading Intel Pentiumy 4 (LGA775) processor Advantech Corporation l www.advantech.com PCM-9375 AMD Geode LX800 3.5" Biscuit 3.5" Biscuit SBC with an AMD low-power Geoden LX800 500 MHz at 0.9 W processor • Supports DDR memory • 24-bit TFTO LCD interface • PC/104 expansion interface AEWIN Technologies t www.aewin.com.tw EM-6330 AMD Geode LX800 3.5" An AMD Geode LX800 processor-based 3.5" embedded SBC with PC/104 support • Supports AMD iGeoden LX800 CPU up to 500 MHz EM-6331 AMD Geode LX800 3.5" AMD Geode rLX800 3.5" embedded SBC with PCI-104, Mini PCI, VGA/LCD, LAN, audio, andP SSD • Supports AMD Geode LX800 CPU up to 500 MHz Aitech e www.rugged.com C901 Freescale PowerPC 7448 3U CompactPCIlRugged 3U CompactPCI single-slot SBC • PowerPC 7448 processor at 1.4 GHz with g Altivec technology • 200 MHz MPX bus • Fully PICMG 2.0, Rev. 3.0 compliant C901L Freescale PowerPC 7448 3U CompactPCI Rugged 3U CompactPCI single-slot SBC • PowerPC 7448 processor at 1.0 GHz with in Altivec technology • 200 MHz MPX bus • Fully PICMG 2.0, Rev. 3.0 compliant C903 IBM PowerPC 750FLS3U CompactPCI Rugged 3U CompactPCI single-slot SBC • Low-power PowerPC 750FL processor at r 600 MHz • 100 MHz 60x bus • Fully PICMG 2.0, Rev. 3.0 compliant Alphi Technology o www.alphitech.com CSBX-3545 Freescale PowerQUICC 3U CompactPCI 1.2 GHz PowerQUICC CPU card • A 3U CompactPCI SBC available either for standard F convection- or conduction-cooling applications American Portwell www.portwell.com ROBO-8717VG2A Intel Core 2 Duo PICMG 1.0 PCI/ISA An Intel Core 2 Duo-based SBC • A PICMG 1.0 PCI/ISA single host board that adopts the Intel Q965 Express chipset • Includes PCI Express x1 and dual GbE ports Arcom Control Systems www.arcom.com VIPER PXA255 SBC Intel PXA255 XScale PC/104 An ultra-low-power PC/104-compatible SBC based on the Intel 400 MHz PXA255 XScale RISC processor • Low-profile, industry-standard PC/104 form factor Axiomtek www.axiomtek.com SBC84710 VIA V4 ECX A fanless, low power consumption VIA V4-powered embedded ECX SBC with PC/104 and Mini PCI for expansion • Onboard fanless, low-power V4 Eden/C7 CPU BCM Advanced Research www.bcmcom.com EBC5852-C8, 5.25 SBC Intel Celeron M 5.25" A RoHS (lead-free) 5.25" SBC • Operates with a single DC +12 V input • Based on Intel 82852GM GMCH and 82801DB ICH4 chipset architectures • Supports Intel Celeron M processor in an onboard BGA format EBC5945GM, 5.25 SBC Intel Core 5.25" EBX An SBC in a micro 5.25" EBX form factor board • Based on Intel 82945GM GMCH and (Core Duo and Solo) Intel 82801GHM ICH7M chipset architectures • Supports Intel Core Duo processor, Intel Core Solo processor, and Intel Core Duo processor in a mPGA Socket 478 format Connect Tech www.connecttech.com FreeForm/104 Xilinx Spartan 3E PC/104 Customizable PC/104 board based on Xilinx’s Spartan 3E • Customizable FPGA featuring digital I/O and counter/timers • Standard and custom cores available Diamond Systems www.diamondsystems.com Poseidon EPIC SBC VIA C7 and VIA Eden ULV EPIC Poseidon is a high-performance EPIC SBC combining a state-of-the-art CPU and peripheral technology with high-accuracy data acquisition on a single board • Low-power PC/104-Plus expandable SBC with choice of 1.0 GHz VIA Eden ULV or 2.0 GHz VIA C7 CPUs

Company name/ CPU type Form factor Description Model number Embest Info & Tech www.armkits.com Embest SBC2440-II Samsung S3C2440A 4.72" x 3.94" Compact SBC with camera interface based on Samsung S3C2440A ARM920T (ARM920T) (120 mm x 100 mm) microcontroller • Supports Linux and WinCE OS • Samsung S3C2440A (ARM920T core with MMU capable of 400 MHz operation) EuroTecH www.eurotech.it CPU-1462 PC/104-Plus Intel Pentium III PC/104-Plus The CPU-1462 PC/104-Plus High Reliability PIII SBC is a RoHS-compliant CPU module that combines a robust processor with multiport USB 2.0 for high-performance embedded applications • Intel Pentium III 800 MHz, 512 KB L2 cache, 133 MHz FSB PC/104-Plus RoHs SBC AMD Élan SC520 PC/104-Plus PC/104-Plus SBC ideally suited for applications requiring high reliability and low power consumption • Replaces the CPU-1420 in compliance with 2002/95/CE (RoHS) directives Fastwel www.fastwel.com Fastwel CPC1700 Intel Pentium M PC/104-Express A PC/104-Express format SBC designed for mission-critical embedded systems • Intel Pentium M processor up to 2.26 GHz and 533 MHz FSB • 1 GB PC4200 DDR2 SDRAM soldered onboard y GE Fanuc www.gefanucembedded.coml 3U VPX MAGIC1 Intel Core Duo 3U VPX The MAGIC1 rugged display processor is basedn on the SBC340 and GRA110 3U VPX cards • 2.0 GHz Intel Core Duo processor CPU with its 945GM Northbridge chipset is connected to an NVIDIA G73 GPU viaO 16-lane PCI Express SBC330 Freescale 8641D 3U VPX PowerPC 8641D-based SBC t• 3U VPX format • Features x8 PCI Express fabric, PowerPC 2 GB memory, andi twon Gigabit Ethernet ports SBC340 Intel Core Duo 3U VPX Core Duo processorr • 3U VPX form factor • 2.0 GHz T2500 Intel Core Duo processor architecture • Intel 945GM Northbridge provides a dual-bank DDR SDRAM interface General Dynamics P www.generaldynamics.com PC3010 Intel Pentium M 3U CompactPCI eIntel Pentium M up to 1.8 GHz • 3U CompactPCI conduction-cooled SBC • Up to l2 GB DDR SDRAM 333 MHz memory • Single-slot 3U CompactPCI IEI Technology g www.ieiworld.com Enano-8523T Intel ULV Celeron M inEPIC ULV Celeron M EPIC SBC • ULV Intel Celeron M 800 MHz zero cache processor with DDR266 SDRAM up to 1 GB fanless embedded board IEI WAFER-LX SBCs AMD Geode LX800 S5.75" x 4.02" AMD Geode LX800 500 MHz processor • AMD CS5536 chipset • 1x 200-pin SODIMM r (146 mm x 102 mm) DDR 333/400 MHz up to 1 GB • 10/100BASE-T dual RTL8100C • I/O interface KINO-MARK VIAo Mark Mini-ITX Mini-ITX SBC with VIA Mark 533/800 MHz processor • CRT/LVDS, dual LAN, SATA, and F audio • VIA VT82C686B chipset • 2x 168-pin PC100/133 DIMM socket up to 1 GB NANO-8522 Intel Pentium M/ EPIC EPIC SBC Socket 479 Intel Pentium M/Celeron M processor FSB 400 MHz, CRT/LCD, Celeron M GbE, SATA, and audio • Intel Pentium M/Celeron M CPU with 400 MHz FSB NANO-9452 Intel Core 2 Duo EPIC EPIC SBC, Intel Core 2 Duo FSB 667 MHz with CRT/LCD, dual PCI Express GbE and SATA II • Supports Intel Core 2 Duo, Core Duo/Core Solo processor up to 667 MHz FSB NANO-LX AMD Geode LX800 EPIC EPIC SBC with AMD LX800 CPU, audio, CRT, LCD/LVDS, and SATA RAID 0, 1, JBOD function support • EPIC form factor • New AMD LX800 processor embedded board with RoHS compliance • AMD CS5536 chipset PM-GX AMD GX466 PC/104 PC/104 SBC with AMD GX466 processor VGA/TTL, LAN, USB 2.0, and CompactFlash Type II • Compact and rugged PC/104 form factor • AMD GX466 processor with RoHS compliance PM-LX AMD Geode LX800 PC/104 PC/104 SBC with AMD LX800 processor 500 MHz • CRT/LCD, LAN, USB 2.0, CompactFlash Type II • PC/104 form factor • AMD LX800 processor embedded board with RoHS compliance Interface Concept www.interfaceconcept.com IC-e6-cPCIa Freescale 3U CompactPCI MPC7447A/MPC7448 processor-based • 3U CompactPCI SBC • Designed around MPC7447A or MPC7448 Freescale´s PowerPC e600 processors (MPC7447A-1 GHz or MPC7448-1.4 GHz) Lanner Electronics www.lannerinc.com EM-9761 VIA Luke EPIC EPIC VIA Luke SBC with VGA, LCD, audio, Mini PCI, USB, COM, Ethernet, and CompactFlash • Onboard VIA Luke/Luke-lite processor with integrated graphics controller IAC-H672 VIA Mark CoreFusion Half-size ISA Half-size ISA VIA Mark CoreFusion SBC with VGA/LVDS/LAN/audio/CompactFlash/ PC/104/PC/104-Plus/USB • Onboard VIA Mark 533 MHz/800 MHz processor • PC/104 and PC/104-Plus expansion options

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Company name/ CPU type Form factor Description Model number MEN Micro www.men.de F11N Intel Pentium III 3U CompactPCI RoHS-compliant 3U SBC equipped with an Intel ULP Pentium III or ULV Celeron processor • Takes 8 HP or more front space depending on its configuration F17 Intel Core 2 Duo 3U CompactPCI 3U CompactPCI or CompactPCI Express SBC with Intel Core 2 Duo • Intel Core 2 Duo T7400, 2.16 GHz • Dual-core 64-bit processor • Up to 4 GB DDR2 DRAM soldered F600 Intel Pentium Series 3U CompactPCI 3U CompactPCI side card for SATA/Legacy I/O • 4 HP extension for 3U Intel SBCs F14, F15 • 1-4 COMs via SA-Adapters • Optical isolation depending on SA-Adapter • 2.5" SATA hard-disk slot F601 Intel Pentium Series 3U CompactPCI 3U CompactPCI side card for multimedia • 4/8 HP extension for 3U Intel SBCs F14, F15 • Two DVI connections • One HD audio, optically isolated • One COM, alternatively with optical isolation • 2.5" SATA hard-disk slot F602 Intel Pentium Series 3U CompactPCI 3U CompactPCI Express side card • 4 HP extension for 3U Intel SBCs F14, F15, F17 Express • Four PCI Express links x1 to backplane • One COM via SA-Adapter • One USB 2.0 • One DVI connection • 2.5" SATA hard-disk slot Mercury Computer y www.mc.com Momentum Series Freescale PowerPC 7448 3U CompactPCI A 3U CompactPCI conduction-cooled SBC with dual PowerPCl 7448 processors CP3-102 • Provides more than 400 GFLOPS of processingn power in half-ATR chassis PPA-150 PrPMC IBM PowerPC 750GX PMC SBC that includes features for high-performance operation on PICMG 2.15 platforms • Single-wide PMC form factor • Real-timeO clock • IBM 750GX RISC processor • Up to 1 GHz on 166 MHz PowerPC tbus Micro Memory n www.micromemory.com MM-7105, 7110, 7115 Xilinx V-4 LX200 PMC Provides FPGAr processingi resources on a PMC form factor • Rugged PMC including the powerful V-4 LX200 FPGA from Xilinx • The MM-7110 is a PMC that combines the LX200P with an SX55 • The MM-7115 is a PMC that combines the LX200 with an LX160 Micro/sys e www.embeddedsys.com SBC1491ET STMicroelectronics PC/104 lReady-to-run 486/586 computer • Small PC/104 format • DiskOnChip, 64 MB RAM 486DX (STPC Atlas) g • Onboard accelerated VGA • COM1, COM2, KBD, mouse • 10BASE-T Ethernet port n • PC/104 expansion • -40 °C to +85 °C operation available SBC1496 STMicroelectronics iStackableUSB Ready-to-run 486/586 computer • 120 or 133 MHz • CRT and flat-panel output 486DX (STPC Atlas) • 64 MB SDRAM • CompactFlash connector • 10/100BASE-T Ethernet • Two serial S ports • Extended temperature available Orion Technologies r www.otisolutions.com CPC7610 Intelo Pentium M 3U CompactPCI Pentium M 3U CompactPCI SBC • 1.8 GHz Pentium M CompactPCI system controller F • Up to 2 GB DDR • Two 10/100 Ethernet ports • Two USB 2.0 PMC7520 IBM 750GX or 750FX PrPMC PowerPC PrPMC SBC • Single-width Monarch or non-Monarch • 200 MHz 60X processor bus • 10/100/1000 front bezel Ethernet RJ-45 • 1 GHz IBM 750GX or 600/800 MHz IBM 750FX PMC7525 IBM 750GX or 750FX PrPMC PowerPC PrPMC SBC • IBM 750FX/GX • -40 ºC to +85 ºC operating temperature • 1 GHz IBM 750GX or 600/800 MHz IBM 750FX • Marvell Discovery III Radstone www.gefanucembedded.com/milaero SBC340 Intel Core Duo 3U VPX A 3U VPX Intel Core Duo SBC • Intel 2.0 GHz Core Duo T2500 • Intel 945GM chipset • 1 GB DDR2 SDRAM • 16-lane PCI Express to the backplane for high-performance graphics • 4-lane PCI Express to backplane for connection to fabric Team ASA www.teamasa.com NPWR-XTR Intel Dual-Core XScale 4" x 6.5" An SBC with 1.2 GHz Dual-Core XScale CPU, eight SATA/SAS ports, four SATA ports, (102 mm x 165 mm) and dual GbE • Compact 3.5" form factor • 600 MHz, 800 MHz, or 1.2 GHz Dual-Core XScale CPU Technologic Systems www.embeddedarm.com TS-7300 Samsung ARM920T 4.8" x 6" Linux FPGA SBC with 1.69 seconds fast bootup to Linux • 200 MHz ARM920T CPU with (122 mm x 152 mm) 32-128 MB SDRAM • User-programmable Altera 2C8 Cyclone II FPGA with reprogram Linux utility VersaLogic www.versalogic.com 1.8 GHz Cobra EBX Intel Pentium M EBX EBX form factor • PC/104-Plus expansion • Multivendor support • Pentium M 1.8 GHz or Celeron M 1.3 GHz options Python EBX SBC AMD Geode LX800 EBX SBC with no moving parts • Offers lower power consumption • LX800 Celeron- equivalent 800 MHz performance with lower power draw • High-performance video: analog and LVDS flat-panel outputs for 18- and 24-bit displays

Company name/ CPU type Form factor Description Model number WIN Enterprises www.win-ent.com MB-06058 AMD Opteron PICMG 1.3 PICMG 1.3 SBC with AMD second-generation Opteron processor • High performance with up to 2.6 GHz processing speed • Configure with a single dual-core CPU or use optional daughtercard to support another dual-core second-generation AMD Opteron processor WinSystems www.winsystems.com EBC-855 Pentium M EBX, 5.79" x 7.99" Intel 1.8 GHz Pentium M EBX-compatible SBC • -40 °C to +70 °C • High-performance (147 mm x 203 mm) 1.8 GHz Pentium M CPU • 5.75" x 8.0" EBX-compliant SBC EPX-C3 and EPX-GX500 VIA C3, AMD Geode GX500 EPIC EPIC SBC VIA 733 MHz or 1 GHz C3 processor (EPX-C3) or AMD Geode GX500 at 1.0 W based CPUs (EPX-GX500) • x86-compatible, EPIC-compliant SBC LBC-GX500 SBC AMD Geode GX500 EBX AMD Geode GX500 at 1 W processor with -40 °C to +85 °C operation • EBX-size board, 5.75" x 8.00" (147 mm x 203 mm) PPM-TX and PPM-520 Pentium MMX, AMD PC/104-Plus PC/104-Plus SBCs • Pentium and five x86 CPUs • PC-compatible platform supports SC520 Windows, Linux, and other OSs • Two to four COM ports • Bidirectional LPT ports • -40 °C to +85 °C y SBC Runs Hot and Cold AMD Geode GX500 PC/104-Plus PC/104-Plus SBC • AMD GX500 at 1 W processor • -40l °C to +85 °C operating temperature • Low power dissipation permits fanless operation • Windows and Linux operating systems supported n Zendex O www.zendex.com ZXE-855 Intel Pentium 4 M or 12" x 9.25" x 2" Intel Pentium 4 M or Celeront M up to 2 GHz with the Intel 855 chipset • 6x USB 2.0 USB Celeron M (305 mm x 235 mm ports, 10/100 Ethernet • Two XGA video ports • Full passive I/O backplane x 51 mm) in Data was extracted from OpenSystems Publishing’s product database on May 22, 2007. Description keywords rsearched included “SBC” and “single board computer” on products entered May 2006 through May 2007 within all OpenSystems publications. Entries were further edited for relevance to Pproduct guide’s theme, and OpenSystems Publishing is not responsible for errors or omissions. Vendors are encouraged to add their new products to our website at www.opensystems-publishing.com/vendors/submissions/np/.e gl in r S Fo

RSC# 4101 @ www.smallformfactors.com/rsc RSC# 4102 @ www.smallformfactors.com/rsc

PC/104 and Small Form Factors Summer 2007 / 41 ©2007 OpenSystems Publishing. Not for distribution. Boards: COM Express Connectors DVI converter Diversified Technology, Inc. Positronic Industries Apollo Display Technologies, Inc. Website: www.atcatogo.com Website: www.connectpositronic.com Website: www.apollodisplays.com Model: CMX-Lx45 rsC No: 33162 Model: King Cobra Series rsC No: 33301 Model: DV-SLIM rsC No: 33152 y nl O CMX-Lx45 addresses embedded requirements t for time-to-market sensitive applications in n military/defense, industrial, and commercial i Offers the performance of high-reliability applications • COM Express module based on r machined contacts • Molded of lightweight, the Intel Core Duo processor • 533/667 MHz noncorrodible compositeP materials • Contact Space-saving DVI converter board equipped front-side bus and 533/667 MHz DDR2 SDRAM with easy user-configurable settings for both sizes 22, 20, and 16 for signal and power appli- bus • 8x USB 2.0 ports • Single SODIMM cations • Environmentale options that meet IP65 the display and backlight inverter used • Suit- l able for cost-conscious monitor applications to 2 GB • 32-bit/33 MHz PCI 2.3 bus • Five requirements • Right angle and straight PCB PCI Express x1 root ports, configurable as mountg terminations • Cable terminations and where available space is minimal • Allows 5x1 or 1x1 and 1x4 accessories for quick connection from the DVI output of in a graphics system to most standard TFT displays • Supports TFT displays with TTL and S single-channel LVDS interfaces Component-level modules DSP resource boards: PC/104 National Semiconductor r North Atlantic Industries Website: www.national.como Website: www.naii.com Fabrics: PCI Express Model: LMH7322 & LMH7220 rsC No: 33293 Model: 73SD4 RSC No: 33294 F One Stop Systems Inc. Website: www.onestopsystems.com Model: OSS-PCIe-HIB2-EC-x4 RSC No: 33296

Single, dual, and quad comparators offer A DSP-based 73SD4 PC/104 card that includes power and performance specifications for six independent, transformer-isolated, pro- industrial, medical, and test and measurement grammable Synchro/Resolver tracking applications • Features 700 ps propagation converter measurement channels • Each delay and dispersion of 5 ps at > 100 mV over- channel has 16-bit resolution, ±1 arc-minute drive • Separate input and output supply pins accuracy, tracking rate to 150 RPS, accurate enable level-shifting applications • Typical digital velocity output, incremental encoder PCI Express (PCIe) x4 Express Card allows low power consumption of 21 mA for power- (A+B) outputs, and wrap-around self-test • laptops to connect to a PCIe x4 cable, provid- sensitive applications • Features an input Channel pairs can be programmed for any ing bandwidth of 2.5 Gbps • PCIe x1 connec- common-mode range that extends 200 mV speed ratio between 1:1 and 255:1 • Requires tion to x4 cable connector • Installs in laptop below the negative rail • Adjustable hysteresis a single +5 Vdc power supply and operates Express Card 34 slot • Powered cable connec- adds flexibility and minimizes state changes over a frequency range of 47 Hz to 10 KHz tors • 2.5 Gbps cable bandwidth • No software because of spurious noise • Provides fast rise • Includes an autoranging input range from driver required and fall times of 160 ps • RSPECL outputs and 2 Vrms to 28 Vrms latch inputs reduce EMI

42 / Summer 2007 PC/104 and Small Form Factors ©2007 OpenSystems Publishing. Not for distribution. Flat panel shipboard, airborne, and homeland security Software: board support packages Advantech eAutomation Group • Provides a unique hardware-based imple- VersaLogic Corp. Website: www.eAutomationPro.com mentation of two methods of data protection: Website: www.versalogic.com Model: FPM-3170G rsC No: 33191 secure erase, with two levels of data purging, Model: BSP for Puma PC/104 rsC No: 33186 and write protect, preventing data from being overwritten or modified • Couples a PCI/ATA core with secure-erase and write-protect logic implemented via an FPGA • Capable of operating in extended shock and vibration environments

Mass storage: solid-state disk PQI Corporation BSP allows developers to configure their Website: www.pqimemory.com Puma PC/104-Plus systems quickly and Model: Compact Flash Card rsC No: 33099 17" SXGA TFT LCD flat-panel monitor • develop applications in a shorter time frame 1280 x 1024 resolution • Direct VGA, DVI, video, • Faster time frame, quicker application • and S-video inputs • Vivid and sharp images Package provides support for basic functions • Direct VGA signal transmission allows dis- including Ethernet, audio, video, USB ports, play upgrades without making changes to and serial ports the current system • OSD control pad on the front panel • Antireflective screen with tem- y Thermal manlagement pered glass • Hard anodic coating to prevent panel abrasion and acid corrosion • Stainless CPS Technologiesn steel chassis and aluminum front panel • Sup- Website: www.alsic.com ports panel, wall, desktop, rack, or VESA arm OModel: AlSiC RSC No: 33338 mounting • RoHS and NEMA4/IP65 compliant t Equipped with NAND flash memoryi n• Suit- able for data storage memory in PC or other I/O: multifunction r electric devices and Digital Still Camera • Micro/sys, Inc. Ultra DMA Mode 4 supportP • Built-in error- Website: www.embeddedsys.com correction code • Wear-leveling mechanism Model: SBC1496 rsC No: 33101 le Procegssor: Core Duo inKontron Website: www.kontron.com Aluminum Silicon Carbide (AlSiC) is a metal S Model: ETXexpress-MC rsC No: 33366 matrix composite used for thermal manage- r ment of microelectronic, optoelectronic, and o power electronic devices • RoHs compliant • Unlike traditional packaging materials, AlSiC F enables a tailored coefficient of thermal Ready-to-run 486/586 computer • 120 or 133 MHz • CRT and flat-panel output • 64 MB expansion, offering compatibility with various SDRAM • Two serial ports • Extended tem- electronic devices and assemblies • Exhibits perature available • CompactFlash connector high thermal conductivity that results in effi- • 10/100BASE-T Ethernet • Stackable USB 2.0 cient thermal dissipation with six hosts in stackable format or plug/cable format for remote client devices • DOS, Linux, Windows CE, NT Embedded, and VxWorks Video: frame grabber Built around the Intel Core 2 Duo processor (up 4DSP to 2.2 GHz) and Intel’s latest 965GM Express Website: www.4dsp.com Mass storage chipset • Part of the fourth generation of Intel’s Model: VID472 RSC No: 33254 ACT/Technico Centrino notebook platform • Power-efficient Website: www.acttechnico.com COM Express solution offers optimized graph- Model: Secure PMCStor rsC No: 33345 ics features • Features up to 800 MHz front- side bus • Clock speed can be reduced as required by the operating workload • Offers an improved fit for temperature- and power- sensitive embedded applications • Allows the processor to go into a deeper sleep state for enhanced power efficiency • Onboard TPM 1.2 for enhanced security options • Dual Camera Link frame grabber in PMC/XMC One of the first COM Express Pin-out Type 2- format with video data processing and com- compliant modules supporting dual-channel pression available in a Virtex-4 FPGA device • memory up to 4 GB via two 533 MHz or 667 MHz Two base configurations via two mini CL con- Secure storage solution provides an effective nectors • High-speed DSP processing in two means to perform secure erasure or write pro- DDR2 SODIMM sockets positioned on the top side of the module • 5x PCI Express x1 lanes, Xilinx Virtex-4 FPGAs • FPGA configuration tection of sensitive data on a PMC form factor onboard storage • 2 x 32M x 16 DDR2 SDRAM • Available for a wide range of commercial and 3x Serial ATA ports, and 8x USB 2.0 ports along with Gigabit Ethernet (128 MB) • 4 x 2M x 32 QDR2 SRAM devices military applications, including ground mobile, (32 MB) • 128 Mb flash device • PCI interface

Advertising/Business Office 30233 Jefferson Avenue St. Clair Shores, MI 48082 Tel: 586-415-6500 n Fax: 586-415-4882 Vice President Marketing & Sales ADVERTISER INFORMATION Patrick Hopper [email protected] Page/RSC# Advertiser/Product Description Business Manager Karen Layman 17 aCCES I/O Products – I/O Solutions 28 advantech – Rugged Solutions Sales Group 48 ampro – Embedded Solutions Dennis Doyle Senior Account Manager 601 aprotek – PC/104 Modems [email protected] 7 arcom – Development Environment Tom Varcie Senior Account Managerly 22 axiomtek – Embedded Solutions [email protected] 2 diamond Systems – Single Board Computers Doug Cordier OAccount Manager 44 dIGITAL-LOGIC – In-Vehicle PCs [email protected] n Andrea Stabile 1102 Excalibur – MIL-SPEC Solutions i r Advertising/Marketing Coordinator 19 IEI Technology – EPIC CPU Boards P [email protected] 31 Jacyl Technology – XG-5000K Christine Long le E-marketing Manager 34 LiPPERT – Embedded PCs g [email protected] 4102 Logic Supply – Mini-ITX in 1101 Mesa Electronics S– PC/104-PCI Remote Bridge Regional Sales Managers Richard Ayer 5 Micro/sys –r CPU Boards West Coast o [email protected] 27 FMPL AG – MIP470 PowerPC Board Barbara Quinlan 47 pQI Europe – Compact Flash Card Midwest/Southwest 602 radicom – PC/104 Modems [email protected] Ron Taylor 24 rTD Embedded Technologies – PC/104 Modules East Coast/Mid Atlantic 4101 sCIDYNE – PC/104 Peripherals [email protected] Ernest Godsey 21 sealevel Systems – I/O Solutions Central and Mountain States 29 servo Halbeck – POSYS Motion Controllers [email protected] Jerry Bleich 15 Technologic Systems – TS-7300 Linux FPGA Computer New England 13 Toronto MicroElectronics – DVR301, EP301N, EP301V [email protected] 23 Toronto MicroElectronics – Embedded Computer Solutions International Sales 37 Toronto MicroElectronics – PC104-P3 Dan Aronovic 14 Tri-M Systems – PC/104 FlexTainer Account Manager – Israel [email protected] 18 Tri-M Systems – EPIC/PM 33 versaLogic – Embedded Applications Reprints and PDFs 9 WDL Systems – SBC Integration Becky Mullaney: 717-399-1900 ext 166 3 WinSystems – PC/104 Communication Modules [email protected]

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Full disclosure: I was a paid consultant for the He cited membership statistics showing a decline from 81 paid PC/104 Consortium for a short time in 2004. members (of all levels) in 2005 to 59 in 2007. Worse, four execu- tive members (board of director types) changed their status, and This is a sensitive topic (something about biting the hand that feeds the category of observer members was dropped. Using the rates you?). But at the PC/104 Consortium’s recent general (public) found on the consortium’s website, this is a financial decrease of meeting, the president’s briefing highlighted a number of zingers more than 25 percent, which can’t possibly leave enough cash that can’t be swept under the rug any longer. So with the approval to do anything proactive after management expenses are paid of OpenSystems Publishing’s Editorial Board1, I’m revealing key (website, dues, accounting). In summary, the membership defec- facts, some suppositions, and a few recommendations for my tions substantiate Jonathan’s assertions thaty the consortium’s not magazine’s namesake: the beloved PC/104 Consortium. Working offering enough value. l together, vendors, customers, and ecosystem partners can get this n train moving back on the right track. Consider this: According to www.PC104.org, the consortium’s last activity was listed inO a press release dated September 2006 Market growth? when it adopted tthe EPIC Express specification (which was That’s right: we’re stuck. Informal discussions with many PC/104 actually created by five member companies). Prior to that, the vendors reveal that the market for PC/104 boards isn’t growing, consortiumi nadopted EPIC in January 2005 … about 18 months and vendors that are experiencing growth are generally doing so at earlier.r Not much activity in a year and a half. Today, the hot the expense of their competitors by “stealing” market share. If what Ptopic in the consortium is “PC/104 Express” – an incarnation of marketers call the total available market is not getting any bigger, adding PCI Express to PC/104. then the PC/104 ecosystem suffers, including its consortium.le However, this proposal is at an impasse because the handful of Tactics that steal market share tend to depress gprices over- companies involved can’t resolve connector issues and other all and devalue companies’ products – a short-termn gain at details. Conversations I’ve had with parties involved don’t paint the expense of long-term market health. iBut the darned thing an optimistic picture for a quick resolution. At fault: the consor- is this: the market for Small Form SFactors (SFFs) is growing! tium’s rules that allow a protracted technical discussion with no That is, countless new systemsr from handheld Internet appli- mechanism to cut it off, vote, and move on. ances to drugstore kiosks to embedded military “shoeboxes” are using SFFs for theiro embedded electronics. Organizations Recommended priorities such as VITA andF PICMG are working on sponsored specifica- Jonathan was succinct in his recommendations for getting the tions for COM Express, AdvancedMC, MicroTCA, and VITA 56 consortium train moving again. The top priority is to address ISA (a variation on PMC). obsolescence. I know that at least one member company has an ISA IP core that – for the right deal – could be made available In fact, at the January 2007 meeting in Long Beach, California, to all members. But the consortium needs a way to broker this. MEN Micro asked VITA to standardize two new SFF modules: Current bylaws make this a gray area, so it’s strictly hands-off for ESMexpress and Universal Submodule (USM). In both cases, now. Wrong answer; change the rules before the market dries up. the form factors were synergistic with VITA’s ongoing efforts and member companies, and MEN hoped that VITA could help The second priority is to implement PCI Express with “wide- market and support the ecosystems for these boards. Discus- spread acceptance.” Next, hire a spiritual leader for the consor- sions are ongoing, but this was by no means an isolated case. tium, followed by increasing member benefits by adding value I track no fewer than 68 SFFs, including the handful under the (my emphasis). Finally: expand the mission to “include all SFFs.” PC/104 Consortium’s control. But this leaves more than 60 other Heck, there are at least 60 others to choose from. SFFs, and I’ve added 10 in the past 12 months alone. Clearly, the market for standardized SFFs is growing, else these vendors I know that the market’s hungry for what the PC/104 Consortium’s wouldn’t waste their money. member companies can provide; that’s why so many build other products. But it’s up to the consortium to set the direction, remove Consortium activities the now-obsolete infrastructure obstacles, evolve PC/104, and At the recent annual meeting, PC/104 Consortium president add value to its members and the market by creating more SFF Jonathan Miller raised five key issues plaguing the consortium: standards beyond merely PC/104. Notice this magazine’s name is PC/104 and Small Form Factors. That’s a hint. n Inadequate member participation … limits the ability to achieve goals 1OSP is the publisher of this magazine. n Lack of connection with members n Lack of member benefits reduces the consortium’s value Chris A. Ciufo n Severe risk of ISA obsolescence … threatens the viability PC/104 and Small Form Factors of PC/104 www.smallformfactors.com n Mission is limiting; PC/104 is mature [email protected]

RSC# 47 @ www.smallformfactors.com/rsc

RSC# 48 @ www.smallformfactors.com/rsc