Instruction Set Architecture

Background & Introduction

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Computers and Programs Machine Code

• A simplified model of a computer consists of a • An executable program is a sequence of processing unit (CPU) and a memory. these simple instructions. • CPU can understand simple instructions: • The sequence is stored in memory (Von – read/write a memory location Neumann architecture). – add two numbers • The CPU processes the simple instructions – compare numbers sequentially. – etc. – Some instructions can tell the CPU to jump to a new place in memory to get the next instruction.

CS 160 Ward 3 CS 160 Ward 4 Instructions Sample Program in Words

• Each instruction is stored in memory as a bunch of bits. # Instruction 1 Set memory[801] to hold 00000001 • The CPU decodes the bits to determine what 2 Set memory[802] to hold 00000000 should happen. 3 If memory[802] = 10 jump to instruction #8 4 increment memory[802] • For example, the instruction to add 2 5 set memory[803] to 2 times memory[801] numbers might look like this: 6 put memory[803] in to memory[801] 7 jump to instruction #3 10100110 8 print memory[801]

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A Picture Human vs Machine Programs

MEMORY Address • The computer can only understand the bits (the Instruction #1 0 encoded program) 1 Instruction #2 Instruction #3 CPUCPU 2 Machine Language 3 Instruction #4 4 Instruction #5 5 Instruction #6 • Humans don't like to deal with bits, so they ...... developed English-like abbreviations for programs. 801 Assembly Language 802 803 • Typically, one-to-one relationship between the two

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Our Sample Program Assembly Language Machine Language AssemblyAssembly ST 1,[801] 00100101 11010011 MachineMachine LanguageLanguage ST 0,[802] 00100100 11010100 AssemblerAssembler LanguageLanguage ProgramProgram TOP: BEQ [802],10,BOT 10001010 01001001 11110000 ProgramProgram INCR [802] 01000100 01010100 01001000 10100111 10100011 ST 1,[801] MUL [801],2,[803] ST 1,[801] 01001001 11100101 10101011 00000010 . . . 01001001 ST [803],[801] . . . 10010100 00101001 10010100 JMP TOP 11010101 BOT: LD A,[801] 11010100 10101000 CALL PRINT 10010001 01000100

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Higher-Level Languages High-Level Languages

• Assembly Language is much easier to deal • Many high-level languages have been with than Machine Language, but you still developed. need to know about all the instructions. – Different ways of representing • People/Companies have developed languages computations. that were independent of the specific – Different languages for different needs: machine language (i.e., portable). • symbolic vs. numeric computation – More abstract representation of • human efficiency vs. program efficiency instructions. • portability • extensibility

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• C

• C++ set memory[801] to hold 00000001 x=1; • Fortran set memory[802] to hold 00000000 i=0; • Java if memory[802] = 10 jump to instruction #8 while (i!=10) { increment memory[802] i++;

• Ada set memory[803] to 2 times memory[801] x=x*2; • Basic put memory[803] in to memory[801] } } • Algo jump to instruction #3 print memory[801] printf("%d",x); Some High-Level Languages are “higher” than others.

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Compiler Many Different Compilers

• Sample C Compilers: CC Program Program MachineMachine – GNU gcc CC CompilerCompiler LanguageLanguage ProgramProgram – Portland pgcc intint main() main() {{ intint i=1; i=1; – Keil C ...... 0100100101001001 – Intel Win32 C 1001010010010100 – Sun C – Fujitsu C Created with text editor or – IBM AIX C development environment – . . .

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• Operation code (Op code) – Do this Instruction Set • Source Operand(s) reference Characteristics & Functions – To this • Result Operand reference – Put the answer here • Next Instruction Reference (rare) – When you have done that, do this...

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Instruction Cycle State Diagram Simple Instruction Format (without Interrupts)

• How many instructions (Opcodes) can we have in our Instruction Set? 24 = 16 • How much memory (or virtual memory) can we directly access in our system? 26 = 64

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• 3 addresses • 2 addresses – Operand 1, Operand 2, Result – One address doubles as operand and result – a = b + c; – a = a + b – May be a fourth - next instruction (rare - – Reduces length of instruction usually implicit) – Requires some extra work – Needs very long words to hold everything. • Temporary storage to hold some results Why? – Typically indirect addressing using registers

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Number of Addresses [3] Number of Addresses [4]

• 1 address • 0 (zero) addresses – Implicit second address – All addresses implicit – Usually a register (accumulator) – Uses a stack – Common on early machines – e.g. push a – push b – add – pop c

– c = a + b

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• More addresses • Addresses – More complex (powerful?) instructions • Numbers – More registers • Inter-register operations are quicker – Integer/floating point – Fewer instructions per program • Characters • Fewer addresses – ASCII, etc. – Less complex (powerful?) instructions • Logical Data – More instructions per program – Bits or flags – Faster fetch/execution of instructions

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Instructions: Types of Operation

Two different classifications

• Data Transfer • Data Access & Transfer Operations • Arithmetic • Arithmetic • Logical • Logical • Conversion • Floating-Point • I/O • Conditional & • Transfer of Control Unconditional Branch • System Control • Processor Control

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• Specify • Add, Subtract, Multiply, Divide – Source • Signed Integer – Destination • Floating point ? – Amount of data • May be different instructions for • May include different movements – Increment (a++) – e.g. IBM 370 – Decrement (a--) • Or one instruction and different – Negate (-a) addresses – e.g. VAX

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Common Shift and Rotate Operations Common Logical Operations

• Bitwise operations • AND, OR, NOT

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• E.g. Binary to Decimal • May be specific instructions • May be done using data movement instructions (memory mapped) • May be done by a separate controller (DMA)

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Common Transfer of Control Operations Branch Instruction

• Branch – e.g. branch to x if result is zero • Skip – e.g. increment and skip if zero ISZ Register1 Branch xxxx ADD A • Subroutine call – c.f. interrupt call

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Common Systems Control Operations Example Instruction Set

• Privileged instructions MIPS Instruction Set • CPU needs to be in specific state – Ring 0 on 80386+ • Early RISC Design – Kernel mode • Design goals: • For operating systems use – Speed • Ensure one instruction can complete every clock cycle – Minimalistic • Contain the fewest possible instructions necessary

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MIPS Floating-Point Instructions Aesthetics of Instruction Sets

• Elegance – Balanced – No frivolous or useless instructions

• Orthogonality – No unnecessary duplication – No overlap among instructions

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The principle of orthogonality specifies • Instructions designed to that each instruction should perform a – Complete in one clock cycle unique task without duplicating or • Performs a basic computation overlapping the function of other – Support restricted set of operations instructions • Register operations • Load/Store operations – Fixed instruction length

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Addressing Modes

• Immediate • Direct Addressing Modes • Register • Indirect – Memory – Register • Displacement/Indexed – various types • Stack

CS 160 Ward 47 CS 160 Ward 48 Immediate Addressing Immediate Addressing Diagram

• Operand is part of instruction

• Operand = address field Instruction • e.g. ADD 5 Opcode Operand – Add 5 to contents of accumulator – 5 is operand • No memory reference to fetch data • Fast • Limited range

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Direct Addressing Direct Addressing Diagram

• Address field contains address of operand Instruction • Effective address (EA) = address field (A) Opcode Address A • e.g. ADD A Memory – Add contents of cell A to accumulator – Look in memory at address A for operand • Single memory reference to access data

• No additional calculations to work out Operand effective address • Limited address space

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• Operand is held in register named in • No memory access address filed • Very fast execution • EA = R • Large number of registers helps • Limited number of registers performance – Very small address field needed – Requires good assembly programming or – Shorter instructions compiler writing – Faster instruction fetch • Good (multiple) use of operands after in registers • Very limited address space – C programming – Number of registers much smaller than • register int a; memory • Compare: direct addressing

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Register Addressing Diagram Memory Indirect Addressing [1]

Instruction • Memory cell pointed to by address field Opcode Register Address R contains the address of (pointer to) the Registers operand • EA = (A) – Look in A, find address (A) and look there for operand Operand • e.g. ADD (A) – Add contents of cell pointed to by contents of A to accumulator

CS 160 Ward 55 CS 160 Ward 56 Memory Indirect Addressing [2] Memory Indirect Addressing Diagram

• Large address space Instruction n Opcode Address A • 2 where n = word length Memory • May be nested, multilevel, cascaded Pointer to operand – e.g. EA = (((A))) • Draw the diagram yourself

• Multiple memory accesses to find Operand operand • Hence slower

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Register Indirect Addressing Register Indirect Addressing Diagram

• Compare: indirect addressing Instruction • EA = (R) Opcode Register Address R Memory • Operand is in memory cell pointed to by contents of register R Registers • Large address space (2n)

• One fewer memory access than indirect Pointer to Operand Operand addressing

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• EA = A + (R) Instruction • Address field hold two values Opcode Register R Address A Memory – A = base value – R = register that holds displacement Registers – or vice versa

Pointer to Operand + Operand

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Relative Addressing Base-Register Addressing

• A version of displacement addressing • Version of displacement addressing • R = Program counter, PC • EA = A + (PC) • A holds displacement • R holds pointer to base address • i.e. get operand from A cells from current location pointed to by PC • R may be explicit or implicit • Compare: locality of reference & cache • Useful for virtual memory and paging usage

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• A = base • Operand is (implicitly) on top of stack • R = displacement • e.g. • EA = A + R – ADD Pop top two items from stack and add • Good for accessing arrays – EA = A + R – R++

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Implicit Encoding

• For a given opcode, the type of each operand is fixed Types of Operands • More opcodes required • Example – add_signed_immediate_to_register

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• Operand specifies type and value • Fewer opcodes required • Example – Opcode is add, operands specify register and immediate

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Examples of Explicit Combination

• Some processors provide hardware that can compute an operand value from multiple sources R1 = R1 + -93 • Typically, a sum • Example – register-offset specifies register and immediate value R1 = R1 + R2 – Processor adds immediate value to contents of register

CS 160 Ward 71 CS 160 Ward 72 Example Tradeoffs for Operand Types

• No single style of operands optimal for all purposes – All styles discussed have been implemented • Tradeoff among – Ease of programming R2 = R2-17 + R4+76 – Fewer instructions – Smaller instructions – Larger range of immediate values Useful when referencing a data aggregate – Faster operand fetch and decode such as C language struct – Decreased hardware size

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Some Common ISAs

• Alpha AXP (DEC Alpha) • ARM (Acorn RISC Machine) (Advanced RISC Machine now ARM Ltd) • IA-64 (Itanium) • MIPS • Motorola 68k • PA-RISC (HP Precision Architecture) • IBM POWER • PowerPC • SPARC • SuperH • System/360 • Tricore (Infineon) • Transputer (STMicroelectronics) • VAX (Digital Equipment Corporation) • x86 (IA-32, Pentium, Athlon) (AMD64, EM64T)

Source: http://www.answers.com/topic/instruction-set

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